1 | /*
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2 | * Copyright (C) 2008 Apple Inc. All rights reserved.
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3 | *
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4 | * Redistribution and use in source and binary forms, with or without
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5 | * modification, are permitted provided that the following conditions
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6 | * are met:
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7 | * 1. Redistributions of source code must retain the above copyright
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8 | * notice, this list of conditions and the following disclaimer.
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9 | * 2. Redistributions in binary form must reproduce the above copyright
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10 | * notice, this list of conditions and the following disclaimer in the
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11 | * documentation and/or other materials provided with the distribution.
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12 | *
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13 | * THIS SOFTWARE IS PROVIDED BY APPLE INC. ``AS IS'' AND ANY
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14 | * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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15 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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16 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL APPLE INC. OR
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17 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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18 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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19 | * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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20 | * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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21 | * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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22 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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23 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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24 | */
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25 |
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26 | #ifndef MacroAssembler_h
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27 | #define MacroAssembler_h
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28 |
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29 | #include <wtf/Platform.h>
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30 |
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31 | #if ENABLE(ASSEMBLER)
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32 |
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33 | #include "X86Assembler.h"
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34 |
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35 | namespace JSC {
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36 |
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37 | class MacroAssembler {
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38 | protected:
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39 | X86Assembler m_assembler;
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40 |
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41 | public:
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42 | typedef X86::RegisterID RegisterID;
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43 |
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44 | // Note: do not rely on values in this enum, these will change (to 0..3).
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45 | enum Scale {
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46 | TimesOne = 1,
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47 | TimesTwo = 2,
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48 | TimesFour = 4,
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49 | TimesEight = 8
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50 | };
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51 |
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52 | MacroAssembler(AssemblerBuffer* assemblerBuffer)
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53 | : m_assembler(assemblerBuffer)
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54 | {
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55 | }
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56 |
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57 | void* copyCode()
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58 | {
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59 | return m_assembler.executableCopy();
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60 | }
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61 |
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62 | // Address:
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63 | //
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64 | // Describes a simple base-offset address.
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65 | struct Address {
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66 | explicit Address(RegisterID base, int32_t offset = 0)
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67 | : base(base)
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68 | , offset(offset)
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69 | {
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70 | }
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71 |
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72 | RegisterID base;
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73 | int32_t offset;
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74 | };
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75 |
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76 | // ImplicitAddress:
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77 | //
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78 | // This class is used for explicit 'load' and 'store' operations
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79 | // (as opposed to situations in which a memory operand is provided
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80 | // to a generic operation, such as an integer arithmetic instruction).
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81 | //
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82 | // In the case of a load (or store) operation we want to permit
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83 | // addresses to be implicitly constructed, e.g. the two calls:
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84 | //
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85 | // load32(Address(addrReg), destReg);
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86 | // load32(addrReg, destReg);
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87 | //
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88 | // Are equivalent, and the explicit wrapping of the Address in the former
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89 | // is unnecessary.
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90 | struct ImplicitAddress {
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91 | ImplicitAddress(RegisterID base)
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92 | : base(base)
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93 | , offset(0)
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94 | {
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95 | }
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96 |
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97 | ImplicitAddress(Address address)
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98 | : base(address.base)
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99 | , offset(address.offset)
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100 | {
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101 | }
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102 |
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103 | RegisterID base;
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104 | int32_t offset;
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105 | };
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106 |
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107 | // BaseIndex:
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108 | //
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109 | // Describes a complex addressing mode.
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110 | struct BaseIndex {
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111 | BaseIndex(RegisterID base, RegisterID index, int32_t offset = 0)
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112 | : base(base)
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113 | , index(index)
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114 | , scale(TimesOne)
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115 | , offset(offset)
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116 | {
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117 | }
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118 |
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119 | BaseIndex(RegisterID base, RegisterID index, Scale scale, int32_t offset = 0)
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120 | : base(base)
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121 | , index(index)
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122 | , scale(scale)
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123 | , offset(offset)
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124 | {
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125 | }
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126 |
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127 | RegisterID base;
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128 | RegisterID index;
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129 | Scale scale;
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130 | int32_t offset;
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131 | };
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132 |
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133 | // Label:
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134 | //
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135 | // A Label records a point in the generated instruction stream, typically such that
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136 | // it may be used as a destination for a jump.
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137 | class Label {
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138 | friend class MacroAssembler;
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139 |
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140 | public:
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141 | Label(MacroAssembler* masm)
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142 | : m_label(masm->m_assembler.label())
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143 | {
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144 | }
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145 |
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146 | private:
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147 | X86Assembler::JmpDst m_label;
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148 | };
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149 |
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150 | // Jump:
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151 | //
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152 | // A jump object is a reference to a jump instruction that has been planted
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153 | // into the code buffer - it is typically used to link the jump, setting the
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154 | // relative offset such that when executed it will jump to the desired
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155 | // destination.
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156 | //
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157 | // Jump objects retain a pointer to the assembler for syntactic purposes -
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158 | // to allow the jump object to be able to link itself, e.g.:
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159 | //
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160 | // Jump forwardsBranch = jne32(Imm32(0), reg1);
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161 | // // ...
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162 | // forwardsBranch.link();
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163 | //
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164 | // Jumps may also be linked to a Label.
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165 | class Jump {
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166 | public:
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167 | Jump()
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168 | : m_assembler(0)
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169 | {
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170 | }
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171 |
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172 | Jump(X86Assembler& assembler, X86Assembler::JmpSrc jmp)
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173 | : m_assembler(&assembler)
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174 | , m_jmp(jmp)
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175 | {
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176 | }
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177 |
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178 | void link()
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179 | {
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180 | ASSERT(m_assembler);
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181 | m_assembler->link(m_jmp, m_assembler->label());
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182 | }
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183 |
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184 | void linkTo(Label label)
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185 | {
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186 | ASSERT(m_assembler);
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187 | m_assembler->link(m_jmp, label.m_label);
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188 | }
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189 |
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190 | private:
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191 | X86Assembler* m_assembler;
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192 | X86Assembler::JmpSrc m_jmp;
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193 | };
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194 |
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195 | // JumpList:
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196 | //
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197 | // A JumpList is a set of Jump objects.
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198 | // All jumps in the set will be linked to the same destination.
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199 | class JumpList {
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200 | public:
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201 | void link()
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202 | {
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203 | size_t size = jumps.size();
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204 | for (size_t i = 0; i < size; ++i)
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205 | jumps[i].link();
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206 | jumps.clear();
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207 | }
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208 |
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209 | void linkTo(Label label)
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210 | {
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211 | size_t size = jumps.size();
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212 | for (size_t i = 0; i < size; ++i)
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213 | jumps[i].linkTo(label);
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214 | jumps.clear();
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215 | }
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216 |
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217 | void append(Jump jump)
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218 | {
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219 | jumps.append(jump);
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220 | }
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221 |
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222 | void append(JumpList& other)
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223 | {
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224 | jumps.append(other.jumps.begin(), other.jumps.size());
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225 | }
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226 |
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227 | private:
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228 | Vector<Jump> jumps;
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229 | };
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230 |
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231 | // Imm32:
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232 | //
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233 | // A 32bit immediate operand to an instruction - this is wrapped in a
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234 | // class requiring explicit construction in order to prevent RegisterIDs
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235 | // (which are implemented as an enum) from accidentally being passed as
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236 | // immediate values.
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237 | struct Imm32 {
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238 | explicit Imm32(int32_t value)
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239 | : m_value(value)
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240 | {
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241 | }
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242 |
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243 | int32_t m_value;
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244 | };
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245 |
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246 |
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247 | // Integer arithmetic operations:
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248 | //
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249 | // Operations are typically two operand - operation(source, srcDst)
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250 | // For many operations the source may be an Imm32, the srcDst operand
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251 | // may often be a memory location (explictly described using an Address
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252 | // object).
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253 |
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254 | void add32(Imm32 imm, RegisterID dest)
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255 | {
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256 | if (CAN_SIGN_EXTEND_8_32(imm.m_value))
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257 | m_assembler.addl_i8r(imm.m_value, dest);
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258 | else
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259 | m_assembler.addl_i32r(imm.m_value, dest);
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260 | }
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261 |
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262 | void add32(Address src, RegisterID dest)
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263 | {
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264 | m_assembler.addl_mr(src.offset, src.base, dest);
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265 | }
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266 |
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267 | void or32(Imm32 imm, RegisterID dest)
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268 | {
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269 | m_assembler.orl_i32r(imm.m_value, dest);
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270 | }
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271 |
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272 | void sub32(Imm32 imm, RegisterID dest)
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273 | {
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274 | if (CAN_SIGN_EXTEND_8_32(imm.m_value))
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275 | m_assembler.subl_i8r(imm.m_value, dest);
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276 | else
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277 | m_assembler.subl_i32r(imm.m_value, dest);
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278 | }
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279 |
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280 | void sub32(Address src, RegisterID dest)
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281 | {
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282 | m_assembler.subl_mr(src.offset, src.base, dest);
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283 | }
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284 |
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285 |
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286 | // Memory access operations:
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287 | //
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288 | // Loads are of the form load(address, destination) and stores of the form
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289 | // store(source, address). The source for a store may be an Imm32. Address
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290 | // operand objects to loads and store will be implicitly constructed if a
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291 | // register is passed.
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292 |
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293 | void loadPtr(ImplicitAddress address, RegisterID dest)
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294 | {
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295 | if (address.offset)
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296 | m_assembler.movl_mr(address.offset, address.base, dest);
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297 | else
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298 | m_assembler.movl_mr(address.base, dest);
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299 | }
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300 |
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301 | void load32(ImplicitAddress address, RegisterID dest)
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302 | {
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303 | if (address.offset)
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304 | m_assembler.movl_mr(address.offset, address.base, dest);
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305 | else
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306 | m_assembler.movl_mr(address.base, dest);
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307 | }
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308 |
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309 | void load16(BaseIndex address, RegisterID dest)
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310 | {
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311 | if (address.offset)
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312 | m_assembler.movzwl_mr(address.offset, address.base, address.index, address.scale, dest);
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313 | else
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314 | m_assembler.movzwl_mr(address.base, address.index, address.scale, dest);
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315 | }
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316 |
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317 | void storePtr(RegisterID src, ImplicitAddress address)
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318 | {
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319 | if (address.offset)
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320 | m_assembler.movl_rm(src, address.offset, address.base);
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321 | else
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322 | m_assembler.movl_rm(src, address.base);
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323 | }
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324 |
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325 | void store32(RegisterID src, ImplicitAddress address)
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326 | {
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327 | if (address.offset)
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328 | m_assembler.movl_rm(src, address.offset, address.base);
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329 | else
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330 | m_assembler.movl_rm(src, address.base);
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331 | }
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332 |
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333 | void store32(Imm32 imm, ImplicitAddress address)
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334 | {
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335 | // FIXME: add a version that doesn't take an offset
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336 | m_assembler.movl_i32m(imm.m_value, address.offset, address.base);
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337 | }
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338 |
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339 |
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340 | // Stack manipulation operations:
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341 | //
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342 | // The ABI is assumed to provide a stack abstraction to memory,
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343 | // containing machine word sized units of data. Push and pop
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344 | // operations add and remove a single register sized unit of data
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345 | // to or from the stack. Peek and poke operations read or write
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346 | // values on the stack, without moving the current stack position.
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347 |
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348 | void pop(RegisterID dest)
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349 | {
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350 | m_assembler.popl_r(dest);
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351 | }
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352 |
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353 | void push(RegisterID src)
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354 | {
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355 | m_assembler.pushl_r(src);
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356 | }
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357 |
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358 | void pop()
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359 | {
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360 | m_assembler.addl_i8r(sizeof(void*), X86::esp);
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361 | }
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362 |
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363 | void peek(RegisterID dest, int index = 0)
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364 | {
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365 | loadPtr(Address(X86::esp, (index * sizeof(void *))), dest);
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366 | }
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367 |
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368 | void poke(RegisterID src, int index = 0)
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369 | {
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370 | storePtr(src, Address(X86::esp, (index * sizeof(void *))));
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371 | }
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372 |
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373 |
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374 | // Register move operations:
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375 | //
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376 | // Move values in registers.
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377 |
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378 | void move(Imm32 imm, RegisterID dest)
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379 | {
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380 | if (!imm.m_value)
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381 | m_assembler.xorl_rr(dest, dest);
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382 | else
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383 | m_assembler.movl_i32r(imm.m_value, dest);
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384 | }
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385 |
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386 |
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387 | // Forwards / external control flow operations:
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388 | //
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389 | // This set of jump and conditional branch operations return a Jump
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390 | // object which may linked at a later point, allow forwards jump,
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391 | // or jumps that will require external linkage (after the code has been
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392 | // relocated).
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393 | //
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394 | // For branches, signed <, >, <= and >= are denoted as l, g, le, and ge
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395 | // respecitvely, for unsigned comparisons the names b, a, be, and ae are
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396 | // used (representing the names 'below' and 'above').
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397 | //
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398 | // Operands to the comparision are provided in the expected order, e.g.
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399 | // jle32(reg1, Imm32(5)) will branch if the value held in reg1, when
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400 | // treated as a signed 32bit value, is less than or equal to 5.
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401 |
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402 | private:
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403 | void compareImm32ForBranch(RegisterID left, int32_t right)
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404 | {
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405 | if (CAN_SIGN_EXTEND_8_32(right))
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406 | m_assembler.cmpl_i8r(right, left);
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407 | else
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408 | m_assembler.cmpl_i32r(right, left);
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409 | }
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410 |
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411 | void compareImm32ForBranchEquality(RegisterID reg, int32_t imm)
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412 | {
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413 | if (!imm)
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414 | m_assembler.testl_rr(reg, reg);
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415 | else if (CAN_SIGN_EXTEND_8_32(imm))
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416 | m_assembler.cmpl_i8r(imm, reg);
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417 | else
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418 | m_assembler.cmpl_i32r(imm, reg);
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419 | }
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420 |
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421 | public:
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422 | Jump jae32(RegisterID left, Imm32 right)
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423 | {
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424 | compareImm32ForBranch(left, right.m_value);
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425 | return Jump(m_assembler, m_assembler.jae());
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426 | }
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427 |
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428 | Jump je32(RegisterID op1, RegisterID op2)
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429 | {
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430 | m_assembler.cmpl_rr(op1, op2);
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431 | return Jump(m_assembler, m_assembler.je());
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432 | }
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433 |
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434 | Jump je32(RegisterID op1, Address op2)
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435 | {
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436 | m_assembler.cmpl_rm(op1, op2.offset, op2.base);
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437 | return Jump(m_assembler, m_assembler.je());
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438 | }
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439 |
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440 | Jump je32(Imm32 imm, RegisterID reg)
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441 | {
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442 | compareImm32ForBranchEquality(reg, imm.m_value);
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443 | return Jump(m_assembler, m_assembler.je());
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444 | }
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445 |
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446 | Jump je16(RegisterID op1, BaseIndex op2)
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447 | {
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448 | if (op2.offset)
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449 | m_assembler.cmpw_rm(op1, op2.base, op2.index, op2.scale);
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450 | else
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451 | m_assembler.cmpw_rm(op1, op2.offset, op2.base, op2.index, op2.scale);
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452 |
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453 | return Jump(m_assembler, m_assembler.je());
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454 | }
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455 |
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456 | Jump jg32(RegisterID left, RegisterID right)
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457 | {
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458 | m_assembler.cmpl_rr(right, left);
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459 | return Jump(m_assembler, m_assembler.jg());
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460 | }
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461 |
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462 | Jump jge32(RegisterID left, Imm32 right)
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463 | {
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464 | compareImm32ForBranch(left, right.m_value);
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465 | return Jump(m_assembler, m_assembler.jge());
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466 | }
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467 |
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468 | Jump jl32(RegisterID left, Imm32 right)
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469 | {
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470 | compareImm32ForBranch(left, right.m_value);
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471 | return Jump(m_assembler, m_assembler.jl());
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472 | }
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473 |
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474 | Jump jle32(RegisterID left, RegisterID right)
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475 | {
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476 | m_assembler.cmpl_rr(right, left);
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477 | return Jump(m_assembler, m_assembler.jle());
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478 | }
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479 |
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480 | Jump jle32(RegisterID left, Imm32 right)
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481 | {
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482 | compareImm32ForBranch(left, right.m_value);
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483 | return Jump(m_assembler, m_assembler.jle());
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---|
484 | }
|
---|
485 |
|
---|
486 | Jump jne32(RegisterID op1, RegisterID op2)
|
---|
487 | {
|
---|
488 | m_assembler.cmpl_rr(op1, op2);
|
---|
489 | return Jump(m_assembler, m_assembler.jne());
|
---|
490 | }
|
---|
491 |
|
---|
492 | Jump jne32(Imm32 imm, RegisterID reg)
|
---|
493 | {
|
---|
494 | compareImm32ForBranchEquality(reg, imm.m_value);
|
---|
495 | return Jump(m_assembler, m_assembler.jne());
|
---|
496 | }
|
---|
497 |
|
---|
498 | Jump jump()
|
---|
499 | {
|
---|
500 | return Jump(m_assembler, m_assembler.jmp());
|
---|
501 | }
|
---|
502 |
|
---|
503 |
|
---|
504 | // Backwards, local control flow operations:
|
---|
505 | //
|
---|
506 | // These operations provide a shorter notation for local
|
---|
507 | // backwards branches, which may be both more convenient
|
---|
508 | // for the user, and for the programmer, and for the
|
---|
509 | // assembler (allowing shorter values to be used in
|
---|
510 | // relative offsets).
|
---|
511 | //
|
---|
512 | // The code sequence:
|
---|
513 | //
|
---|
514 | // Label topOfLoop(this);
|
---|
515 | // // ...
|
---|
516 | // jne32(reg1, reg2, topOfLoop);
|
---|
517 | //
|
---|
518 | // Is equivalent to the longer, potentially less efficient form:
|
---|
519 | //
|
---|
520 | // Label topOfLoop(this);
|
---|
521 | // // ...
|
---|
522 | // jne32(reg1, reg2).linkTo(topOfLoop);
|
---|
523 |
|
---|
524 | void je32(Imm32 imm, RegisterID op2, Label target)
|
---|
525 | {
|
---|
526 | je32(imm, op2).linkTo(target);
|
---|
527 | }
|
---|
528 |
|
---|
529 | void je16(RegisterID op1, BaseIndex op2, Label target)
|
---|
530 | {
|
---|
531 | je16(op1, op2).linkTo(target);
|
---|
532 | }
|
---|
533 |
|
---|
534 | void jl32(RegisterID left, Imm32 right, Label target)
|
---|
535 | {
|
---|
536 | jl32(left, right).linkTo(target);
|
---|
537 | }
|
---|
538 |
|
---|
539 | void jle32(RegisterID left, RegisterID right, Label target)
|
---|
540 | {
|
---|
541 | jle32(left, right).linkTo(target);
|
---|
542 | }
|
---|
543 |
|
---|
544 | void jne32(RegisterID op1, RegisterID op2, Label target)
|
---|
545 | {
|
---|
546 | jne32(op1, op2).linkTo(target);
|
---|
547 | }
|
---|
548 |
|
---|
549 | void jne32(Imm32 imm, RegisterID op2, Label target)
|
---|
550 | {
|
---|
551 | jne32(imm, op2).linkTo(target);
|
---|
552 | }
|
---|
553 |
|
---|
554 | void jump(Label target)
|
---|
555 | {
|
---|
556 | m_assembler.link(m_assembler.jmp(), target.m_label);
|
---|
557 | }
|
---|
558 |
|
---|
559 |
|
---|
560 | // Miscellaneous operations:
|
---|
561 |
|
---|
562 | void breakpoint()
|
---|
563 | {
|
---|
564 | m_assembler.int3();
|
---|
565 | }
|
---|
566 |
|
---|
567 | void ret()
|
---|
568 | {
|
---|
569 | m_assembler.ret();
|
---|
570 | }
|
---|
571 | };
|
---|
572 |
|
---|
573 | } // namespace JSC
|
---|
574 |
|
---|
575 | #endif // ENABLE(ASSEMBLER)
|
---|
576 |
|
---|
577 | #endif // MacroAssembler_h
|
---|