| 1 | /*
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| 2 | * Copyright (C) 2009 University of Szeged
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | * 1. Redistributions of source code must retain the above copyright
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| 9 | * notice, this list of conditions and the following disclaimer.
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| 10 | * 2. Redistributions in binary form must reproduce the above copyright
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| 11 | * notice, this list of conditions and the following disclaimer in the
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| 12 | * documentation and/or other materials provided with the distribution.
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| 13 | *
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| 14 | * THIS SOFTWARE IS PROVIDED BY UNIVERSITY OF SZEGED ``AS IS'' AND ANY
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| 15 | * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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| 16 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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| 17 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL UNIVERSITY OF SZEGED OR
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| 18 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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| 19 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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| 20 | * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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| 21 | * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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| 22 | * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 23 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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| 24 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 25 | */
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| 26 |
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| 27 | #include "config.h"
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| 28 |
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| 29 | #if ENABLE(ASSEMBLER) && CPU(ARM_TRADITIONAL)
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| 30 |
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| 31 | #include "MacroAssemblerARM.h"
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| 32 |
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| 33 | #if OS(LINUX)
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| 34 | #include <sys/types.h>
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| 35 | #include <sys/stat.h>
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| 36 | #include <fcntl.h>
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| 37 | #include <unistd.h>
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| 38 | #include <elf.h>
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| 39 | #include <asm/hwcap.h>
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| 40 | #endif
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| 41 |
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| 42 | namespace JSC {
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| 43 |
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| 44 | static bool isVFPPresent()
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| 45 | {
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| 46 | #if OS(LINUX)
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| 47 | int fd = open("/proc/self/auxv", O_RDONLY);
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| 48 | if (fd > 0) {
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| 49 | Elf32_auxv_t aux;
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| 50 | while (read(fd, &aux, sizeof(Elf32_auxv_t))) {
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| 51 | if (aux.a_type == AT_HWCAP) {
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| 52 | close(fd);
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| 53 | return aux.a_un.a_val & HWCAP_VFP;
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| 54 | }
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| 55 | }
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| 56 | close(fd);
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| 57 | }
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| 58 | #endif
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| 59 |
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| 60 | return false;
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| 61 | }
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| 62 |
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| 63 | const bool MacroAssemblerARM::s_isVFPPresent = isVFPPresent();
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| 64 |
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| 65 | #if CPU(ARMV5_OR_LOWER)
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| 66 | /* On ARMv5 and below, natural alignment is required. */
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| 67 | void MacroAssemblerARM::load32WithUnalignedHalfWords(BaseIndex address, RegisterID dest)
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| 68 | {
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| 69 | ARMWord op2;
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| 70 |
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| 71 | ASSERT(address.scale >= 0 && address.scale <= 3);
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| 72 | op2 = m_assembler.lsl(address.index, static_cast<int>(address.scale));
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| 73 |
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| 74 | if (address.offset >= 0 && address.offset + 0x2 <= 0xff) {
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| 75 | m_assembler.add_r(ARMRegisters::S0, address.base, op2);
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| 76 | m_assembler.ldrh_u(dest, ARMRegisters::S0, ARMAssembler::getOp2Byte(address.offset));
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| 77 | m_assembler.ldrh_u(ARMRegisters::S0, ARMRegisters::S0, ARMAssembler::getOp2Byte(address.offset + 0x2));
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| 78 | } else if (address.offset < 0 && address.offset >= -0xff) {
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| 79 | m_assembler.add_r(ARMRegisters::S0, address.base, op2);
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| 80 | m_assembler.ldrh_d(dest, ARMRegisters::S0, ARMAssembler::getOp2Byte(-address.offset));
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| 81 | m_assembler.ldrh_d(ARMRegisters::S0, ARMRegisters::S0, ARMAssembler::getOp2Byte(-address.offset - 0x2));
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| 82 | } else {
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| 83 | m_assembler.ldr_un_imm(ARMRegisters::S0, address.offset);
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| 84 | m_assembler.add_r(ARMRegisters::S0, ARMRegisters::S0, op2);
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| 85 | m_assembler.ldrh_r(dest, address.base, ARMRegisters::S0);
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| 86 | m_assembler.add_r(ARMRegisters::S0, ARMRegisters::S0, ARMAssembler::OP2_IMM | 0x2);
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| 87 | m_assembler.ldrh_r(ARMRegisters::S0, address.base, ARMRegisters::S0);
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| 88 | }
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| 89 | m_assembler.orr_r(dest, dest, m_assembler.lsl(ARMRegisters::S0, 16));
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| 90 | }
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| 91 | #endif
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| 92 |
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| 93 | }
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| 94 |
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| 95 | #endif // ENABLE(ASSEMBLER) && CPU(ARM_TRADITIONAL)
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