1 | /*
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2 | * Copyright (C) 2008 Apple Inc. All rights reserved.
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3 | *
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4 | * Redistribution and use in source and binary forms, with or without
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5 | * modification, are permitted provided that the following conditions
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6 | * are met:
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7 | * 1. Redistributions of source code must retain the above copyright
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8 | * notice, this list of conditions and the following disclaimer.
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9 | * 2. Redistributions in binary form must reproduce the above copyright
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10 | * notice, this list of conditions and the following disclaimer in the
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11 | * documentation and/or other materials provided with the distribution.
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12 | *
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13 | * THIS SOFTWARE IS PROVIDED BY APPLE INC. ``AS IS'' AND ANY
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14 | * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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15 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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16 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL APPLE INC. OR
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17 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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18 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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19 | * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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20 | * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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21 | * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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22 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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23 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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24 | */
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25 |
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26 | #ifndef X86Assembler_h
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27 | #define X86Assembler_h
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28 |
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29 | #include <wtf/Platform.h>
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30 |
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31 | #if ENABLE(ASSEMBLER) && PLATFORM(X86)
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32 |
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33 | #include "AssemblerBuffer.h"
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34 | #include <stdint.h>
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35 | #include <wtf/Assertions.h>
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36 | #include <wtf/Vector.h>
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37 |
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38 | namespace JSC {
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39 |
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40 | #define MODRM(type, reg, rm) ((type << 6) | (reg << 3) | (rm))
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41 | #define SIB(type, reg, rm) MODRM(type, reg, rm)
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42 | #define CAN_SIGN_EXTEND_8_32(value) (value == ((int)(signed char)value))
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43 |
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44 | namespace X86 {
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45 | typedef enum {
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46 | eax,
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47 | ecx,
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48 | edx,
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49 | ebx,
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50 | esp,
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51 | ebp,
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52 | esi,
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53 | edi,
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54 |
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55 | noBase = ebp,
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56 | hasSib = esp,
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57 | noScale = esp,
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58 | } RegisterID;
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59 |
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60 | typedef enum {
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61 | xmm0,
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62 | xmm1,
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63 | xmm2,
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64 | xmm3,
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65 | xmm4,
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66 | xmm5,
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67 | xmm6,
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68 | xmm7,
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69 | } XMMRegisterID;
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70 | }
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71 |
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72 | class X86Assembler {
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73 | public:
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74 | typedef X86::RegisterID RegisterID;
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75 | typedef X86::XMMRegisterID XMMRegisterID;
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76 |
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77 | typedef enum {
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78 | OP_ADD_EvGv = 0x01,
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79 | OP_ADD_GvEv = 0x03,
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80 | OP_OR_EvGv = 0x09,
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81 | OP_OR_GvEv = 0x0B,
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82 | OP_2BYTE_ESCAPE = 0x0F,
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83 | OP_AND_EvGv = 0x21,
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84 | OP_SUB_EvGv = 0x29,
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85 | OP_SUB_GvEv = 0x2B,
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86 | PRE_PREDICT_BRANCH_NOT_TAKEN = 0x2E,
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87 | OP_XOR_EvGv = 0x31,
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88 | OP_CMP_EvGv = 0x39,
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89 | OP_CMP_GvEv = 0x3B,
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90 | OP_PUSH_EAX = 0x50,
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91 | OP_POP_EAX = 0x58,
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92 | PRE_OPERAND_SIZE = 0x66,
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93 | PRE_SSE_66 = 0x66,
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94 | OP_PUSH_Iz = 0x68,
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95 | OP_IMUL_GvEvIz = 0x69,
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96 | OP_GROUP1_EvIz = 0x81,
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97 | OP_GROUP1_EvIb = 0x83,
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98 | OP_TEST_EvGv = 0x85,
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99 | OP_MOV_EvGv = 0x89,
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100 | OP_MOV_GvEv = 0x8B,
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101 | OP_LEA = 0x8D,
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102 | OP_GROUP1A_Ev = 0x8F,
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103 | OP_CDQ = 0x99,
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104 | OP_SETE = 0x94,
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105 | OP_SETNE = 0x95,
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106 | OP_GROUP2_EvIb = 0xC1,
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107 | OP_RET = 0xC3,
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108 | OP_GROUP11_EvIz = 0xC7,
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109 | OP_INT3 = 0xCC,
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110 | OP_GROUP2_Ev1 = 0xD1,
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111 | OP_GROUP2_EvCL = 0xD3,
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112 | OP_CALL_rel32 = 0xE8,
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113 | OP_JMP_rel32 = 0xE9,
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114 | PRE_SSE_F2 = 0xF2,
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115 | OP_HLT = 0xF4,
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116 | OP_GROUP3_Ev = 0xF7,
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117 | OP_GROUP3_EvIz = 0xF7, // OP_GROUP3_Ev has an immediate, when instruction is a test.
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118 | OP_GROUP5_Ev = 0xFF,
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119 |
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120 | OP2_MOVSD_VsdWsd = 0x10,
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121 | OP2_MOVSD_WsdVsd = 0x11,
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122 | OP2_CVTSI2SD_VsdEd = 0x2A,
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123 | OP2_CVTTSD2SI_GdWsd = 0x2C,
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124 | OP2_UCOMISD_VsdWsd = 0x2E,
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125 | OP2_XORPD_VsdWsd = 0x57,
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126 | OP2_ADDSD_VsdWsd = 0x58,
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127 | OP2_MULSD_VsdWsd = 0x59,
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128 | OP2_SUBSD_VsdWsd = 0x5C,
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129 | OP2_MOVD_EdVd = 0x7E,
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130 | OP2_JO_rel32 = 0x80,
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131 | OP2_JB_rel32 = 0x82,
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132 | OP2_JAE_rel32 = 0x83,
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133 | OP2_JE_rel32 = 0x84,
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134 | OP2_JNE_rel32 = 0x85,
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135 | OP2_JBE_rel32 = 0x86,
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136 | OP2_JA_rel32 = 0x87,
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137 | OP2_JS_rel32 = 0x88,
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138 | OP2_JP_rel32 = 0x8A,
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139 | OP2_JL_rel32 = 0x8C,
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140 | OP2_JGE_rel32 = 0x8D,
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141 | OP2_JLE_rel32 = 0x8E,
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142 | OP2_JG_rel32 = 0x8F,
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143 | OP2_IMUL_GvEv = 0xAF,
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144 | OP2_MOVZX_GvEb = 0xB6,
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145 | OP2_MOVZX_GvEw = 0xB7,
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146 | OP2_PEXTRW_GdUdIb = 0xC5,
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147 |
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148 | GROUP1_OP_ADD = 0,
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149 | GROUP1_OP_OR = 1,
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150 | GROUP1_OP_AND = 4,
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151 | GROUP1_OP_SUB = 5,
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152 | GROUP1_OP_XOR = 6,
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153 | GROUP1_OP_CMP = 7,
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154 |
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155 | GROUP1A_OP_POP = 0,
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156 |
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157 | GROUP2_OP_SHL = 4,
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158 | GROUP2_OP_SAR = 7,
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159 |
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160 | GROUP3_OP_TEST = 0,
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161 | GROUP3_OP_NEG = 3,
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162 | GROUP3_OP_IDIV = 7,
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163 |
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164 | GROUP5_OP_CALLN = 2,
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165 | GROUP5_OP_JMPN = 4,
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166 | GROUP5_OP_PUSH = 6,
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167 |
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168 | GROUP11_MOV = 0,
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169 | } OpcodeID;
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170 |
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171 | // Opaque label types
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172 |
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173 | class JmpSrc {
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174 | friend class X86Assembler;
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175 | public:
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176 | JmpSrc()
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177 | : m_offset(-1)
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178 | {
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179 | }
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180 |
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181 | private:
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182 | JmpSrc(int offset)
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183 | : m_offset(offset)
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184 | {
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185 | }
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186 |
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187 | int m_offset;
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188 | };
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189 |
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190 | class JmpDst {
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191 | friend class X86Assembler;
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192 | public:
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193 | JmpDst()
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194 | : m_offset(-1)
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195 | {
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196 | }
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197 |
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198 | private:
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199 | JmpDst(int offset)
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200 | : m_offset(offset)
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201 | {
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202 | }
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203 |
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204 | int m_offset;
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205 | };
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206 |
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207 | static const int maxInstructionSize = 16;
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208 |
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209 | X86Assembler(AssemblerBuffer* m_buffer)
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210 | : m_buffer(m_buffer)
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211 | {
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212 | m_buffer->reset();
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213 | }
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214 |
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215 | void int3()
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216 | {
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217 | m_buffer->putByte(OP_INT3);
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218 | }
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219 |
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220 | void pushl_r(RegisterID reg)
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221 | {
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222 | m_buffer->putByte(OP_PUSH_EAX + reg);
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223 | }
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224 |
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225 | void pushl_m(int offset, RegisterID base)
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226 | {
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227 | m_buffer->putByte(OP_GROUP5_Ev);
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228 | modRm_opm(GROUP5_OP_PUSH, base, offset);
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229 | }
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230 |
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231 | void pushl_i32(int imm)
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232 | {
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233 | m_buffer->putByte(OP_PUSH_Iz);
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234 | m_buffer->putInt(imm);
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235 | }
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236 |
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237 | void popl_r(RegisterID reg)
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238 | {
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239 | m_buffer->putByte(OP_POP_EAX + reg);
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240 | }
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241 |
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242 | void popl_m(int offset, RegisterID base)
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243 | {
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244 | m_buffer->putByte(OP_GROUP1A_Ev);
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245 | modRm_opm(GROUP1A_OP_POP, base, offset);
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246 | }
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247 |
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248 | void movl_rr(RegisterID src, RegisterID dst)
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249 | {
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250 | m_buffer->putByte(OP_MOV_EvGv);
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251 | modRm_rr(src, dst);
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252 | }
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253 |
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254 | void addl_rr(RegisterID src, RegisterID dst)
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255 | {
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256 | m_buffer->putByte(OP_ADD_EvGv);
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257 | modRm_rr(src, dst);
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258 | }
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259 |
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260 | void addl_i8r(int imm, RegisterID dst)
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261 | {
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262 | m_buffer->putByte(OP_GROUP1_EvIb);
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263 | modRm_opr(GROUP1_OP_ADD, dst);
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264 | m_buffer->putByte(imm);
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265 | }
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266 |
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267 | void addl_i8m(int imm, void* addr)
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268 | {
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269 | m_buffer->putByte(OP_GROUP1_EvIb);
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270 | modRm_opm(GROUP1_OP_ADD, addr);
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271 | m_buffer->putByte(imm);
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272 | }
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273 |
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274 | void addl_i32r(int imm, RegisterID dst)
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275 | {
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276 | m_buffer->putByte(OP_GROUP1_EvIz);
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277 | modRm_opr(GROUP1_OP_ADD, dst);
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278 | m_buffer->putInt(imm);
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279 | }
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280 |
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281 | void addl_mr(int offset, RegisterID base, RegisterID dst)
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282 | {
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283 | m_buffer->putByte(OP_ADD_GvEv);
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284 | modRm_rm(dst, base, offset);
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285 | }
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286 |
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287 | void andl_rr(RegisterID src, RegisterID dst)
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288 | {
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289 | m_buffer->putByte(OP_AND_EvGv);
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290 | modRm_rr(src, dst);
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291 | }
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292 |
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293 | void andl_i32r(int imm, RegisterID dst)
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294 | {
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295 | m_buffer->putByte(OP_GROUP1_EvIz);
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296 | modRm_opr(GROUP1_OP_AND, dst);
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297 | m_buffer->putInt(imm);
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298 | }
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299 |
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300 | void cmpl_i8r(int imm, RegisterID dst)
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301 | {
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302 | m_buffer->putByte(OP_GROUP1_EvIb);
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303 | modRm_opr(GROUP1_OP_CMP, dst);
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304 | m_buffer->putByte(imm);
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305 | }
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306 |
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307 | void cmpl_rr(RegisterID src, RegisterID dst)
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308 | {
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309 | m_buffer->putByte(OP_CMP_EvGv);
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310 | modRm_rr(src, dst);
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311 | }
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312 |
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313 | void cmpl_rm(RegisterID src, int offset, RegisterID base)
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314 | {
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315 | m_buffer->putByte(OP_CMP_EvGv);
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316 | modRm_rm(src, base, offset);
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317 | }
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318 |
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319 | void cmpl_mr(int offset, RegisterID base, RegisterID dst)
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320 | {
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321 | m_buffer->putByte(OP_CMP_GvEv);
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322 | modRm_rm(dst, base, offset);
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323 | }
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324 |
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325 | void cmpl_i32r(int imm, RegisterID dst)
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326 | {
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327 | m_buffer->putByte(OP_GROUP1_EvIz);
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328 | modRm_opr(GROUP1_OP_CMP, dst);
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329 | m_buffer->putInt(imm);
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330 | }
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331 |
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332 | void cmpl_i32m(int imm, RegisterID dst)
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333 | {
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334 | m_buffer->putByte(OP_GROUP1_EvIz);
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335 | modRm_opm(GROUP1_OP_CMP, dst);
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336 | m_buffer->putInt(imm);
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337 | }
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338 |
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339 | void cmpl_i32m(int imm, int offset, RegisterID dst)
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340 | {
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341 | m_buffer->putByte(OP_GROUP1_EvIz);
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342 | modRm_opm(GROUP1_OP_CMP, dst, offset);
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343 | m_buffer->putInt(imm);
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344 | }
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345 |
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346 | void cmpl_i32m(int imm, void* addr)
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347 | {
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348 | m_buffer->putByte(OP_GROUP1_EvIz);
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349 | modRm_opm(GROUP1_OP_CMP, addr);
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350 | m_buffer->putInt(imm);
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351 | }
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352 |
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353 | void cmpl_i8m(int imm, int offset, RegisterID base, RegisterID index, int scale)
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354 | {
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355 | m_buffer->putByte(OP_GROUP1_EvIb);
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356 | modRm_opmsib(GROUP1_OP_CMP, base, index, scale, offset);
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357 | m_buffer->putByte(imm);
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358 | }
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359 |
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360 | void cmpw_rm(RegisterID src, RegisterID base, RegisterID index, int scale)
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361 | {
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362 | m_buffer->putByte(PRE_OPERAND_SIZE);
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363 | m_buffer->putByte(OP_CMP_EvGv);
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364 | modRm_rmsib(src, base, index, scale);
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365 | }
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366 |
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367 | void cmpw_rm(RegisterID src, int offset, RegisterID base, RegisterID index, int scale)
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368 | {
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369 | m_buffer->putByte(PRE_OPERAND_SIZE);
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370 | m_buffer->putByte(OP_CMP_EvGv);
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371 | modRm_rmsib(src, base, index, scale, offset);
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372 | }
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373 |
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374 | void sete_r(RegisterID dst)
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375 | {
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376 | m_buffer->putByte(OP_2BYTE_ESCAPE);
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377 | m_buffer->putByte(OP_SETE);
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378 | m_buffer->putByte(MODRM(3, 0, dst));
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379 | }
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380 |
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381 | void setz_r(RegisterID dst)
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382 | {
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383 | sete_r(dst);
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384 | }
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385 |
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386 | void setne_r(RegisterID dst)
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387 | {
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388 | m_buffer->putByte(OP_2BYTE_ESCAPE);
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389 | m_buffer->putByte(OP_SETNE);
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390 | m_buffer->putByte(MODRM(3, 0, dst));
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391 | }
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392 |
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393 | void setnz_r(RegisterID dst)
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394 | {
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395 | setne_r(dst);
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396 | }
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397 |
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398 | void orl_rr(RegisterID src, RegisterID dst)
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399 | {
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400 | m_buffer->putByte(OP_OR_EvGv);
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401 | modRm_rr(src, dst);
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402 | }
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403 |
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404 | void orl_mr(int offset, RegisterID base, RegisterID dst)
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405 | {
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406 | m_buffer->putByte(OP_OR_GvEv);
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407 | modRm_rm(dst, base, offset);
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408 | }
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409 |
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410 | void orl_i32r(int imm, RegisterID dst)
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411 | {
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412 | m_buffer->putByte(OP_GROUP1_EvIb);
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413 | modRm_opr(GROUP1_OP_OR, dst);
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414 | m_buffer->putByte(imm);
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415 | }
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416 |
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417 | void subl_rr(RegisterID src, RegisterID dst)
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418 | {
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419 | m_buffer->putByte(OP_SUB_EvGv);
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420 | modRm_rr(src, dst);
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421 | }
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422 |
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423 | void subl_i8r(int imm, RegisterID dst)
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424 | {
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425 | m_buffer->putByte(OP_GROUP1_EvIb);
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426 | modRm_opr(GROUP1_OP_SUB, dst);
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427 | m_buffer->putByte(imm);
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428 | }
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429 |
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430 | void subl_i8m(int imm, void* addr)
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431 | {
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432 | m_buffer->putByte(OP_GROUP1_EvIb);
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433 | modRm_opm(GROUP1_OP_SUB, addr);
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434 | m_buffer->putByte(imm);
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435 | }
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436 |
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437 | void subl_i32r(int imm, RegisterID dst)
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438 | {
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439 | m_buffer->putByte(OP_GROUP1_EvIz);
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440 | modRm_opr(GROUP1_OP_SUB, dst);
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441 | m_buffer->putInt(imm);
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442 | }
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443 |
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444 | void subl_mr(int offset, RegisterID base, RegisterID dst)
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445 | {
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446 | m_buffer->putByte(OP_SUB_GvEv);
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447 | modRm_rm(dst, base, offset);
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448 | }
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449 |
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450 | void testl_i32r(int imm, RegisterID dst)
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451 | {
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452 | m_buffer->ensureSpace(maxInstructionSize);
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453 | m_buffer->putByteUnchecked(OP_GROUP3_EvIz);
|
---|
454 | modRm_opr_Unchecked(GROUP3_OP_TEST, dst);
|
---|
455 | m_buffer->putIntUnchecked(imm);
|
---|
456 | }
|
---|
457 |
|
---|
458 | void testl_i32m(int imm, RegisterID dst)
|
---|
459 | {
|
---|
460 | m_buffer->putByte(OP_GROUP3_EvIz);
|
---|
461 | modRm_opm(GROUP3_OP_TEST, dst);
|
---|
462 | m_buffer->putInt(imm);
|
---|
463 | }
|
---|
464 |
|
---|
465 | void testl_i32m(int imm, int offset, RegisterID dst)
|
---|
466 | {
|
---|
467 | m_buffer->putByte(OP_GROUP3_EvIz);
|
---|
468 | modRm_opm(GROUP3_OP_TEST, dst, offset);
|
---|
469 | m_buffer->putInt(imm);
|
---|
470 | }
|
---|
471 |
|
---|
472 | void testl_rr(RegisterID src, RegisterID dst)
|
---|
473 | {
|
---|
474 | m_buffer->putByte(OP_TEST_EvGv);
|
---|
475 | modRm_rr(src, dst);
|
---|
476 | }
|
---|
477 |
|
---|
478 | void xorl_i8r(int imm, RegisterID dst)
|
---|
479 | {
|
---|
480 | m_buffer->putByte(OP_GROUP1_EvIb);
|
---|
481 | modRm_opr(GROUP1_OP_XOR, dst);
|
---|
482 | m_buffer->putByte(imm);
|
---|
483 | }
|
---|
484 |
|
---|
485 | void xorl_rr(RegisterID src, RegisterID dst)
|
---|
486 | {
|
---|
487 | m_buffer->putByte(OP_XOR_EvGv);
|
---|
488 | modRm_rr(src, dst);
|
---|
489 | }
|
---|
490 |
|
---|
491 | void sarl_i8r(int imm, RegisterID dst)
|
---|
492 | {
|
---|
493 | if (imm == 1) {
|
---|
494 | m_buffer->putByte(OP_GROUP2_Ev1);
|
---|
495 | modRm_opr(GROUP2_OP_SAR, dst);
|
---|
496 | } else {
|
---|
497 | m_buffer->putByte(OP_GROUP2_EvIb);
|
---|
498 | modRm_opr(GROUP2_OP_SAR, dst);
|
---|
499 | m_buffer->putByte(imm);
|
---|
500 | }
|
---|
501 | }
|
---|
502 |
|
---|
503 | void sarl_CLr(RegisterID dst)
|
---|
504 | {
|
---|
505 | m_buffer->putByte(OP_GROUP2_EvCL);
|
---|
506 | modRm_opr(GROUP2_OP_SAR, dst);
|
---|
507 | }
|
---|
508 |
|
---|
509 | void shl_i8r(int imm, RegisterID dst)
|
---|
510 | {
|
---|
511 | if (imm == 1) {
|
---|
512 | m_buffer->putByte(OP_GROUP2_Ev1);
|
---|
513 | modRm_opr(GROUP2_OP_SHL, dst);
|
---|
514 | } else {
|
---|
515 | m_buffer->putByte(OP_GROUP2_EvIb);
|
---|
516 | modRm_opr(GROUP2_OP_SHL, dst);
|
---|
517 | m_buffer->putByte(imm);
|
---|
518 | }
|
---|
519 | }
|
---|
520 |
|
---|
521 | void shll_CLr(RegisterID dst)
|
---|
522 | {
|
---|
523 | m_buffer->putByte(OP_GROUP2_EvCL);
|
---|
524 | modRm_opr(GROUP2_OP_SHL, dst);
|
---|
525 | }
|
---|
526 |
|
---|
527 | void imull_rr(RegisterID src, RegisterID dst)
|
---|
528 | {
|
---|
529 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
530 | m_buffer->putByte(OP2_IMUL_GvEv);
|
---|
531 | modRm_rr(dst, src);
|
---|
532 | }
|
---|
533 |
|
---|
534 | void imull_i32r(RegisterID src, int32_t value, RegisterID dst)
|
---|
535 | {
|
---|
536 | m_buffer->putByte(OP_IMUL_GvEvIz);
|
---|
537 | modRm_rr(dst, src);
|
---|
538 | m_buffer->putInt(value);
|
---|
539 | }
|
---|
540 |
|
---|
541 | void idivl_r(RegisterID dst)
|
---|
542 | {
|
---|
543 | m_buffer->putByte(OP_GROUP3_Ev);
|
---|
544 | modRm_opr(GROUP3_OP_IDIV, dst);
|
---|
545 | }
|
---|
546 |
|
---|
547 | void negl_r(RegisterID dst)
|
---|
548 | {
|
---|
549 | m_buffer->putByte(OP_GROUP3_Ev);
|
---|
550 | modRm_opr(GROUP3_OP_NEG, dst);
|
---|
551 | }
|
---|
552 |
|
---|
553 | void cdq()
|
---|
554 | {
|
---|
555 | m_buffer->putByte(OP_CDQ);
|
---|
556 | }
|
---|
557 |
|
---|
558 | void movl_mr(RegisterID base, RegisterID dst)
|
---|
559 | {
|
---|
560 | m_buffer->putByte(OP_MOV_GvEv);
|
---|
561 | modRm_rm(dst, base);
|
---|
562 | }
|
---|
563 |
|
---|
564 | void movl_mr(int offset, RegisterID base, RegisterID dst)
|
---|
565 | {
|
---|
566 | m_buffer->ensureSpace(maxInstructionSize);
|
---|
567 | m_buffer->putByteUnchecked(OP_MOV_GvEv);
|
---|
568 | modRm_rm_Unchecked(dst, base, offset);
|
---|
569 | }
|
---|
570 |
|
---|
571 | void movl_mr(void* addr, RegisterID dst)
|
---|
572 | {
|
---|
573 | m_buffer->putByte(OP_MOV_GvEv);
|
---|
574 | modRm_rm(dst, addr);
|
---|
575 | }
|
---|
576 |
|
---|
577 | void movl_mr(int offset, RegisterID base, RegisterID index, int scale, RegisterID dst)
|
---|
578 | {
|
---|
579 | m_buffer->putByte(OP_MOV_GvEv);
|
---|
580 | modRm_rmsib(dst, base, index, scale, offset);
|
---|
581 | }
|
---|
582 |
|
---|
583 | void movzbl_rr(RegisterID src, RegisterID dst)
|
---|
584 | {
|
---|
585 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
586 | m_buffer->putByte(OP2_MOVZX_GvEb);
|
---|
587 | modRm_rr(dst, src);
|
---|
588 | }
|
---|
589 |
|
---|
590 | void movzwl_mr(int offset, RegisterID base, RegisterID dst)
|
---|
591 | {
|
---|
592 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
593 | m_buffer->putByte(OP2_MOVZX_GvEw);
|
---|
594 | modRm_rm(dst, base, offset);
|
---|
595 | }
|
---|
596 |
|
---|
597 | void movzwl_mr(RegisterID base, RegisterID index, int scale, RegisterID dst)
|
---|
598 | {
|
---|
599 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
600 | m_buffer->putByte(OP2_MOVZX_GvEw);
|
---|
601 | modRm_rmsib(dst, base, index, scale);
|
---|
602 | }
|
---|
603 |
|
---|
604 | void movzwl_mr(int offset, RegisterID base, RegisterID index, int scale, RegisterID dst)
|
---|
605 | {
|
---|
606 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
607 | m_buffer->putByte(OP2_MOVZX_GvEw);
|
---|
608 | modRm_rmsib(dst, base, index, scale, offset);
|
---|
609 | }
|
---|
610 |
|
---|
611 | void movl_rm(RegisterID src, RegisterID base)
|
---|
612 | {
|
---|
613 | m_buffer->putByte(OP_MOV_EvGv);
|
---|
614 | modRm_rm(src, base);
|
---|
615 | }
|
---|
616 |
|
---|
617 | void movl_rm(RegisterID src, int offset, RegisterID base)
|
---|
618 | {
|
---|
619 | m_buffer->ensureSpace(maxInstructionSize);
|
---|
620 | m_buffer->putByteUnchecked(OP_MOV_EvGv);
|
---|
621 | modRm_rm_Unchecked(src, base, offset);
|
---|
622 | }
|
---|
623 |
|
---|
624 | void movl_rm(RegisterID src, int offset, RegisterID base, RegisterID index, int scale)
|
---|
625 | {
|
---|
626 | m_buffer->putByte(OP_MOV_EvGv);
|
---|
627 | modRm_rmsib(src, base, index, scale, offset);
|
---|
628 | }
|
---|
629 |
|
---|
630 | void movl_i32r(int imm, RegisterID dst)
|
---|
631 | {
|
---|
632 | m_buffer->putByte(OP_GROUP11_EvIz);
|
---|
633 | modRm_opr(GROUP11_MOV, dst);
|
---|
634 | m_buffer->putInt(imm);
|
---|
635 | }
|
---|
636 |
|
---|
637 | void movl_i32m(int imm, int offset, RegisterID base)
|
---|
638 | {
|
---|
639 | m_buffer->ensureSpace(maxInstructionSize);
|
---|
640 | m_buffer->putByteUnchecked(OP_GROUP11_EvIz);
|
---|
641 | modRm_opm_Unchecked(GROUP11_MOV, base, offset);
|
---|
642 | m_buffer->putIntUnchecked(imm);
|
---|
643 | }
|
---|
644 |
|
---|
645 | void movl_i32m(int imm, void* addr)
|
---|
646 | {
|
---|
647 | m_buffer->putByte(OP_GROUP11_EvIz);
|
---|
648 | modRm_opm(GROUP11_MOV, addr);
|
---|
649 | m_buffer->putInt(imm);
|
---|
650 | }
|
---|
651 |
|
---|
652 | void leal_mr(int offset, RegisterID base, RegisterID dst)
|
---|
653 | {
|
---|
654 | m_buffer->putByte(OP_LEA);
|
---|
655 | modRm_rm(dst, base, offset);
|
---|
656 | }
|
---|
657 |
|
---|
658 | void leal_mr(int offset, RegisterID index, int scale, RegisterID dst)
|
---|
659 | {
|
---|
660 | m_buffer->putByte(OP_LEA);
|
---|
661 | modRm_rmsib(dst, X86::noBase, index, scale, offset);
|
---|
662 | }
|
---|
663 |
|
---|
664 | void ret()
|
---|
665 | {
|
---|
666 | m_buffer->putByte(OP_RET);
|
---|
667 | }
|
---|
668 |
|
---|
669 | void jmp_r(RegisterID dst)
|
---|
670 | {
|
---|
671 | m_buffer->putByte(OP_GROUP5_Ev);
|
---|
672 | modRm_opr(GROUP5_OP_JMPN, dst);
|
---|
673 | }
|
---|
674 |
|
---|
675 | void jmp_m(int offset, RegisterID base)
|
---|
676 | {
|
---|
677 | m_buffer->putByte(OP_GROUP5_Ev);
|
---|
678 | modRm_opm(GROUP5_OP_JMPN, base, offset);
|
---|
679 | }
|
---|
680 |
|
---|
681 | void movsd_mr(int offset, RegisterID base, XMMRegisterID dst)
|
---|
682 | {
|
---|
683 | m_buffer->putByte(PRE_SSE_F2);
|
---|
684 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
685 | m_buffer->putByte(OP2_MOVSD_VsdWsd);
|
---|
686 | modRm_rm((RegisterID)dst, base, offset);
|
---|
687 | }
|
---|
688 |
|
---|
689 | void xorpd_mr(void* addr, XMMRegisterID dst)
|
---|
690 | {
|
---|
691 | m_buffer->putByte(PRE_SSE_66);
|
---|
692 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
693 | m_buffer->putByte(OP2_XORPD_VsdWsd);
|
---|
694 | modRm_rm((RegisterID)dst, addr);
|
---|
695 | }
|
---|
696 |
|
---|
697 | void movsd_rm(XMMRegisterID src, int offset, RegisterID base)
|
---|
698 | {
|
---|
699 | m_buffer->putByte(PRE_SSE_F2);
|
---|
700 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
701 | m_buffer->putByte(OP2_MOVSD_WsdVsd);
|
---|
702 | modRm_rm((RegisterID)src, base, offset);
|
---|
703 | }
|
---|
704 |
|
---|
705 | void movd_rr(XMMRegisterID src, RegisterID dst)
|
---|
706 | {
|
---|
707 | m_buffer->putByte(PRE_SSE_66);
|
---|
708 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
709 | m_buffer->putByte(OP2_MOVD_EdVd);
|
---|
710 | modRm_rr((RegisterID)src, dst);
|
---|
711 | }
|
---|
712 |
|
---|
713 | void cvtsi2sd_rr(RegisterID src, XMMRegisterID dst)
|
---|
714 | {
|
---|
715 | m_buffer->putByte(PRE_SSE_F2);
|
---|
716 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
717 | m_buffer->putByte(OP2_CVTSI2SD_VsdEd);
|
---|
718 | modRm_rr((RegisterID)dst, src);
|
---|
719 | }
|
---|
720 |
|
---|
721 | void cvttsd2si_rr(XMMRegisterID src, RegisterID dst)
|
---|
722 | {
|
---|
723 | m_buffer->putByte(PRE_SSE_F2);
|
---|
724 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
725 | m_buffer->putByte(OP2_CVTTSD2SI_GdWsd);
|
---|
726 | modRm_rr(dst, (RegisterID)src);
|
---|
727 | }
|
---|
728 |
|
---|
729 | void addsd_mr(int offset, RegisterID base, XMMRegisterID dst)
|
---|
730 | {
|
---|
731 | m_buffer->putByte(PRE_SSE_F2);
|
---|
732 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
733 | m_buffer->putByte(OP2_ADDSD_VsdWsd);
|
---|
734 | modRm_rm((RegisterID)dst, base, offset);
|
---|
735 | }
|
---|
736 |
|
---|
737 | void subsd_mr(int offset, RegisterID base, XMMRegisterID dst)
|
---|
738 | {
|
---|
739 | m_buffer->putByte(PRE_SSE_F2);
|
---|
740 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
741 | m_buffer->putByte(OP2_SUBSD_VsdWsd);
|
---|
742 | modRm_rm((RegisterID)dst, base, offset);
|
---|
743 | }
|
---|
744 |
|
---|
745 | void mulsd_mr(int offset, RegisterID base, XMMRegisterID dst)
|
---|
746 | {
|
---|
747 | m_buffer->putByte(PRE_SSE_F2);
|
---|
748 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
749 | m_buffer->putByte(OP2_MULSD_VsdWsd);
|
---|
750 | modRm_rm((RegisterID)dst, base, offset);
|
---|
751 | }
|
---|
752 |
|
---|
753 | void addsd_rr(XMMRegisterID src, XMMRegisterID dst)
|
---|
754 | {
|
---|
755 | m_buffer->putByte(PRE_SSE_F2);
|
---|
756 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
757 | m_buffer->putByte(OP2_ADDSD_VsdWsd);
|
---|
758 | modRm_rr((RegisterID)dst, (RegisterID)src);
|
---|
759 | }
|
---|
760 |
|
---|
761 | void subsd_rr(XMMRegisterID src, XMMRegisterID dst)
|
---|
762 | {
|
---|
763 | m_buffer->putByte(PRE_SSE_F2);
|
---|
764 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
765 | m_buffer->putByte(OP2_SUBSD_VsdWsd);
|
---|
766 | modRm_rr((RegisterID)dst, (RegisterID)src);
|
---|
767 | }
|
---|
768 |
|
---|
769 | void mulsd_rr(XMMRegisterID src, XMMRegisterID dst)
|
---|
770 | {
|
---|
771 | m_buffer->putByte(PRE_SSE_F2);
|
---|
772 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
773 | m_buffer->putByte(OP2_MULSD_VsdWsd);
|
---|
774 | modRm_rr((RegisterID)dst, (RegisterID)src);
|
---|
775 | }
|
---|
776 |
|
---|
777 | void ucomis_rr(XMMRegisterID src, XMMRegisterID dst)
|
---|
778 | {
|
---|
779 | m_buffer->putByte(PRE_SSE_66);
|
---|
780 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
781 | m_buffer->putByte(OP2_UCOMISD_VsdWsd);
|
---|
782 | modRm_rr((RegisterID)dst, (RegisterID)src);
|
---|
783 | }
|
---|
784 |
|
---|
785 | void pextrw_irr(int whichWord, XMMRegisterID src, RegisterID dst)
|
---|
786 | {
|
---|
787 | m_buffer->putByte(PRE_SSE_66);
|
---|
788 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
789 | m_buffer->putByte(OP2_PEXTRW_GdUdIb);
|
---|
790 | modRm_rr(dst, (RegisterID)src);
|
---|
791 | m_buffer->putByte(whichWord);
|
---|
792 | }
|
---|
793 |
|
---|
794 | JmpSrc call()
|
---|
795 | {
|
---|
796 | m_buffer->putByte(OP_CALL_rel32);
|
---|
797 | m_buffer->putInt(0); // FIXME: make this point to a global label, linked later.
|
---|
798 | return JmpSrc(m_buffer->size());
|
---|
799 | }
|
---|
800 |
|
---|
801 | JmpSrc call(RegisterID dst)
|
---|
802 | {
|
---|
803 | m_buffer->putByte(OP_GROUP5_Ev);
|
---|
804 | modRm_opr(GROUP5_OP_CALLN, dst);
|
---|
805 | return JmpSrc(m_buffer->size());
|
---|
806 | }
|
---|
807 |
|
---|
808 | JmpDst label()
|
---|
809 | {
|
---|
810 | return JmpDst(m_buffer->size());
|
---|
811 | }
|
---|
812 |
|
---|
813 | JmpDst align(int alignment)
|
---|
814 | {
|
---|
815 | while (!m_buffer->isAligned(alignment))
|
---|
816 | m_buffer->putByte(OP_HLT);
|
---|
817 |
|
---|
818 | return label();
|
---|
819 | }
|
---|
820 |
|
---|
821 | JmpSrc jmp()
|
---|
822 | {
|
---|
823 | m_buffer->putByte(OP_JMP_rel32);
|
---|
824 | m_buffer->putInt(0);
|
---|
825 | return JmpSrc(m_buffer->size());
|
---|
826 | }
|
---|
827 |
|
---|
828 | JmpSrc jne()
|
---|
829 | {
|
---|
830 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
831 | m_buffer->putByte(OP2_JNE_rel32);
|
---|
832 | m_buffer->putInt(0);
|
---|
833 | return JmpSrc(m_buffer->size());
|
---|
834 | }
|
---|
835 |
|
---|
836 | JmpSrc jnz()
|
---|
837 | {
|
---|
838 | return jne();
|
---|
839 | }
|
---|
840 |
|
---|
841 | JmpSrc je()
|
---|
842 | {
|
---|
843 | m_buffer->ensureSpace(maxInstructionSize);
|
---|
844 | m_buffer->putByteUnchecked(OP_2BYTE_ESCAPE);
|
---|
845 | m_buffer->putByteUnchecked(OP2_JE_rel32);
|
---|
846 | m_buffer->putIntUnchecked(0);
|
---|
847 | return JmpSrc(m_buffer->size());
|
---|
848 | }
|
---|
849 |
|
---|
850 | JmpSrc jl()
|
---|
851 | {
|
---|
852 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
853 | m_buffer->putByte(OP2_JL_rel32);
|
---|
854 | m_buffer->putInt(0);
|
---|
855 | return JmpSrc(m_buffer->size());
|
---|
856 | }
|
---|
857 |
|
---|
858 | JmpSrc jb()
|
---|
859 | {
|
---|
860 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
861 | m_buffer->putByte(OP2_JB_rel32);
|
---|
862 | m_buffer->putInt(0);
|
---|
863 | return JmpSrc(m_buffer->size());
|
---|
864 | }
|
---|
865 |
|
---|
866 | JmpSrc jle()
|
---|
867 | {
|
---|
868 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
869 | m_buffer->putByte(OP2_JLE_rel32);
|
---|
870 | m_buffer->putInt(0);
|
---|
871 | return JmpSrc(m_buffer->size());
|
---|
872 | }
|
---|
873 |
|
---|
874 | JmpSrc jbe()
|
---|
875 | {
|
---|
876 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
877 | m_buffer->putByte(OP2_JBE_rel32);
|
---|
878 | m_buffer->putInt(0);
|
---|
879 | return JmpSrc(m_buffer->size());
|
---|
880 | }
|
---|
881 |
|
---|
882 | JmpSrc jge()
|
---|
883 | {
|
---|
884 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
885 | m_buffer->putByte(OP2_JGE_rel32);
|
---|
886 | m_buffer->putInt(0);
|
---|
887 | return JmpSrc(m_buffer->size());
|
---|
888 | }
|
---|
889 |
|
---|
890 | JmpSrc jg()
|
---|
891 | {
|
---|
892 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
893 | m_buffer->putByte(OP2_JG_rel32);
|
---|
894 | m_buffer->putInt(0);
|
---|
895 | return JmpSrc(m_buffer->size());
|
---|
896 | }
|
---|
897 |
|
---|
898 | JmpSrc ja()
|
---|
899 | {
|
---|
900 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
901 | m_buffer->putByte(OP2_JA_rel32);
|
---|
902 | m_buffer->putInt(0);
|
---|
903 | return JmpSrc(m_buffer->size());
|
---|
904 | }
|
---|
905 |
|
---|
906 | JmpSrc jae()
|
---|
907 | {
|
---|
908 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
909 | m_buffer->putByte(OP2_JAE_rel32);
|
---|
910 | m_buffer->putInt(0);
|
---|
911 | return JmpSrc(m_buffer->size());
|
---|
912 | }
|
---|
913 |
|
---|
914 | JmpSrc jo()
|
---|
915 | {
|
---|
916 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
917 | m_buffer->putByte(OP2_JO_rel32);
|
---|
918 | m_buffer->putInt(0);
|
---|
919 | return JmpSrc(m_buffer->size());
|
---|
920 | }
|
---|
921 |
|
---|
922 | JmpSrc jp()
|
---|
923 | {
|
---|
924 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
925 | m_buffer->putByte(OP2_JP_rel32);
|
---|
926 | m_buffer->putInt(0);
|
---|
927 | return JmpSrc(m_buffer->size());
|
---|
928 | }
|
---|
929 |
|
---|
930 | JmpSrc js()
|
---|
931 | {
|
---|
932 | m_buffer->putByte(OP_2BYTE_ESCAPE);
|
---|
933 | m_buffer->putByte(OP2_JS_rel32);
|
---|
934 | m_buffer->putInt(0);
|
---|
935 | return JmpSrc(m_buffer->size());
|
---|
936 | }
|
---|
937 |
|
---|
938 | void predictNotTaken()
|
---|
939 | {
|
---|
940 | m_buffer->putByte(PRE_PREDICT_BRANCH_NOT_TAKEN);
|
---|
941 | }
|
---|
942 |
|
---|
943 | void link(JmpSrc from, JmpDst to)
|
---|
944 | {
|
---|
945 | ASSERT(to.m_offset != -1);
|
---|
946 | ASSERT(from.m_offset != -1);
|
---|
947 |
|
---|
948 | reinterpret_cast<int*>(reinterpret_cast<ptrdiff_t>(m_buffer->data()) + from.m_offset)[-1] = to.m_offset - from.m_offset;
|
---|
949 | }
|
---|
950 |
|
---|
951 | static void linkAbsoluteAddress(void* code, JmpDst useOffset, JmpDst address)
|
---|
952 | {
|
---|
953 | ASSERT(useOffset.m_offset != -1);
|
---|
954 | ASSERT(address.m_offset != -1);
|
---|
955 |
|
---|
956 | reinterpret_cast<int*>(reinterpret_cast<ptrdiff_t>(code) + useOffset.m_offset)[-1] = reinterpret_cast<ptrdiff_t>(code) + address.m_offset;
|
---|
957 | }
|
---|
958 |
|
---|
959 | static void link(void* code, JmpSrc from, void* to)
|
---|
960 | {
|
---|
961 | ASSERT(from.m_offset != -1);
|
---|
962 |
|
---|
963 | reinterpret_cast<int*>(reinterpret_cast<ptrdiff_t>(code) + from.m_offset)[-1] = reinterpret_cast<ptrdiff_t>(to) - (reinterpret_cast<ptrdiff_t>(code) + from.m_offset);
|
---|
964 | }
|
---|
965 |
|
---|
966 | static void* getRelocatedAddress(void* code, JmpSrc jump)
|
---|
967 | {
|
---|
968 | return reinterpret_cast<void*>(reinterpret_cast<ptrdiff_t>(code) + jump.m_offset);
|
---|
969 | }
|
---|
970 |
|
---|
971 | static void* getRelocatedAddress(void* code, JmpDst jump)
|
---|
972 | {
|
---|
973 | return reinterpret_cast<void*>(reinterpret_cast<ptrdiff_t>(code) + jump.m_offset);
|
---|
974 | }
|
---|
975 |
|
---|
976 | static int getDifferenceBetweenLabels(JmpDst src, JmpDst dst)
|
---|
977 | {
|
---|
978 | return dst.m_offset - src.m_offset;
|
---|
979 | }
|
---|
980 |
|
---|
981 | static int getDifferenceBetweenLabels(JmpDst src, JmpSrc dst)
|
---|
982 | {
|
---|
983 | return dst.m_offset - src.m_offset;
|
---|
984 | }
|
---|
985 |
|
---|
986 | static int getDifferenceBetweenLabels(JmpSrc src, JmpDst dst)
|
---|
987 | {
|
---|
988 | return dst.m_offset - src.m_offset;
|
---|
989 | }
|
---|
990 |
|
---|
991 | static void repatchImmediate(intptr_t where, int32_t value)
|
---|
992 | {
|
---|
993 | reinterpret_cast<int32_t*>(where)[-1] = value;
|
---|
994 | }
|
---|
995 |
|
---|
996 | static void repatchDisplacement(intptr_t where, intptr_t value)
|
---|
997 | {
|
---|
998 | reinterpret_cast<intptr_t*>(where)[-1] = value;
|
---|
999 | }
|
---|
1000 |
|
---|
1001 | static void repatchBranchOffset(intptr_t where, void* destination)
|
---|
1002 | {
|
---|
1003 | reinterpret_cast<intptr_t*>(where)[-1] = (reinterpret_cast<intptr_t>(destination) - where);
|
---|
1004 | }
|
---|
1005 |
|
---|
1006 | void* executableCopy()
|
---|
1007 | {
|
---|
1008 | void* copy = m_buffer->executableCopy();
|
---|
1009 | ASSERT(copy);
|
---|
1010 | return copy;
|
---|
1011 | }
|
---|
1012 |
|
---|
1013 | #if USE(CTI_ARGUMENT)
|
---|
1014 | void restoreArgumentReference()
|
---|
1015 | {
|
---|
1016 | #if USE(FAST_CALL_CTI_ARGUMENT)
|
---|
1017 | movl_rr(X86::esp, X86::ecx);
|
---|
1018 | #else
|
---|
1019 | movl_rm(X86::esp, 0, X86::esp);
|
---|
1020 | #endif
|
---|
1021 | }
|
---|
1022 |
|
---|
1023 | void restoreArgumentReferenceForTrampoline()
|
---|
1024 | {
|
---|
1025 | #if USE(FAST_CALL_CTI_ARGUMENT)
|
---|
1026 | movl_rr(X86::esp, X86::ecx);
|
---|
1027 | addl_i32r(4, X86::ecx);
|
---|
1028 | #endif
|
---|
1029 | }
|
---|
1030 | #else
|
---|
1031 | void restoreArgumentReference() {}
|
---|
1032 | void restoreArgumentReferenceForTrampoline() {}
|
---|
1033 | #endif
|
---|
1034 |
|
---|
1035 | private:
|
---|
1036 | void modRm_rr(RegisterID reg, RegisterID rm)
|
---|
1037 | {
|
---|
1038 | m_buffer->ensureSpace(maxInstructionSize);
|
---|
1039 | modRm_rr_Unchecked(reg, rm);
|
---|
1040 | }
|
---|
1041 |
|
---|
1042 | void modRm_rr_Unchecked(RegisterID reg, RegisterID rm)
|
---|
1043 | {
|
---|
1044 | m_buffer->putByteUnchecked(MODRM(3, reg, rm));
|
---|
1045 | }
|
---|
1046 |
|
---|
1047 | void modRm_rm(RegisterID reg, void* addr)
|
---|
1048 | {
|
---|
1049 | m_buffer->putByte(MODRM(0, reg, X86::noBase));
|
---|
1050 | m_buffer->putInt((int)addr);
|
---|
1051 | }
|
---|
1052 |
|
---|
1053 | void modRm_rm(RegisterID reg, RegisterID base)
|
---|
1054 | {
|
---|
1055 | if (base == X86::esp) {
|
---|
1056 | m_buffer->putByte(MODRM(0, reg, X86::hasSib));
|
---|
1057 | m_buffer->putByte(SIB(0, X86::noScale, X86::esp));
|
---|
1058 | } else
|
---|
1059 | m_buffer->putByte(MODRM(0, reg, base));
|
---|
1060 | }
|
---|
1061 |
|
---|
1062 | void modRm_rm_Unchecked(RegisterID reg, RegisterID base, int offset)
|
---|
1063 | {
|
---|
1064 | if (base == X86::esp) {
|
---|
1065 | if (CAN_SIGN_EXTEND_8_32(offset)) {
|
---|
1066 | m_buffer->putByteUnchecked(MODRM(1, reg, X86::hasSib));
|
---|
1067 | m_buffer->putByteUnchecked(SIB(0, X86::noScale, X86::esp));
|
---|
1068 | m_buffer->putByteUnchecked(offset);
|
---|
1069 | } else {
|
---|
1070 | m_buffer->putByteUnchecked(MODRM(2, reg, X86::hasSib));
|
---|
1071 | m_buffer->putByteUnchecked(SIB(0, X86::noScale, X86::esp));
|
---|
1072 | m_buffer->putIntUnchecked(offset);
|
---|
1073 | }
|
---|
1074 | } else {
|
---|
1075 | if (CAN_SIGN_EXTEND_8_32(offset)) {
|
---|
1076 | m_buffer->putByteUnchecked(MODRM(1, reg, base));
|
---|
1077 | m_buffer->putByteUnchecked(offset);
|
---|
1078 | } else {
|
---|
1079 | m_buffer->putByteUnchecked(MODRM(2, reg, base));
|
---|
1080 | m_buffer->putIntUnchecked(offset);
|
---|
1081 | }
|
---|
1082 | }
|
---|
1083 | }
|
---|
1084 |
|
---|
1085 | void modRm_rm(RegisterID reg, RegisterID base, int offset)
|
---|
1086 | {
|
---|
1087 | m_buffer->ensureSpace(maxInstructionSize);
|
---|
1088 | modRm_rm_Unchecked(reg, base, offset);
|
---|
1089 | }
|
---|
1090 |
|
---|
1091 | void modRm_rmsib(RegisterID reg, RegisterID base, RegisterID index, int scale)
|
---|
1092 | {
|
---|
1093 | int shift = 0;
|
---|
1094 | while (scale >>= 1)
|
---|
1095 | shift++;
|
---|
1096 |
|
---|
1097 | m_buffer->putByte(MODRM(0, reg, X86::hasSib));
|
---|
1098 | m_buffer->putByte(SIB(shift, index, base));
|
---|
1099 | }
|
---|
1100 |
|
---|
1101 | void modRm_rmsib(RegisterID reg, RegisterID base, RegisterID index, int scale, int offset)
|
---|
1102 | {
|
---|
1103 | int shift = 0;
|
---|
1104 | while (scale >>= 1)
|
---|
1105 | shift++;
|
---|
1106 |
|
---|
1107 | if (CAN_SIGN_EXTEND_8_32(offset)) {
|
---|
1108 | m_buffer->putByte(MODRM(1, reg, X86::hasSib));
|
---|
1109 | m_buffer->putByte(SIB(shift, index, base));
|
---|
1110 | m_buffer->putByte(offset);
|
---|
1111 | } else {
|
---|
1112 | m_buffer->putByte(MODRM(2, reg, X86::hasSib));
|
---|
1113 | m_buffer->putByte(SIB(shift, index, base));
|
---|
1114 | m_buffer->putInt(offset);
|
---|
1115 | }
|
---|
1116 | }
|
---|
1117 |
|
---|
1118 | void modRm_opr(OpcodeID opcodeID, RegisterID rm)
|
---|
1119 | {
|
---|
1120 | m_buffer->ensureSpace(maxInstructionSize);
|
---|
1121 | modRm_opr_Unchecked(opcodeID, rm);
|
---|
1122 | }
|
---|
1123 |
|
---|
1124 | void modRm_opr_Unchecked(OpcodeID opcodeID, RegisterID rm)
|
---|
1125 | {
|
---|
1126 | modRm_rr_Unchecked(static_cast<RegisterID>(opcodeID), rm);
|
---|
1127 | }
|
---|
1128 |
|
---|
1129 | void modRm_opm(OpcodeID opcodeID, RegisterID base)
|
---|
1130 | {
|
---|
1131 | modRm_rm(static_cast<RegisterID>(opcodeID), base);
|
---|
1132 | }
|
---|
1133 |
|
---|
1134 | void modRm_opm_Unchecked(OpcodeID opcodeID, RegisterID base, int offset)
|
---|
1135 | {
|
---|
1136 | modRm_rm_Unchecked(static_cast<RegisterID>(opcodeID), base, offset);
|
---|
1137 | }
|
---|
1138 |
|
---|
1139 | void modRm_opm(OpcodeID opcodeID, RegisterID base, int offset)
|
---|
1140 | {
|
---|
1141 | modRm_rm(static_cast<RegisterID>(opcodeID), base, offset);
|
---|
1142 | }
|
---|
1143 |
|
---|
1144 | void modRm_opm(OpcodeID opcodeID, void* addr)
|
---|
1145 | {
|
---|
1146 | modRm_rm(static_cast<RegisterID>(opcodeID), addr);
|
---|
1147 | }
|
---|
1148 |
|
---|
1149 | void modRm_opmsib(OpcodeID opcodeID, RegisterID base, RegisterID index, int scale, int offset)
|
---|
1150 | {
|
---|
1151 | modRm_rmsib(static_cast<RegisterID>(opcodeID), base, index, scale, offset);
|
---|
1152 | }
|
---|
1153 |
|
---|
1154 | AssemblerBuffer* m_buffer;
|
---|
1155 | };
|
---|
1156 |
|
---|
1157 | } // namespace JSC
|
---|
1158 |
|
---|
1159 | #endif // ENABLE(ASSEMBLER) && PLATFORM(X86)
|
---|
1160 |
|
---|
1161 | #endif // X86Assembler_h
|
---|