source: webkit/trunk/JavaScriptCore/assembler/X86Assembler.h@ 39287

Last change on this file since 39287 was 39287, checked in by [email protected], 16 years ago

2008-12-13 Gavin Barraclough <​[email protected]>

Reviewed by Cameron Zwarich.

Re-enable WREC on 64-bit.
Implements one of the MacroAssembler::jnzPtr methods, previously only implemented for 32-bit x86.

​https://bugs.webkit.org/show_bug.cgi?id=22849

  • assembler/MacroAssembler.h: (JSC::MacroAssembler::testImm64): (JSC::MacroAssembler::jnzPtr):
  • assembler/X86Assembler.h: (JSC::X86Assembler::testq_i32r): (JSC::X86Assembler::testq_rr):
  • wtf/Platform.h:
File size: 35.9 KB
Line 
1/*
2 * Copyright (C) 2008 Apple Inc. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY APPLE INC. ``AS IS'' AND ANY
14 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
16 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL APPLE INC. OR
17 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
18 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
19 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
20 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
21 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
23 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 */
25
26#ifndef X86Assembler_h
27#define X86Assembler_h
28
29#include <wtf/Platform.h>
30
31#if ENABLE(ASSEMBLER) && (PLATFORM(X86) || PLATFORM(X86_64))
32
33#include "AssemblerBuffer.h"
34#include <stdint.h>
35#include <wtf/Assertions.h>
36#include <wtf/Vector.h>
37
38namespace JSC {
39
40#define MODRM(type, reg, rm) ((type << 6) | (reg << 3) | (rm))
41#define SIB(type, reg, rm) MODRM(type, reg, rm)
42#define CAN_SIGN_EXTEND_8_32(value) (value == ((int)(signed char)value))
43
44namespace X86 {
45 typedef enum {
46 eax,
47 ecx,
48 edx,
49 ebx,
50 esp,
51 ebp,
52 esi,
53 edi,
54
55 noBase = ebp,
56 hasSib = esp,
57 noScale = esp,
58 } RegisterID;
59
60 typedef enum {
61 xmm0,
62 xmm1,
63 xmm2,
64 xmm3,
65 xmm4,
66 xmm5,
67 xmm6,
68 xmm7,
69 } XMMRegisterID;
70}
71
72class X86Assembler {
73public:
74 typedef X86::RegisterID RegisterID;
75 typedef X86::XMMRegisterID XMMRegisterID;
76
77 typedef enum {
78 OP_ADD_EvGv = 0x01,
79 OP_ADD_GvEv = 0x03,
80 OP_OR_EvGv = 0x09,
81 OP_OR_GvEv = 0x0B,
82 OP_2BYTE_ESCAPE = 0x0F,
83 OP_AND_EvGv = 0x21,
84 OP_SUB_EvGv = 0x29,
85 OP_SUB_GvEv = 0x2B,
86 PRE_PREDICT_BRANCH_NOT_TAKEN = 0x2E,
87 OP_XOR_EvGv = 0x31,
88 OP_CMP_EvGv = 0x39,
89 OP_CMP_GvEv = 0x3B,
90 REX_W = 0x48,
91 OP_PUSH_EAX = 0x50,
92 OP_POP_EAX = 0x58,
93 PRE_OPERAND_SIZE = 0x66,
94 PRE_SSE_66 = 0x66,
95 OP_PUSH_Iz = 0x68,
96 OP_IMUL_GvEvIz = 0x69,
97 OP_GROUP1_EvIz = 0x81,
98 OP_GROUP1_EvIb = 0x83,
99 OP_TEST_EvGv = 0x85,
100 OP_XCHG_EvGv = 0x87,
101 OP_MOV_EvGv = 0x89,
102 OP_MOV_GvEv = 0x8B,
103 OP_LEA = 0x8D,
104 OP_GROUP1A_Ev = 0x8F,
105 OP_CDQ = 0x99,
106 OP_SETE = 0x94,
107 OP_SETNE = 0x95,
108 OP_GROUP2_EvIb = 0xC1,
109 OP_RET = 0xC3,
110 OP_GROUP11_EvIz = 0xC7,
111 OP_INT3 = 0xCC,
112 OP_GROUP2_Ev1 = 0xD1,
113 OP_GROUP2_EvCL = 0xD3,
114 OP_CALL_rel32 = 0xE8,
115 OP_JMP_rel32 = 0xE9,
116 PRE_SSE_F2 = 0xF2,
117 OP_HLT = 0xF4,
118 OP_GROUP3_EbIb = 0xF6,
119 OP_GROUP3_Ev = 0xF7,
120 OP_GROUP3_EvIz = 0xF7, // OP_GROUP3_Ev has an immediate, when instruction is a test.
121 OP_GROUP5_Ev = 0xFF,
122
123 OP2_MOVSD_VsdWsd = 0x10,
124 OP2_MOVSD_WsdVsd = 0x11,
125 OP2_CVTSI2SD_VsdEd = 0x2A,
126 OP2_CVTTSD2SI_GdWsd = 0x2C,
127 OP2_UCOMISD_VsdWsd = 0x2E,
128 OP2_ADDSD_VsdWsd = 0x58,
129 OP2_MULSD_VsdWsd = 0x59,
130 OP2_SUBSD_VsdWsd = 0x5C,
131 OP2_MOVD_EdVd = 0x7E,
132 OP2_JO_rel32 = 0x80,
133 OP2_JB_rel32 = 0x82,
134 OP2_JAE_rel32 = 0x83,
135 OP2_JE_rel32 = 0x84,
136 OP2_JNE_rel32 = 0x85,
137 OP2_JBE_rel32 = 0x86,
138 OP2_JA_rel32 = 0x87,
139 OP2_JS_rel32 = 0x88,
140 OP2_JP_rel32 = 0x8A,
141 OP2_JL_rel32 = 0x8C,
142 OP2_JGE_rel32 = 0x8D,
143 OP2_JLE_rel32 = 0x8E,
144 OP2_JG_rel32 = 0x8F,
145 OP2_IMUL_GvEv = 0xAF,
146 OP2_MOVZX_GvEb = 0xB6,
147 OP2_MOVZX_GvEw = 0xB7,
148 OP2_PEXTRW_GdUdIb = 0xC5,
149
150 GROUP1_OP_ADD = 0,
151 GROUP1_OP_OR = 1,
152 GROUP1_OP_AND = 4,
153 GROUP1_OP_SUB = 5,
154 GROUP1_OP_XOR = 6,
155 GROUP1_OP_CMP = 7,
156
157 GROUP1A_OP_POP = 0,
158
159 GROUP2_OP_SHL = 4,
160 GROUP2_OP_SAR = 7,
161
162 GROUP3_OP_TEST = 0,
163 GROUP3_OP_IDIV = 7,
164
165 GROUP5_OP_CALLN = 2,
166 GROUP5_OP_JMPN = 4,
167 GROUP5_OP_PUSH = 6,
168
169 GROUP11_MOV = 0,
170 } OpcodeID;
171
172 // Opaque label types
173
174 class JmpSrc {
175 friend class X86Assembler;
176 public:
177 JmpSrc()
178 : m_offset(-1)
179 {
180 }
181
182 private:
183 JmpSrc(int offset)
184 : m_offset(offset)
185 {
186 }
187
188 int m_offset;
189 };
190
191 class JmpDst {
192 friend class X86Assembler;
193 public:
194 JmpDst()
195 : m_offset(-1)
196 {
197 }
198
199 private:
200 JmpDst(int offset)
201 : m_offset(offset)
202 {
203 }
204
205 int m_offset;
206 };
207
208 static const int maxInstructionSize = 16;
209
210 X86Assembler()
211 {
212 }
213
214 size_t size() const { return m_buffer.size(); }
215
216 void int3()
217 {
218 m_buffer.putByte(OP_INT3);
219 }
220
221#if PLATFORM(X86_64)
222 void pushq_r(RegisterID reg)
223 {
224 m_buffer.putByte(OP_PUSH_EAX + reg);
225 }
226
227 void popq_r(RegisterID reg)
228 {
229 m_buffer.putByte(OP_POP_EAX + reg);
230 }
231#else
232 void pushl_r(RegisterID reg)
233 {
234 m_buffer.putByte(OP_PUSH_EAX + reg);
235 }
236
237 void pushl_m(int offset, RegisterID base)
238 {
239 m_buffer.putByte(OP_GROUP5_Ev);
240 modRm_opm(GROUP5_OP_PUSH, base, offset);
241 }
242
243 void pushl_i32(int imm)
244 {
245 m_buffer.putByte(OP_PUSH_Iz);
246 m_buffer.putInt(imm);
247 }
248
249 void popl_r(RegisterID reg)
250 {
251 m_buffer.putByte(OP_POP_EAX + reg);
252 }
253
254 void popl_m(int offset, RegisterID base)
255 {
256 m_buffer.putByte(OP_GROUP1A_Ev);
257 modRm_opm(GROUP1A_OP_POP, base, offset);
258 }
259#endif
260
261 void movl_rr(RegisterID src, RegisterID dst)
262 {
263 m_buffer.putByte(OP_MOV_EvGv);
264 modRm_rr(src, dst);
265 }
266
267#if PLATFORM(X86_64)
268 void movq_rr(RegisterID src, RegisterID dst)
269 {
270 m_buffer.putByte(REX_W);
271 m_buffer.putByte(OP_MOV_EvGv);
272 modRm_rr(src, dst);
273 }
274#endif
275
276 void addl_rr(RegisterID src, RegisterID dst)
277 {
278 m_buffer.putByte(OP_ADD_EvGv);
279 modRm_rr(src, dst);
280 }
281
282#if !PLATFORM(X86_64)
283 void addl_i8m(int imm, void* addr)
284 {
285 m_buffer.putByte(OP_GROUP1_EvIb);
286 modRm_opm(GROUP1_OP_ADD, addr);
287 m_buffer.putByte(imm);
288 }
289#endif
290
291 void addl_i8r(int imm, RegisterID dst)
292 {
293 m_buffer.putByte(OP_GROUP1_EvIb);
294 modRm_opr(GROUP1_OP_ADD, dst);
295 m_buffer.putByte(imm);
296 }
297
298 void addl_i32r(int imm, RegisterID dst)
299 {
300 m_buffer.putByte(OP_GROUP1_EvIz);
301 modRm_opr(GROUP1_OP_ADD, dst);
302 m_buffer.putInt(imm);
303 }
304
305#if PLATFORM(X86_64)
306 void addq_i8r(int imm, RegisterID dst)
307 {
308 m_buffer.putByte(REX_W);
309 m_buffer.putByte(OP_GROUP1_EvIb);
310 modRm_opr(GROUP1_OP_ADD, dst);
311 m_buffer.putByte(imm);
312 }
313
314 void addq_i32r(int imm, RegisterID dst)
315 {
316 m_buffer.putByte(REX_W);
317 m_buffer.putByte(OP_GROUP1_EvIz);
318 modRm_opr(GROUP1_OP_ADD, dst);
319 m_buffer.putInt(imm);
320 }
321#endif
322
323 void addl_mr(RegisterID base, RegisterID dst)
324 {
325 m_buffer.putByte(OP_ADD_GvEv);
326 modRm_rm(dst, base);
327 }
328
329 void addl_mr(int offset, RegisterID base, RegisterID dst)
330 {
331 m_buffer.putByte(OP_ADD_GvEv);
332 modRm_rm(dst, base, offset);
333 }
334
335 void andl_rr(RegisterID src, RegisterID dst)
336 {
337 m_buffer.putByte(OP_AND_EvGv);
338 modRm_rr(src, dst);
339 }
340
341 void andl_i8r(int imm, RegisterID dst)
342 {
343 m_buffer.putByte(OP_GROUP1_EvIb);
344 modRm_opr(GROUP1_OP_AND, dst);
345 m_buffer.putByte(imm);
346 }
347
348 void andl_i32r(int imm, RegisterID dst)
349 {
350 m_buffer.putByte(OP_GROUP1_EvIz);
351 modRm_opr(GROUP1_OP_AND, dst);
352 m_buffer.putInt(imm);
353 }
354
355 void cmpl_i8r(int imm, RegisterID dst)
356 {
357 m_buffer.putByte(OP_GROUP1_EvIb);
358 modRm_opr(GROUP1_OP_CMP, dst);
359 m_buffer.putByte(imm);
360 }
361
362 void cmpl_rr(RegisterID src, RegisterID dst)
363 {
364 m_buffer.putByte(OP_CMP_EvGv);
365 modRm_rr(src, dst);
366 }
367
368 void cmpl_rm(RegisterID src, RegisterID base)
369 {
370 m_buffer.putByte(OP_CMP_EvGv);
371 modRm_rm(src, base);
372 }
373
374 void cmpl_rm(RegisterID src, int offset, RegisterID base)
375 {
376 m_buffer.putByte(OP_CMP_EvGv);
377 modRm_rm(src, base, offset);
378 }
379
380 void cmpl_mr(RegisterID base, RegisterID dst)
381 {
382 m_buffer.putByte(OP_CMP_GvEv);
383 modRm_rm(dst, base);
384 }
385
386 void cmpl_mr(int offset, RegisterID base, RegisterID dst)
387 {
388 m_buffer.putByte(OP_CMP_GvEv);
389 modRm_rm(dst, base, offset);
390 }
391
392 void cmpl_i32r(int imm, RegisterID dst)
393 {
394 m_buffer.putByte(OP_GROUP1_EvIz);
395 modRm_opr(GROUP1_OP_CMP, dst);
396 m_buffer.putInt(imm);
397 }
398
399 void cmpl_i32m(int imm, RegisterID dst)
400 {
401 m_buffer.putByte(OP_GROUP1_EvIz);
402 modRm_opm(GROUP1_OP_CMP, dst);
403 m_buffer.putInt(imm);
404 }
405
406 void cmpl_i32m(int imm, int offset, RegisterID dst)
407 {
408 m_buffer.putByte(OP_GROUP1_EvIz);
409 modRm_opm(GROUP1_OP_CMP, dst, offset);
410 m_buffer.putInt(imm);
411 }
412
413#if !PLATFORM(X86_64)
414 void cmpl_i32m(int imm, void* addr)
415 {
416 m_buffer.putByte(OP_GROUP1_EvIz);
417 modRm_opm(GROUP1_OP_CMP, addr);
418 m_buffer.putInt(imm);
419 }
420#endif
421
422 void cmpl_i8m(int imm, RegisterID dst)
423 {
424 m_buffer.putByte(OP_GROUP1_EvIb);
425 modRm_opm(GROUP1_OP_CMP, dst);
426 m_buffer.putByte(imm);
427 }
428
429 void cmpl_i8m(int imm, int offset, RegisterID dst)
430 {
431 m_buffer.putByte(OP_GROUP1_EvIb);
432 modRm_opm(GROUP1_OP_CMP, dst, offset);
433 m_buffer.putByte(imm);
434 }
435
436 void cmpl_i8m(int imm, RegisterID base, RegisterID index, int scale)
437 {
438 m_buffer.putByte(OP_GROUP1_EvIb);
439 modRm_opmsib(GROUP1_OP_CMP, base, index, scale);
440 m_buffer.putByte(imm);
441 }
442
443 void cmpl_i8m(int imm, int offset, RegisterID base, RegisterID index, int scale)
444 {
445 m_buffer.putByte(OP_GROUP1_EvIb);
446 modRm_opmsib(GROUP1_OP_CMP, base, index, scale, offset);
447 m_buffer.putByte(imm);
448 }
449
450 void cmpw_rm(RegisterID src, RegisterID base, RegisterID index, int scale)
451 {
452 m_buffer.putByte(PRE_OPERAND_SIZE);
453 m_buffer.putByte(OP_CMP_EvGv);
454 modRm_rmsib(src, base, index, scale);
455 }
456
457 void cmpw_rm(RegisterID src, int offset, RegisterID base, RegisterID index, int scale)
458 {
459 m_buffer.putByte(PRE_OPERAND_SIZE);
460 m_buffer.putByte(OP_CMP_EvGv);
461 modRm_rmsib(src, base, index, scale, offset);
462 }
463
464 void sete_r(RegisterID dst)
465 {
466 m_buffer.putByte(OP_2BYTE_ESCAPE);
467 m_buffer.putByte(OP_SETE);
468 m_buffer.putByte(MODRM(3, 0, dst));
469 }
470
471 void setz_r(RegisterID dst)
472 {
473 sete_r(dst);
474 }
475
476 void setne_r(RegisterID dst)
477 {
478 m_buffer.putByte(OP_2BYTE_ESCAPE);
479 m_buffer.putByte(OP_SETNE);
480 m_buffer.putByte(MODRM(3, 0, dst));
481 }
482
483 void setnz_r(RegisterID dst)
484 {
485 setne_r(dst);
486 }
487
488 void orl_rr(RegisterID src, RegisterID dst)
489 {
490 m_buffer.putByte(OP_OR_EvGv);
491 modRm_rr(src, dst);
492 }
493
494 void orl_mr(int offset, RegisterID base, RegisterID dst)
495 {
496 m_buffer.putByte(OP_OR_GvEv);
497 modRm_rm(dst, base, offset);
498 }
499
500 void orl_i8r(int imm, RegisterID dst)
501 {
502 m_buffer.putByte(OP_GROUP1_EvIb);
503 modRm_opr(GROUP1_OP_OR, dst);
504 m_buffer.putByte(imm);
505 }
506
507 void orl_i32r(int imm, RegisterID dst)
508 {
509 m_buffer.putByte(OP_GROUP1_EvIz);
510 modRm_opr(GROUP1_OP_OR, dst);
511 m_buffer.putInt(imm);
512 }
513
514 void subl_rr(RegisterID src, RegisterID dst)
515 {
516 m_buffer.putByte(OP_SUB_EvGv);
517 modRm_rr(src, dst);
518 }
519
520 void subl_i8r(int imm, RegisterID dst)
521 {
522 m_buffer.putByte(OP_GROUP1_EvIb);
523 modRm_opr(GROUP1_OP_SUB, dst);
524 m_buffer.putByte(imm);
525 }
526
527#if !PLATFORM(X86_64)
528 void subl_i8m(int imm, void* addr)
529 {
530 m_buffer.putByte(OP_GROUP1_EvIb);
531 modRm_opm(GROUP1_OP_SUB, addr);
532 m_buffer.putByte(imm);
533 }
534#endif
535
536 void subl_i32r(int imm, RegisterID dst)
537 {
538 m_buffer.putByte(OP_GROUP1_EvIz);
539 modRm_opr(GROUP1_OP_SUB, dst);
540 m_buffer.putInt(imm);
541 }
542
543 void subl_mr(RegisterID base, RegisterID dst)
544 {
545 m_buffer.putByte(OP_SUB_GvEv);
546 modRm_rm(dst, base);
547 }
548
549 void subl_mr(int offset, RegisterID base, RegisterID dst)
550 {
551 m_buffer.putByte(OP_SUB_GvEv);
552 modRm_rm(dst, base, offset);
553 }
554
555 void testb_i8r(int imm, RegisterID dst)
556 {
557 m_buffer.ensureSpace(maxInstructionSize);
558 m_buffer.putByteUnchecked(OP_GROUP3_EbIb);
559 modRm_opr_Unchecked(GROUP3_OP_TEST, dst);
560 m_buffer.putByteUnchecked(imm);
561 }
562
563 void testl_i32r(int imm, RegisterID dst)
564 {
565 m_buffer.ensureSpace(maxInstructionSize);
566 m_buffer.putByteUnchecked(OP_GROUP3_EvIz);
567 modRm_opr_Unchecked(GROUP3_OP_TEST, dst);
568 m_buffer.putIntUnchecked(imm);
569 }
570
571 void testl_i32m(int imm, RegisterID dst)
572 {
573 m_buffer.putByte(OP_GROUP3_EvIz);
574 modRm_opm(GROUP3_OP_TEST, dst);
575 m_buffer.putInt(imm);
576 }
577
578 void testl_i32m(int imm, int offset, RegisterID dst)
579 {
580 m_buffer.putByte(OP_GROUP3_EvIz);
581 modRm_opm(GROUP3_OP_TEST, dst, offset);
582 m_buffer.putInt(imm);
583 }
584
585 void testl_i32m(int imm, RegisterID base, RegisterID index, int scale)
586 {
587 m_buffer.putByte(OP_GROUP3_EvIz);
588 modRm_opmsib(GROUP3_OP_TEST, base, index, scale);
589 m_buffer.putInt(imm);
590 }
591
592 void testl_i32m(int imm, int offset, RegisterID base, RegisterID index, int scale)
593 {
594 m_buffer.putByte(OP_GROUP3_EvIz);
595 modRm_opmsib(GROUP3_OP_TEST, base, index, scale, offset);
596 m_buffer.putInt(imm);
597 }
598
599 void testl_rr(RegisterID src, RegisterID dst)
600 {
601 m_buffer.putByte(OP_TEST_EvGv);
602 modRm_rr(src, dst);
603 }
604
605#if PLATFORM(X86_64)
606 void testq_i32r(int imm, RegisterID dst)
607 {
608 m_buffer.ensureSpace(maxInstructionSize);
609 m_buffer.putByteUnchecked(REX_W);
610 m_buffer.putByteUnchecked(OP_GROUP3_EvIz);
611 modRm_opr_Unchecked(GROUP3_OP_TEST, dst);
612 m_buffer.putIntUnchecked(imm);
613 }
614
615 void testq_rr(RegisterID src, RegisterID dst)
616 {
617 m_buffer.putByte(REX_W);
618 m_buffer.putByte(OP_TEST_EvGv);
619 modRm_rr(src, dst);
620 }
621#endif
622
623 void xorl_i8r(int imm, RegisterID dst)
624 {
625 m_buffer.putByte(OP_GROUP1_EvIb);
626 modRm_opr(GROUP1_OP_XOR, dst);
627 m_buffer.putByte(imm);
628 }
629
630 void xorl_i32r(int imm, RegisterID dst)
631 {
632 m_buffer.putByte(OP_GROUP1_EvIz);
633 modRm_opr(GROUP1_OP_XOR, dst);
634 m_buffer.putInt(imm);
635 }
636
637 void xorl_rr(RegisterID src, RegisterID dst)
638 {
639 m_buffer.putByte(OP_XOR_EvGv);
640 modRm_rr(src, dst);
641 }
642
643 void sarl_i8r(int imm, RegisterID dst)
644 {
645 if (imm == 1) {
646 m_buffer.putByte(OP_GROUP2_Ev1);
647 modRm_opr(GROUP2_OP_SAR, dst);
648 } else {
649 m_buffer.putByte(OP_GROUP2_EvIb);
650 modRm_opr(GROUP2_OP_SAR, dst);
651 m_buffer.putByte(imm);
652 }
653 }
654
655 void sarl_CLr(RegisterID dst)
656 {
657 m_buffer.putByte(OP_GROUP2_EvCL);
658 modRm_opr(GROUP2_OP_SAR, dst);
659 }
660
661 void shll_i8r(int imm, RegisterID dst)
662 {
663 if (imm == 1) {
664 m_buffer.putByte(OP_GROUP2_Ev1);
665 modRm_opr(GROUP2_OP_SHL, dst);
666 } else {
667 m_buffer.putByte(OP_GROUP2_EvIb);
668 modRm_opr(GROUP2_OP_SHL, dst);
669 m_buffer.putByte(imm);
670 }
671 }
672
673 void shll_CLr(RegisterID dst)
674 {
675 m_buffer.putByte(OP_GROUP2_EvCL);
676 modRm_opr(GROUP2_OP_SHL, dst);
677 }
678
679 void xchgl_rr(RegisterID src, RegisterID dst)
680 {
681 m_buffer.putByte(OP_XCHG_EvGv);
682 modRm_rr(src, dst);
683 }
684
685 void imull_rr(RegisterID src, RegisterID dst)
686 {
687 m_buffer.putByte(OP_2BYTE_ESCAPE);
688 m_buffer.putByte(OP2_IMUL_GvEv);
689 modRm_rr(dst, src);
690 }
691
692 void imull_i32r(RegisterID src, int32_t value, RegisterID dst)
693 {
694 m_buffer.putByte(OP_IMUL_GvEvIz);
695 modRm_rr(dst, src);
696 m_buffer.putInt(value);
697 }
698
699 void idivl_r(RegisterID dst)
700 {
701 m_buffer.putByte(OP_GROUP3_Ev);
702 modRm_opr(GROUP3_OP_IDIV, dst);
703 }
704
705 void cdq()
706 {
707 m_buffer.putByte(OP_CDQ);
708 }
709
710 void movl_mr(RegisterID base, RegisterID dst)
711 {
712 m_buffer.putByte(OP_MOV_GvEv);
713 modRm_rm(dst, base);
714 }
715
716 void movl_mr(int offset, RegisterID base, RegisterID dst)
717 {
718 m_buffer.ensureSpace(maxInstructionSize);
719 m_buffer.putByteUnchecked(OP_MOV_GvEv);
720 modRm_rm_Unchecked(dst, base, offset);
721 }
722
723#if PLATFORM(X86_64)
724 void movq_mr(RegisterID base, RegisterID dst)
725 {
726 m_buffer.putByte(REX_W);
727 m_buffer.putByte(OP_MOV_GvEv);
728 modRm_rm(dst, base);
729 }
730
731 void movq_mr(int offset, RegisterID base, RegisterID dst)
732 {
733 m_buffer.ensureSpace(maxInstructionSize);
734 m_buffer.putByteUnchecked(REX_W);
735 m_buffer.putByteUnchecked(OP_MOV_GvEv);
736 modRm_rm_Unchecked(dst, base, offset);
737 }
738#endif
739
740#if !PLATFORM(X86_64)
741 void movl_mr(void* addr, RegisterID dst)
742 {
743 m_buffer.putByte(OP_MOV_GvEv);
744 modRm_rm(dst, addr);
745 }
746#endif
747
748 void movl_mr(int offset, RegisterID base, RegisterID index, int scale, RegisterID dst)
749 {
750 m_buffer.putByte(OP_MOV_GvEv);
751 modRm_rmsib(dst, base, index, scale, offset);
752 }
753
754 void movl_mr(RegisterID base, RegisterID index, int scale, RegisterID dst)
755 {
756 m_buffer.putByte(OP_MOV_GvEv);
757 modRm_rmsib(dst, base, index, scale);
758 }
759
760 void movzbl_rr(RegisterID src, RegisterID dst)
761 {
762 m_buffer.putByte(OP_2BYTE_ESCAPE);
763 m_buffer.putByte(OP2_MOVZX_GvEb);
764 modRm_rr(dst, src);
765 }
766
767 void movzwl_mr(int offset, RegisterID base, RegisterID dst)
768 {
769 m_buffer.putByte(OP_2BYTE_ESCAPE);
770 m_buffer.putByte(OP2_MOVZX_GvEw);
771 modRm_rm(dst, base, offset);
772 }
773
774 void movzwl_mr(RegisterID base, RegisterID index, int scale, RegisterID dst)
775 {
776 m_buffer.putByte(OP_2BYTE_ESCAPE);
777 m_buffer.putByte(OP2_MOVZX_GvEw);
778 modRm_rmsib(dst, base, index, scale);
779 }
780
781 void movzwl_mr(int offset, RegisterID base, RegisterID index, int scale, RegisterID dst)
782 {
783 m_buffer.putByte(OP_2BYTE_ESCAPE);
784 m_buffer.putByte(OP2_MOVZX_GvEw);
785 modRm_rmsib(dst, base, index, scale, offset);
786 }
787
788 void movl_rm(RegisterID src, RegisterID base)
789 {
790 m_buffer.putByte(OP_MOV_EvGv);
791 modRm_rm(src, base);
792 }
793
794 void movl_rm(RegisterID src, int offset, RegisterID base)
795 {
796 m_buffer.ensureSpace(maxInstructionSize);
797 m_buffer.putByteUnchecked(OP_MOV_EvGv);
798 modRm_rm_Unchecked(src, base, offset);
799 }
800
801#if PLATFORM(X86_64)
802 void movq_rm(RegisterID src, RegisterID base)
803 {
804 m_buffer.putByte(REX_W);
805 m_buffer.putByte(OP_MOV_EvGv);
806 modRm_rm(src, base);
807 }
808
809 void movq_rm(RegisterID src, int offset, RegisterID base)
810 {
811 m_buffer.ensureSpace(maxInstructionSize);
812 m_buffer.putByteUnchecked(REX_W);
813 m_buffer.putByteUnchecked(OP_MOV_EvGv);
814 modRm_rm_Unchecked(src, base, offset);
815 }
816#endif
817
818 void movl_rm(RegisterID src, RegisterID base, RegisterID index, int scale)
819 {
820 m_buffer.putByte(OP_MOV_EvGv);
821 modRm_rmsib(src, base, index, scale);
822 }
823
824 void movl_rm(RegisterID src, int offset, RegisterID base, RegisterID index, int scale)
825 {
826 m_buffer.putByte(OP_MOV_EvGv);
827 modRm_rmsib(src, base, index, scale, offset);
828 }
829
830 void movl_i32r(int imm, RegisterID dst)
831 {
832 m_buffer.putByte(OP_GROUP11_EvIz);
833 modRm_opr(GROUP11_MOV, dst);
834 m_buffer.putInt(imm);
835 }
836
837 void movl_i32m(int imm, RegisterID base)
838 {
839 m_buffer.ensureSpace(maxInstructionSize);
840 m_buffer.putByteUnchecked(OP_GROUP11_EvIz);
841 modRm_opm_Unchecked(GROUP11_MOV, base);
842 m_buffer.putIntUnchecked(imm);
843 }
844
845 void movl_i32m(int imm, int offset, RegisterID base)
846 {
847 m_buffer.ensureSpace(maxInstructionSize);
848 m_buffer.putByteUnchecked(OP_GROUP11_EvIz);
849 modRm_opm_Unchecked(GROUP11_MOV, base, offset);
850 m_buffer.putIntUnchecked(imm);
851 }
852
853#if !PLATFORM(X86_64)
854 void movl_i32m(int imm, void* addr)
855 {
856 m_buffer.putByte(OP_GROUP11_EvIz);
857 modRm_opm(GROUP11_MOV, addr);
858 m_buffer.putInt(imm);
859 }
860#endif
861
862 void leal_mr(int offset, RegisterID base, RegisterID dst)
863 {
864 m_buffer.putByte(OP_LEA);
865 modRm_rm(dst, base, offset);
866 }
867
868 void leal_mr(int offset, RegisterID index, int scale, RegisterID dst)
869 {
870 m_buffer.putByte(OP_LEA);
871 modRm_rmsib(dst, X86::noBase, index, scale, offset);
872 }
873
874 void ret()
875 {
876 m_buffer.putByte(OP_RET);
877 }
878
879 void jmp_r(RegisterID dst)
880 {
881 m_buffer.putByte(OP_GROUP5_Ev);
882 modRm_opr(GROUP5_OP_JMPN, dst);
883 }
884
885 void jmp_m(RegisterID base)
886 {
887 m_buffer.putByte(OP_GROUP5_Ev);
888 modRm_opm(GROUP5_OP_JMPN, base);
889 }
890
891 void jmp_m(int offset, RegisterID base)
892 {
893 m_buffer.putByte(OP_GROUP5_Ev);
894 modRm_opm(GROUP5_OP_JMPN, base, offset);
895 }
896
897 void movsd_mr(int offset, RegisterID base, XMMRegisterID dst)
898 {
899 m_buffer.putByte(PRE_SSE_F2);
900 m_buffer.putByte(OP_2BYTE_ESCAPE);
901 m_buffer.putByte(OP2_MOVSD_VsdWsd);
902 modRm_rm((RegisterID)dst, base, offset);
903 }
904
905 void movsd_rm(XMMRegisterID src, int offset, RegisterID base)
906 {
907 m_buffer.putByte(PRE_SSE_F2);
908 m_buffer.putByte(OP_2BYTE_ESCAPE);
909 m_buffer.putByte(OP2_MOVSD_WsdVsd);
910 modRm_rm((RegisterID)src, base, offset);
911 }
912
913 void movd_rr(XMMRegisterID src, RegisterID dst)
914 {
915 m_buffer.putByte(PRE_SSE_66);
916 m_buffer.putByte(OP_2BYTE_ESCAPE);
917 m_buffer.putByte(OP2_MOVD_EdVd);
918 modRm_rr((RegisterID)src, dst);
919 }
920
921 void cvtsi2sd_rr(RegisterID src, XMMRegisterID dst)
922 {
923 m_buffer.putByte(PRE_SSE_F2);
924 m_buffer.putByte(OP_2BYTE_ESCAPE);
925 m_buffer.putByte(OP2_CVTSI2SD_VsdEd);
926 modRm_rr((RegisterID)dst, src);
927 }
928
929 void cvttsd2si_rr(XMMRegisterID src, RegisterID dst)
930 {
931 m_buffer.putByte(PRE_SSE_F2);
932 m_buffer.putByte(OP_2BYTE_ESCAPE);
933 m_buffer.putByte(OP2_CVTTSD2SI_GdWsd);
934 modRm_rr(dst, (RegisterID)src);
935 }
936
937 void addsd_mr(int offset, RegisterID base, XMMRegisterID dst)
938 {
939 m_buffer.putByte(PRE_SSE_F2);
940 m_buffer.putByte(OP_2BYTE_ESCAPE);
941 m_buffer.putByte(OP2_ADDSD_VsdWsd);
942 modRm_rm((RegisterID)dst, base, offset);
943 }
944
945 void subsd_mr(int offset, RegisterID base, XMMRegisterID dst)
946 {
947 m_buffer.putByte(PRE_SSE_F2);
948 m_buffer.putByte(OP_2BYTE_ESCAPE);
949 m_buffer.putByte(OP2_SUBSD_VsdWsd);
950 modRm_rm((RegisterID)dst, base, offset);
951 }
952
953 void mulsd_mr(int offset, RegisterID base, XMMRegisterID dst)
954 {
955 m_buffer.putByte(PRE_SSE_F2);
956 m_buffer.putByte(OP_2BYTE_ESCAPE);
957 m_buffer.putByte(OP2_MULSD_VsdWsd);
958 modRm_rm((RegisterID)dst, base, offset);
959 }
960
961 void addsd_rr(XMMRegisterID src, XMMRegisterID dst)
962 {
963 m_buffer.putByte(PRE_SSE_F2);
964 m_buffer.putByte(OP_2BYTE_ESCAPE);
965 m_buffer.putByte(OP2_ADDSD_VsdWsd);
966 modRm_rr((RegisterID)dst, (RegisterID)src);
967 }
968
969 void subsd_rr(XMMRegisterID src, XMMRegisterID dst)
970 {
971 m_buffer.putByte(PRE_SSE_F2);
972 m_buffer.putByte(OP_2BYTE_ESCAPE);
973 m_buffer.putByte(OP2_SUBSD_VsdWsd);
974 modRm_rr((RegisterID)dst, (RegisterID)src);
975 }
976
977 void mulsd_rr(XMMRegisterID src, XMMRegisterID dst)
978 {
979 m_buffer.putByte(PRE_SSE_F2);
980 m_buffer.putByte(OP_2BYTE_ESCAPE);
981 m_buffer.putByte(OP2_MULSD_VsdWsd);
982 modRm_rr((RegisterID)dst, (RegisterID)src);
983 }
984
985 void ucomis_rr(XMMRegisterID src, XMMRegisterID dst)
986 {
987 m_buffer.putByte(PRE_SSE_66);
988 m_buffer.putByte(OP_2BYTE_ESCAPE);
989 m_buffer.putByte(OP2_UCOMISD_VsdWsd);
990 modRm_rr((RegisterID)dst, (RegisterID)src);
991 }
992
993 void pextrw_irr(int whichWord, XMMRegisterID src, RegisterID dst)
994 {
995 m_buffer.putByte(PRE_SSE_66);
996 m_buffer.putByte(OP_2BYTE_ESCAPE);
997 m_buffer.putByte(OP2_PEXTRW_GdUdIb);
998 modRm_rr(dst, (RegisterID)src);
999 m_buffer.putByte(whichWord);
1000 }
1001
1002 JmpSrc call()
1003 {
1004 m_buffer.putByte(OP_CALL_rel32);
1005 m_buffer.putInt(0); // FIXME: make this point to a global label, linked later.
1006 return JmpSrc(m_buffer.size());
1007 }
1008
1009 JmpSrc call(RegisterID dst)
1010 {
1011 m_buffer.putByte(OP_GROUP5_Ev);
1012 modRm_opr(GROUP5_OP_CALLN, dst);
1013 return JmpSrc(m_buffer.size());
1014 }
1015
1016 JmpDst label()
1017 {
1018 return JmpDst(m_buffer.size());
1019 }
1020
1021 JmpDst align(int alignment)
1022 {
1023 while (!m_buffer.isAligned(alignment))
1024 m_buffer.putByte(OP_HLT);
1025
1026 return label();
1027 }
1028
1029 JmpSrc jmp()
1030 {
1031 m_buffer.putByte(OP_JMP_rel32);
1032 m_buffer.putInt(0);
1033 return JmpSrc(m_buffer.size());
1034 }
1035
1036 JmpSrc jne()
1037 {
1038 m_buffer.putByte(OP_2BYTE_ESCAPE);
1039 m_buffer.putByte(OP2_JNE_rel32);
1040 m_buffer.putInt(0);
1041 return JmpSrc(m_buffer.size());
1042 }
1043
1044 JmpSrc jnz()
1045 {
1046 return jne();
1047 }
1048
1049 JmpSrc je()
1050 {
1051 m_buffer.ensureSpace(maxInstructionSize);
1052 m_buffer.putByteUnchecked(OP_2BYTE_ESCAPE);
1053 m_buffer.putByteUnchecked(OP2_JE_rel32);
1054 m_buffer.putIntUnchecked(0);
1055 return JmpSrc(m_buffer.size());
1056 }
1057
1058 JmpSrc jl()
1059 {
1060 m_buffer.putByte(OP_2BYTE_ESCAPE);
1061 m_buffer.putByte(OP2_JL_rel32);
1062 m_buffer.putInt(0);
1063 return JmpSrc(m_buffer.size());
1064 }
1065
1066 JmpSrc jb()
1067 {
1068 m_buffer.putByte(OP_2BYTE_ESCAPE);
1069 m_buffer.putByte(OP2_JB_rel32);
1070 m_buffer.putInt(0);
1071 return JmpSrc(m_buffer.size());
1072 }
1073
1074 JmpSrc jle()
1075 {
1076 m_buffer.putByte(OP_2BYTE_ESCAPE);
1077 m_buffer.putByte(OP2_JLE_rel32);
1078 m_buffer.putInt(0);
1079 return JmpSrc(m_buffer.size());
1080 }
1081
1082 JmpSrc jbe()
1083 {
1084 m_buffer.putByte(OP_2BYTE_ESCAPE);
1085 m_buffer.putByte(OP2_JBE_rel32);
1086 m_buffer.putInt(0);
1087 return JmpSrc(m_buffer.size());
1088 }
1089
1090 JmpSrc jge()
1091 {
1092 m_buffer.putByte(OP_2BYTE_ESCAPE);
1093 m_buffer.putByte(OP2_JGE_rel32);
1094 m_buffer.putInt(0);
1095 return JmpSrc(m_buffer.size());
1096 }
1097
1098 JmpSrc jg()
1099 {
1100 m_buffer.putByte(OP_2BYTE_ESCAPE);
1101 m_buffer.putByte(OP2_JG_rel32);
1102 m_buffer.putInt(0);
1103 return JmpSrc(m_buffer.size());
1104 }
1105
1106 JmpSrc ja()
1107 {
1108 m_buffer.putByte(OP_2BYTE_ESCAPE);
1109 m_buffer.putByte(OP2_JA_rel32);
1110 m_buffer.putInt(0);
1111 return JmpSrc(m_buffer.size());
1112 }
1113
1114 JmpSrc jae()
1115 {
1116 m_buffer.putByte(OP_2BYTE_ESCAPE);
1117 m_buffer.putByte(OP2_JAE_rel32);
1118 m_buffer.putInt(0);
1119 return JmpSrc(m_buffer.size());
1120 }
1121
1122 JmpSrc jo()
1123 {
1124 m_buffer.putByte(OP_2BYTE_ESCAPE);
1125 m_buffer.putByte(OP2_JO_rel32);
1126 m_buffer.putInt(0);
1127 return JmpSrc(m_buffer.size());
1128 }
1129
1130 JmpSrc jp()
1131 {
1132 m_buffer.putByte(OP_2BYTE_ESCAPE);
1133 m_buffer.putByte(OP2_JP_rel32);
1134 m_buffer.putInt(0);
1135 return JmpSrc(m_buffer.size());
1136 }
1137
1138 JmpSrc js()
1139 {
1140 m_buffer.putByte(OP_2BYTE_ESCAPE);
1141 m_buffer.putByte(OP2_JS_rel32);
1142 m_buffer.putInt(0);
1143 return JmpSrc(m_buffer.size());
1144 }
1145
1146 void predictNotTaken()
1147 {
1148 m_buffer.putByte(PRE_PREDICT_BRANCH_NOT_TAKEN);
1149 }
1150
1151 void link(JmpSrc from, JmpDst to)
1152 {
1153 ASSERT(to.m_offset != -1);
1154 ASSERT(from.m_offset != -1);
1155
1156 reinterpret_cast<int*>(reinterpret_cast<ptrdiff_t>(m_buffer.data()) + from.m_offset)[-1] = to.m_offset - from.m_offset;
1157 }
1158
1159 static void repatchAddress(void* code, JmpDst position, void* value)
1160 {
1161 ASSERT(position.m_offset != -1);
1162
1163 reinterpret_cast<void**>(reinterpret_cast<ptrdiff_t>(code) + position.m_offset)[-1] = value;
1164 }
1165
1166 static void link(void* code, JmpSrc from, void* to)
1167 {
1168 ASSERT(from.m_offset != -1);
1169
1170 reinterpret_cast<int*>(reinterpret_cast<ptrdiff_t>(code) + from.m_offset)[-1] = reinterpret_cast<ptrdiff_t>(to) - (reinterpret_cast<ptrdiff_t>(code) + from.m_offset);
1171 }
1172
1173 static void* getRelocatedAddress(void* code, JmpSrc jump)
1174 {
1175 return reinterpret_cast<void*>(reinterpret_cast<ptrdiff_t>(code) + jump.m_offset);
1176 }
1177
1178 static void* getRelocatedAddress(void* code, JmpDst destination)
1179 {
1180 ASSERT(destination.m_offset != -1);
1181
1182 return reinterpret_cast<void*>(reinterpret_cast<ptrdiff_t>(code) + destination.m_offset);
1183 }
1184
1185 static int getDifferenceBetweenLabels(JmpDst src, JmpDst dst)
1186 {
1187 return dst.m_offset - src.m_offset;
1188 }
1189
1190 static int getDifferenceBetweenLabels(JmpDst src, JmpSrc dst)
1191 {
1192 return dst.m_offset - src.m_offset;
1193 }
1194
1195 static int getDifferenceBetweenLabels(JmpSrc src, JmpDst dst)
1196 {
1197 return dst.m_offset - src.m_offset;
1198 }
1199
1200 static void repatchImmediate(intptr_t where, int32_t value)
1201 {
1202 reinterpret_cast<int32_t*>(where)[-1] = value;
1203 }
1204
1205 static void repatchDisplacement(intptr_t where, intptr_t value)
1206 {
1207 reinterpret_cast<intptr_t*>(where)[-1] = value;
1208 }
1209
1210 static void repatchBranchOffset(intptr_t where, void* destination)
1211 {
1212 reinterpret_cast<intptr_t*>(where)[-1] = (reinterpret_cast<intptr_t>(destination) - where);
1213 }
1214
1215 void* executableCopy(ExecutablePool* allocator)
1216 {
1217 void* copy = m_buffer.executableCopy(allocator);
1218 ASSERT(copy);
1219 return copy;
1220 }
1221
1222private:
1223 void modRm_rr(RegisterID reg, RegisterID rm)
1224 {
1225 m_buffer.ensureSpace(maxInstructionSize);
1226 modRm_rr_Unchecked(reg, rm);
1227 }
1228
1229 void modRm_rr_Unchecked(RegisterID reg, RegisterID rm)
1230 {
1231 m_buffer.putByteUnchecked(MODRM(3, reg, rm));
1232 }
1233
1234#if !PLATFORM(X86_64)
1235 void modRm_rm(RegisterID reg, void* addr)
1236 {
1237 m_buffer.putByte(MODRM(0, reg, X86::noBase));
1238 m_buffer.putInt((int)addr);
1239 }
1240#endif
1241
1242 void modRm_rm_Unchecked(RegisterID reg, RegisterID base)
1243 {
1244 if (base == X86::esp) {
1245 m_buffer.putByteUnchecked(MODRM(0, reg, X86::hasSib));
1246 m_buffer.putByteUnchecked(SIB(0, X86::noScale, X86::esp));
1247 } else {
1248 m_buffer.putByteUnchecked(MODRM(0, reg, base));
1249 }
1250 }
1251
1252 void modRm_rm(RegisterID reg, RegisterID base)
1253 {
1254 if (base == X86::esp) {
1255 m_buffer.putByte(MODRM(0, reg, X86::hasSib));
1256 m_buffer.putByte(SIB(0, X86::noScale, X86::esp));
1257 } else
1258 m_buffer.putByte(MODRM(0, reg, base));
1259 }
1260
1261 void modRm_rm_Unchecked(RegisterID reg, RegisterID base, int offset)
1262 {
1263 if (base == X86::esp) {
1264 if (CAN_SIGN_EXTEND_8_32(offset)) {
1265 m_buffer.putByteUnchecked(MODRM(1, reg, X86::hasSib));
1266 m_buffer.putByteUnchecked(SIB(0, X86::noScale, X86::esp));
1267 m_buffer.putByteUnchecked(offset);
1268 } else {
1269 m_buffer.putByteUnchecked(MODRM(2, reg, X86::hasSib));
1270 m_buffer.putByteUnchecked(SIB(0, X86::noScale, X86::esp));
1271 m_buffer.putIntUnchecked(offset);
1272 }
1273 } else {
1274 if (CAN_SIGN_EXTEND_8_32(offset)) {
1275 m_buffer.putByteUnchecked(MODRM(1, reg, base));
1276 m_buffer.putByteUnchecked(offset);
1277 } else {
1278 m_buffer.putByteUnchecked(MODRM(2, reg, base));
1279 m_buffer.putIntUnchecked(offset);
1280 }
1281 }
1282 }
1283
1284 void modRm_rm(RegisterID reg, RegisterID base, int offset)
1285 {
1286 m_buffer.ensureSpace(maxInstructionSize);
1287 modRm_rm_Unchecked(reg, base, offset);
1288 }
1289
1290 void modRm_rmsib(RegisterID reg, RegisterID base, RegisterID index, int scale)
1291 {
1292 int shift = 0;
1293 while (scale >>= 1)
1294 shift++;
1295
1296 m_buffer.putByte(MODRM(0, reg, X86::hasSib));
1297 m_buffer.putByte(SIB(shift, index, base));
1298 }
1299
1300 void modRm_rmsib(RegisterID reg, RegisterID base, RegisterID index, int scale, int offset)
1301 {
1302 int shift = 0;
1303 while (scale >>= 1)
1304 shift++;
1305
1306 if (CAN_SIGN_EXTEND_8_32(offset)) {
1307 m_buffer.putByte(MODRM(1, reg, X86::hasSib));
1308 m_buffer.putByte(SIB(shift, index, base));
1309 m_buffer.putByte(offset);
1310 } else {
1311 m_buffer.putByte(MODRM(2, reg, X86::hasSib));
1312 m_buffer.putByte(SIB(shift, index, base));
1313 m_buffer.putInt(offset);
1314 }
1315 }
1316
1317 void modRm_opr(OpcodeID opcodeID, RegisterID rm)
1318 {
1319 m_buffer.ensureSpace(maxInstructionSize);
1320 modRm_opr_Unchecked(opcodeID, rm);
1321 }
1322
1323 void modRm_opr_Unchecked(OpcodeID opcodeID, RegisterID rm)
1324 {
1325 modRm_rr_Unchecked(static_cast<RegisterID>(opcodeID), rm);
1326 }
1327
1328 void modRm_opm(OpcodeID opcodeID, RegisterID base)
1329 {
1330 modRm_rm(static_cast<RegisterID>(opcodeID), base);
1331 }
1332
1333 void modRm_opm_Unchecked(OpcodeID opcodeID, RegisterID base)
1334 {
1335 modRm_rm_Unchecked(static_cast<RegisterID>(opcodeID), base);
1336 }
1337
1338 void modRm_opm_Unchecked(OpcodeID opcodeID, RegisterID base, int offset)
1339 {
1340 modRm_rm_Unchecked(static_cast<RegisterID>(opcodeID), base, offset);
1341 }
1342
1343 void modRm_opm(OpcodeID opcodeID, RegisterID base, int offset)
1344 {
1345 modRm_rm(static_cast<RegisterID>(opcodeID), base, offset);
1346 }
1347
1348#if !PLATFORM(X86_64)
1349 void modRm_opm(OpcodeID opcodeID, void* addr)
1350 {
1351 modRm_rm(static_cast<RegisterID>(opcodeID), addr);
1352 }
1353#endif
1354
1355 void modRm_opmsib(OpcodeID opcodeID, RegisterID base, RegisterID index, int scale, int offset)
1356 {
1357 modRm_rmsib(static_cast<RegisterID>(opcodeID), base, index, scale, offset);
1358 }
1359
1360 void modRm_opmsib(OpcodeID opcodeID, RegisterID base, RegisterID index, int scale)
1361 {
1362 modRm_rmsib(static_cast<RegisterID>(opcodeID), base, index, scale);
1363 }
1364
1365 AssemblerBuffer m_buffer;
1366};
1367
1368} // namespace JSC
1369
1370#endif // ENABLE(ASSEMBLER) && PLATFORM(X86)
1371
1372#endif // X86Assembler_h
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