1 | /*
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2 | * Copyright (C) 2008 Apple Inc. All rights reserved.
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3 | *
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4 | * Redistribution and use in source and binary forms, with or without
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5 | * modification, are permitted provided that the following conditions
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6 | * are met:
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7 | * 1. Redistributions of source code must retain the above copyright
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8 | * notice, this list of conditions and the following disclaimer.
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9 | * 2. Redistributions in binary form must reproduce the above copyright
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10 | * notice, this list of conditions and the following disclaimer in the
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11 | * documentation and/or other materials provided with the distribution.
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12 | *
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13 | * THIS SOFTWARE IS PROVIDED BY APPLE INC. ``AS IS'' AND ANY
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14 | * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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15 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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16 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL APPLE INC. OR
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17 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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18 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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19 | * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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20 | * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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21 | * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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22 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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23 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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24 | */
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25 |
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26 | #include "config.h"
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27 | #include "JIT.h"
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28 |
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29 | #if ENABLE(JIT)
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30 |
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31 | #include "CodeBlock.h"
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32 | #include "JITInlineMethods.h"
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33 | #include "JSArray.h"
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34 | #include "JSFunction.h"
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35 | #include "Interpreter.h"
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36 | #include "ResultType.h"
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37 | #include "SamplingTool.h"
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38 |
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39 | #ifndef NDEBUG
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40 | #include <stdio.h>
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41 | #endif
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42 |
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43 | #define __ m_assembler.
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44 |
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45 | using namespace std;
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46 |
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47 | namespace JSC {
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48 |
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49 | void JIT::compileFastArith_op_lshift(unsigned result, unsigned op1, unsigned op2)
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50 | {
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51 | emitGetVirtualRegisters(op1, regT0, op2, regT2);
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52 | // FIXME: would we be better using 'emitJumpSlowCaseIfNotImmediateIntegers'? - we *probably* ought to be consistent.
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53 | emitJumpSlowCaseIfNotImmediateInteger(regT0);
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54 | emitJumpSlowCaseIfNotImmediateInteger(regT2);
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55 | emitFastArithImmToInt(regT0);
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56 | emitFastArithImmToInt(regT2);
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57 | #if !PLATFORM(X86)
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58 | // Mask with 0x1f as per ecma-262 11.7.2 step 7.
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59 | // On 32-bit x86 this is not necessary, since the shift anount is implicitly masked in the instruction.
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60 | and32(Imm32(0x1f), regT2);
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61 | #endif
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62 | lshift32(regT2, regT0);
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63 | #if !USE(ALTERNATE_JSIMMEDIATE)
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64 | addSlowCase(branchAdd32(Overflow, regT0, regT0));
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65 | signExtend32ToPtr(regT0, regT0);
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66 | #endif
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67 | emitFastArithReTagImmediate(regT0, regT0);
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68 | emitPutVirtualRegister(result);
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69 | }
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70 | void JIT::compileFastArithSlow_op_lshift(unsigned result, unsigned op1, unsigned op2, Vector<SlowCaseEntry>::iterator& iter)
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71 | {
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72 | #if USE(ALTERNATE_JSIMMEDIATE)
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73 | UNUSED_PARAM(op1);
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74 | UNUSED_PARAM(op2);
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75 | linkSlowCase(iter);
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76 | linkSlowCase(iter);
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77 | #else
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78 | // If we are limited to 32-bit immediates there is a third slow case, which required the operands to have been reloaded.
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79 | Jump notImm1 = getSlowCase(iter);
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80 | Jump notImm2 = getSlowCase(iter);
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81 | linkSlowCase(iter);
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82 | emitGetVirtualRegisters(op1, regT0, op2, regT2);
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83 | notImm1.link(this);
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84 | notImm2.link(this);
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85 | #endif
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86 | emitPutJITStubArg(regT0, 1);
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87 | emitPutJITStubArg(regT2, 2);
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88 | emitCTICall(Interpreter::cti_op_lshift);
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89 | emitPutVirtualRegister(result);
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90 | }
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91 |
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92 | void JIT::compileFastArith_op_rshift(unsigned result, unsigned op1, unsigned op2)
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93 | {
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94 | if (isOperandConstantImmediateInt(op2)) {
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95 | emitGetVirtualRegister(op1, regT0);
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96 | emitJumpSlowCaseIfNotImmediateInteger(regT0);
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97 | // Mask with 0x1f as per ecma-262 11.7.2 step 7.
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98 | #if USE(ALTERNATE_JSIMMEDIATE)
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99 | rshift32(Imm32(getConstantOperandImmediateInt(op2) & 0x1f), regT0);
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100 | #else
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101 | rshiftPtr(Imm32(getConstantOperandImmediateInt(op2) & 0x1f), regT0);
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102 | #endif
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103 | } else {
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104 | emitGetVirtualRegisters(op1, regT0, op2, regT2);
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105 | emitJumpSlowCaseIfNotImmediateInteger(regT0);
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106 | emitJumpSlowCaseIfNotImmediateInteger(regT2);
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107 | emitFastArithImmToInt(regT2);
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108 | #if !PLATFORM(X86)
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109 | // Mask with 0x1f as per ecma-262 11.7.2 step 7.
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110 | // On 32-bit x86 this is not necessary, since the shift anount is implicitly masked in the instruction.
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111 | and32(Imm32(0x1f), regT2);
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112 | #endif
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113 | #if USE(ALTERNATE_JSIMMEDIATE)
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114 | rshift32(regT2, regT0);
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115 | #else
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116 | rshiftPtr(regT2, regT0);
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117 | #endif
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118 | }
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119 | #if USE(ALTERNATE_JSIMMEDIATE)
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120 | emitFastArithIntToImmNoCheck(regT0, regT0);
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121 | #else
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122 | orPtr(Imm32(JSImmediate::TagTypeNumber), regT0);
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123 | #endif
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124 | emitPutVirtualRegister(result);
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125 | }
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126 | void JIT::compileFastArithSlow_op_rshift(unsigned result, unsigned, unsigned op2, Vector<SlowCaseEntry>::iterator& iter)
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127 | {
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128 | linkSlowCase(iter);
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129 | if (isOperandConstantImmediateInt(op2))
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130 | emitPutJITStubArgFromVirtualRegister(op2, 2, regT2);
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131 | else {
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132 | linkSlowCase(iter);
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133 | emitPutJITStubArg(regT2, 2);
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134 | }
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135 |
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136 | emitPutJITStubArg(regT0, 1);
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137 | emitCTICall(Interpreter::cti_op_rshift);
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138 | emitPutVirtualRegister(result);
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139 | }
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140 |
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141 | void JIT::compileFastArith_op_bitand(unsigned result, unsigned op1, unsigned op2)
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142 | {
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143 | if (isOperandConstantImmediateInt(op1)) {
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144 | emitGetVirtualRegister(op2, regT0);
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145 | emitJumpSlowCaseIfNotImmediateInteger(regT0);
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146 | #if USE(ALTERNATE_JSIMMEDIATE)
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147 | int32_t imm = getConstantOperandImmediateInt(op1);
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148 | andPtr(Imm32(imm), regT0);
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149 | if (imm >= 0)
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150 | emitFastArithIntToImmNoCheck(regT0, regT0);
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151 | #else
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152 | andPtr(Imm32(static_cast<int32_t>(JSImmediate::rawValue(getConstantOperand(op1)))), regT0);
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153 | #endif
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154 | } else if (isOperandConstantImmediateInt(op2)) {
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155 | emitGetVirtualRegister(op1, regT0);
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156 | emitJumpSlowCaseIfNotImmediateInteger(regT0);
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157 | #if USE(ALTERNATE_JSIMMEDIATE)
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158 | int32_t imm = getConstantOperandImmediateInt(op2);
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159 | andPtr(Imm32(imm), regT0);
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160 | if (imm >= 0)
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161 | emitFastArithIntToImmNoCheck(regT0, regT0);
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162 | #else
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163 | andPtr(Imm32(static_cast<int32_t>(JSImmediate::rawValue(getConstantOperand(op2)))), regT0);
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164 | #endif
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165 | } else {
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166 | emitGetVirtualRegisters(op1, regT0, op2, regT1);
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167 | andPtr(regT1, regT0);
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168 | emitJumpSlowCaseIfNotImmediateInteger(regT0);
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169 | }
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170 | emitPutVirtualRegister(result);
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171 | }
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172 | void JIT::compileFastArithSlow_op_bitand(unsigned result, unsigned op1, unsigned op2, Vector<SlowCaseEntry>::iterator& iter)
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173 | {
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174 | linkSlowCase(iter);
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175 | if (isOperandConstantImmediateInt(op1)) {
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176 | emitPutJITStubArgFromVirtualRegister(op1, 1, regT2);
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177 | emitPutJITStubArg(regT0, 2);
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178 | } else if (isOperandConstantImmediateInt(op2)) {
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179 | emitPutJITStubArg(regT0, 1);
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180 | emitPutJITStubArgFromVirtualRegister(op2, 2, regT2);
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181 | } else {
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182 | emitPutJITStubArgFromVirtualRegister(op1, 1, regT2);
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183 | emitPutJITStubArg(regT1, 2);
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184 | }
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185 | emitCTICall(Interpreter::cti_op_bitand);
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186 | emitPutVirtualRegister(result);
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187 | }
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188 |
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189 | #if PLATFORM(X86) || PLATFORM(X86_64)
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190 | void JIT::compileFastArith_op_mod(unsigned result, unsigned op1, unsigned op2)
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191 | {
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192 | emitGetVirtualRegisters(op1, X86::eax, op2, X86::ecx);
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193 | emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
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194 | emitJumpSlowCaseIfNotImmediateInteger(X86::ecx);
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195 | #if USE(ALTERNATE_JSIMMEDIATE)
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196 | addSlowCase(branchPtr(Equal, X86::ecx, ImmPtr(JSValuePtr::encode(js0()))));
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197 | m_assembler.cdq();
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198 | m_assembler.idivl_r(X86::ecx);
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199 | #else
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200 | emitFastArithDeTagImmediate(X86::eax);
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201 | addSlowCase(emitFastArithDeTagImmediateJumpIfZero(X86::ecx));
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202 | m_assembler.cdq();
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203 | m_assembler.idivl_r(X86::ecx);
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204 | signExtend32ToPtr(X86::edx, X86::edx);
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205 | #endif
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206 | emitFastArithReTagImmediate(X86::edx, X86::eax);
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207 | emitPutVirtualRegister(result);
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208 | }
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209 | void JIT::compileFastArithSlow_op_mod(unsigned result, unsigned, unsigned, Vector<SlowCaseEntry>::iterator& iter)
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210 | {
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211 | #if USE(ALTERNATE_JSIMMEDIATE)
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212 | linkSlowCase(iter);
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213 | linkSlowCase(iter);
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214 | linkSlowCase(iter);
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215 | #else
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216 | Jump notImm1 = getSlowCase(iter);
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217 | Jump notImm2 = getSlowCase(iter);
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218 | linkSlowCase(iter);
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219 | emitFastArithReTagImmediate(X86::eax, X86::eax);
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220 | emitFastArithReTagImmediate(X86::ecx, X86::ecx);
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221 | notImm1.link(this);
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222 | notImm2.link(this);
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223 | #endif
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224 | emitPutJITStubArg(X86::eax, 1);
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225 | emitPutJITStubArg(X86::ecx, 2);
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226 | emitCTICall(Interpreter::cti_op_mod);
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227 | emitPutVirtualRegister(result);
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228 | }
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229 | #else
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230 | void JIT::compileFastArith_op_mod(unsigned result, unsigned op1, unsigned op2)
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231 | {
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232 | emitPutJITStubArgFromVirtualRegister(op1, 1, regT2);
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233 | emitPutJITStubArgFromVirtualRegister(op2, 2, regT2);
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234 | emitCTICall(Interpreter::cti_op_mod);
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235 | emitPutVirtualRegister(result);
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236 | }
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237 | void JIT::compileFastArithSlow_op_mod(unsigned, unsigned, unsigned, Vector<SlowCaseEntry>::iterator&)
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238 | {
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239 | ASSERT_NOT_REACHED();
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240 | }
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241 | #endif
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242 |
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243 | void JIT::compileFastArith_op_post_inc(unsigned result, unsigned srcDst)
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244 | {
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245 | emitGetVirtualRegister(srcDst, regT0);
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246 | move(regT0, regT1);
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247 | emitJumpSlowCaseIfNotImmediateInteger(regT0);
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248 | #if USE(ALTERNATE_JSIMMEDIATE)
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249 | addSlowCase(branchAdd32(Overflow, Imm32(1), regT1));
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250 | emitFastArithIntToImmNoCheck(regT1, regT1);
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251 | #else
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252 | addSlowCase(branchAdd32(Overflow, Imm32(1 << JSImmediate::IntegerPayloadShift), regT1));
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253 | signExtend32ToPtr(regT1, regT1);
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254 | #endif
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255 | emitPutVirtualRegister(srcDst, regT1);
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256 | emitPutVirtualRegister(result);
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257 | }
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258 | void JIT::compileFastArithSlow_op_post_inc(unsigned result, unsigned srcDst, Vector<SlowCaseEntry>::iterator& iter)
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259 | {
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260 | linkSlowCase(iter);
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261 | linkSlowCase(iter);
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262 | emitPutJITStubArg(regT0, 1);
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263 | emitCTICall(Interpreter::cti_op_post_inc);
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264 | emitPutVirtualRegister(srcDst, regT1);
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265 | emitPutVirtualRegister(result);
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266 | }
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267 |
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268 | void JIT::compileFastArith_op_post_dec(unsigned result, unsigned srcDst)
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269 | {
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270 | emitGetVirtualRegister(srcDst, regT0);
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271 | move(regT0, regT1);
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272 | emitJumpSlowCaseIfNotImmediateInteger(regT0);
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273 | #if USE(ALTERNATE_JSIMMEDIATE)
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274 | addSlowCase(branchSub32(Zero, Imm32(1), regT1));
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275 | emitFastArithIntToImmNoCheck(regT1, regT1);
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276 | #else
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277 | addSlowCase(branchSub32(Zero, Imm32(1 << JSImmediate::IntegerPayloadShift), regT1));
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278 | signExtend32ToPtr(regT1, regT1);
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279 | #endif
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280 | emitPutVirtualRegister(srcDst, regT1);
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281 | emitPutVirtualRegister(result);
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282 | }
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283 | void JIT::compileFastArithSlow_op_post_dec(unsigned result, unsigned srcDst, Vector<SlowCaseEntry>::iterator& iter)
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284 | {
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285 | linkSlowCase(iter);
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286 | linkSlowCase(iter);
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287 | emitPutJITStubArg(regT0, 1);
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288 | emitCTICall(Interpreter::cti_op_post_dec);
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289 | emitPutVirtualRegister(srcDst, regT1);
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290 | emitPutVirtualRegister(result);
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291 | }
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292 |
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293 | void JIT::compileFastArith_op_pre_inc(unsigned srcDst)
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294 | {
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295 | emitGetVirtualRegister(srcDst, regT0);
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296 | emitJumpSlowCaseIfNotImmediateInteger(regT0);
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297 | #if USE(ALTERNATE_JSIMMEDIATE)
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298 | addSlowCase(branchAdd32(Overflow, Imm32(1), regT0));
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299 | emitFastArithIntToImmNoCheck(regT0, regT0);
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300 | #else
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301 | addSlowCase(branchAdd32(Overflow, Imm32(1 << JSImmediate::IntegerPayloadShift), regT0));
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302 | signExtend32ToPtr(regT0, regT0);
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303 | #endif
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304 | emitPutVirtualRegister(srcDst);
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305 | }
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306 | void JIT::compileFastArithSlow_op_pre_inc(unsigned srcDst, Vector<SlowCaseEntry>::iterator& iter)
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307 | {
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308 | Jump notImm = getSlowCase(iter);
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309 | linkSlowCase(iter);
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310 | emitGetVirtualRegister(srcDst, regT0);
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311 | notImm.link(this);
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312 | emitPutJITStubArg(regT0, 1);
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313 | emitCTICall(Interpreter::cti_op_pre_inc);
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314 | emitPutVirtualRegister(srcDst);
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315 | }
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316 |
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317 | void JIT::compileFastArith_op_pre_dec(unsigned srcDst)
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318 | {
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319 | emitGetVirtualRegister(srcDst, regT0);
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320 | emitJumpSlowCaseIfNotImmediateInteger(regT0);
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321 | #if USE(ALTERNATE_JSIMMEDIATE)
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322 | addSlowCase(branchSub32(Zero, Imm32(1), regT0));
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323 | emitFastArithIntToImmNoCheck(regT0, regT0);
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324 | #else
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325 | addSlowCase(branchSub32(Zero, Imm32(1 << JSImmediate::IntegerPayloadShift), regT0));
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326 | signExtend32ToPtr(regT0, regT0);
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327 | #endif
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328 | emitPutVirtualRegister(srcDst);
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329 | }
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330 | void JIT::compileFastArithSlow_op_pre_dec(unsigned srcDst, Vector<SlowCaseEntry>::iterator& iter)
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331 | {
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332 | Jump notImm = getSlowCase(iter);
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333 | linkSlowCase(iter);
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334 | emitGetVirtualRegister(srcDst, regT0);
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335 | notImm.link(this);
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336 | emitPutJITStubArg(regT0, 1);
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337 | emitCTICall(Interpreter::cti_op_pre_dec);
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338 | emitPutVirtualRegister(srcDst);
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339 | }
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340 |
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341 |
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342 | #if !ENABLE(JIT_OPTIMIZE_ARITHMETIC)
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343 |
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344 | void JIT::compileFastArith_op_add(Instruction* currentInstruction)
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345 | {
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346 | unsigned result = currentInstruction[1].u.operand;
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347 | unsigned op1 = currentInstruction[2].u.operand;
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348 | unsigned op2 = currentInstruction[3].u.operand;
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349 |
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350 | emitPutJITStubArgFromVirtualRegister(op1, 1, regT2);
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351 | emitPutJITStubArgFromVirtualRegister(op2, 2, regT2);
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352 | emitCTICall(Interpreter::cti_op_add);
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353 | emitPutVirtualRegister(result);
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354 | }
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355 | void JIT::compileFastArithSlow_op_add(Instruction*, Vector<SlowCaseEntry>::iterator&)
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356 | {
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357 | ASSERT_NOT_REACHED();
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358 | }
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359 |
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360 | void JIT::compileFastArith_op_mul(Instruction* currentInstruction)
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361 | {
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362 | unsigned result = currentInstruction[1].u.operand;
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363 | unsigned op1 = currentInstruction[2].u.operand;
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364 | unsigned op2 = currentInstruction[3].u.operand;
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365 |
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366 | emitPutJITStubArgFromVirtualRegister(op1, 1, regT2);
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367 | emitPutJITStubArgFromVirtualRegister(op2, 2, regT2);
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368 | emitCTICall(Interpreter::cti_op_mul);
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369 | emitPutVirtualRegister(result);
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370 | }
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371 | void JIT::compileFastArithSlow_op_mul(Instruction*, Vector<SlowCaseEntry>::iterator&)
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372 | {
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373 | ASSERT_NOT_REACHED();
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374 | }
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375 |
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376 | void JIT::compileFastArith_op_sub(Instruction* currentInstruction)
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377 | {
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378 | unsigned result = currentInstruction[1].u.operand;
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379 | unsigned op1 = currentInstruction[2].u.operand;
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380 | unsigned op2 = currentInstruction[3].u.operand;
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381 |
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382 | emitPutJITStubArgFromVirtualRegister(op1, 1, regT2);
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383 | emitPutJITStubArgFromVirtualRegister(op2, 2, regT2);
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384 | emitCTICall(Interpreter::cti_op_sub);
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385 | emitPutVirtualRegister(result);
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386 | }
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387 | void JIT::compileFastArithSlow_op_sub(Instruction*, Vector<SlowCaseEntry>::iterator&)
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388 | {
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389 | ASSERT_NOT_REACHED();
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390 | }
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391 |
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392 | #elif USE(ALTERNATE_JSIMMEDIATE) // *AND* ENABLE(JIT_OPTIMIZE_ARITHMETIC)
|
---|
393 |
|
---|
394 | void JIT::compileBinaryArithOp(OpcodeID opcodeID, unsigned, unsigned op1, unsigned op2, OperandTypes)
|
---|
395 | {
|
---|
396 | emitGetVirtualRegisters(op1, X86::eax, op2, X86::edx);
|
---|
397 | emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
|
---|
398 | emitJumpSlowCaseIfNotImmediateInteger(X86::edx);
|
---|
399 | if (opcodeID == op_add)
|
---|
400 | addSlowCase(branchAdd32(Overflow, X86::edx, X86::eax));
|
---|
401 | else if (opcodeID == op_sub)
|
---|
402 | addSlowCase(branchSub32(Overflow, X86::edx, X86::eax));
|
---|
403 | else {
|
---|
404 | ASSERT(opcodeID == op_mul);
|
---|
405 | addSlowCase(branchMul32(Overflow, X86::edx, X86::eax));
|
---|
406 | addSlowCase(branchTest32(Zero, X86::eax));
|
---|
407 | }
|
---|
408 | emitFastArithIntToImmNoCheck(X86::eax, X86::eax);
|
---|
409 | }
|
---|
410 |
|
---|
411 | void JIT::compileBinaryArithOpSlowCase(OpcodeID opcodeID, Vector<SlowCaseEntry>::iterator& iter, unsigned, unsigned op1, unsigned, OperandTypes types)
|
---|
412 | {
|
---|
413 | // We assume that subtracting TagTypeNumber is equivalent to adding DoubleEncodeOffset.
|
---|
414 | COMPILE_ASSERT(((JSImmediate::TagTypeNumber + JSImmediate::DoubleEncodeOffset) == 0), TagTypeNumber_PLUS_DoubleEncodeOffset_EQUALS_0);
|
---|
415 |
|
---|
416 | Jump notImm1 = getSlowCase(iter);
|
---|
417 | Jump notImm2 = getSlowCase(iter);
|
---|
418 |
|
---|
419 | linkSlowCase(iter); // Integer overflow case - we could handle this in JIT code, but this is likely rare.
|
---|
420 | if (opcodeID == op_mul) // op_mul has an extra slow case to handle 0 * negative number.
|
---|
421 | linkSlowCase(iter);
|
---|
422 | emitGetVirtualRegister(op1, X86::eax);
|
---|
423 |
|
---|
424 | Label stubFunctionCall(this);
|
---|
425 | emitPutJITStubArg(X86::eax, 1);
|
---|
426 | emitPutJITStubArg(X86::edx, 2);
|
---|
427 | if (opcodeID == op_add)
|
---|
428 | emitCTICall(Interpreter::cti_op_add);
|
---|
429 | else if (opcodeID == op_sub)
|
---|
430 | emitCTICall(Interpreter::cti_op_sub);
|
---|
431 | else {
|
---|
432 | ASSERT(opcodeID == op_mul);
|
---|
433 | emitCTICall(Interpreter::cti_op_mul);
|
---|
434 | }
|
---|
435 | Jump end = jump();
|
---|
436 |
|
---|
437 | // if we get here, eax is not an int32, edx not yet checked.
|
---|
438 | notImm1.link(this);
|
---|
439 | if (!types.first().definitelyIsNumber())
|
---|
440 | emitJumpIfNotImmediateNumber(X86::eax).linkTo(stubFunctionCall, this);
|
---|
441 | if (!types.second().definitelyIsNumber())
|
---|
442 | emitJumpIfNotImmediateNumber(X86::edx).linkTo(stubFunctionCall, this);
|
---|
443 | addPtr(tagTypeNumberRegister, X86::eax);
|
---|
444 | m_assembler.movq_rr(X86::eax, X86::xmm1);
|
---|
445 | Jump op2isDouble = emitJumpIfNotImmediateInteger(X86::edx);
|
---|
446 | m_assembler.cvtsi2sd_rr(X86::edx, X86::xmm2);
|
---|
447 | Jump op2wasInteger = jump();
|
---|
448 |
|
---|
449 | // if we get here, eax IS an int32, edx is not.
|
---|
450 | notImm2.link(this);
|
---|
451 | if (!types.second().definitelyIsNumber())
|
---|
452 | emitJumpIfNotImmediateNumber(X86::edx).linkTo(stubFunctionCall, this);
|
---|
453 | m_assembler.cvtsi2sd_rr(X86::eax, X86::xmm1);
|
---|
454 | op2isDouble.link(this);
|
---|
455 | addPtr(tagTypeNumberRegister, X86::edx);
|
---|
456 | m_assembler.movq_rr(X86::edx, X86::xmm2);
|
---|
457 | op2wasInteger.link(this);
|
---|
458 |
|
---|
459 | if (opcodeID == op_add)
|
---|
460 | m_assembler.addsd_rr(X86::xmm2, X86::xmm1);
|
---|
461 | else if (opcodeID == op_sub)
|
---|
462 | m_assembler.subsd_rr(X86::xmm2, X86::xmm1);
|
---|
463 | else {
|
---|
464 | ASSERT(opcodeID == op_mul);
|
---|
465 | m_assembler.mulsd_rr(X86::xmm2, X86::xmm1);
|
---|
466 | }
|
---|
467 | m_assembler.movq_rr(X86::xmm1, X86::eax);
|
---|
468 | subPtr(tagTypeNumberRegister, X86::eax);
|
---|
469 |
|
---|
470 | end.link(this);
|
---|
471 | }
|
---|
472 |
|
---|
473 | void JIT::compileFastArith_op_add(Instruction* currentInstruction)
|
---|
474 | {
|
---|
475 | unsigned result = currentInstruction[1].u.operand;
|
---|
476 | unsigned op1 = currentInstruction[2].u.operand;
|
---|
477 | unsigned op2 = currentInstruction[3].u.operand;
|
---|
478 | OperandTypes types = OperandTypes::fromInt(currentInstruction[4].u.operand);
|
---|
479 |
|
---|
480 | if (!types.first().mightBeNumber() || !types.second().mightBeNumber()) {
|
---|
481 | emitPutJITStubArgFromVirtualRegister(op1, 1, X86::ecx);
|
---|
482 | emitPutJITStubArgFromVirtualRegister(op2, 2, X86::ecx);
|
---|
483 | emitCTICall(Interpreter::cti_op_add);
|
---|
484 | emitPutVirtualRegister(result);
|
---|
485 | return;
|
---|
486 | }
|
---|
487 |
|
---|
488 | if (isOperandConstantImmediateInt(op1)) {
|
---|
489 | emitGetVirtualRegister(op2, X86::eax);
|
---|
490 | emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
|
---|
491 | addSlowCase(branchAdd32(Overflow, Imm32(getConstantOperandImmediateInt(op1)), X86::eax));
|
---|
492 | emitFastArithIntToImmNoCheck(X86::eax, X86::eax);
|
---|
493 | } else if (isOperandConstantImmediateInt(op2)) {
|
---|
494 | emitGetVirtualRegister(op1, X86::eax);
|
---|
495 | emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
|
---|
496 | addSlowCase(branchAdd32(Overflow, Imm32(getConstantOperandImmediateInt(op2)), X86::eax));
|
---|
497 | emitFastArithIntToImmNoCheck(X86::eax, X86::eax);
|
---|
498 | } else
|
---|
499 | compileBinaryArithOp(op_add, result, op1, op2, types);
|
---|
500 |
|
---|
501 | emitPutVirtualRegister(result);
|
---|
502 | }
|
---|
503 | void JIT::compileFastArithSlow_op_add(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
|
---|
504 | {
|
---|
505 | unsigned result = currentInstruction[1].u.operand;
|
---|
506 | unsigned op1 = currentInstruction[2].u.operand;
|
---|
507 | unsigned op2 = currentInstruction[3].u.operand;
|
---|
508 | OperandTypes types = OperandTypes::fromInt(currentInstruction[4].u.operand);
|
---|
509 |
|
---|
510 | if (isOperandConstantImmediateInt(op1)) {
|
---|
511 | linkSlowCase(iter);
|
---|
512 | linkSlowCase(iter);
|
---|
513 | emitPutJITStubArgFromVirtualRegister(op1, 1, X86::ecx);
|
---|
514 | emitPutJITStubArgFromVirtualRegister(op2, 2, X86::ecx);
|
---|
515 | emitCTICall(Interpreter::cti_op_add);
|
---|
516 | } else if (isOperandConstantImmediateInt(op2)) {
|
---|
517 | linkSlowCase(iter);
|
---|
518 | linkSlowCase(iter);
|
---|
519 | emitPutJITStubArgFromVirtualRegister(op1, 1, X86::ecx);
|
---|
520 | emitPutJITStubArgFromVirtualRegister(op2, 2, X86::ecx);
|
---|
521 | emitCTICall(Interpreter::cti_op_add);
|
---|
522 | } else
|
---|
523 | compileBinaryArithOpSlowCase(op_add, iter, result, op1, op2, types);
|
---|
524 |
|
---|
525 | emitPutVirtualRegister(result);
|
---|
526 | }
|
---|
527 |
|
---|
528 | void JIT::compileFastArith_op_mul(Instruction* currentInstruction)
|
---|
529 | {
|
---|
530 | unsigned result = currentInstruction[1].u.operand;
|
---|
531 | unsigned op1 = currentInstruction[2].u.operand;
|
---|
532 | unsigned op2 = currentInstruction[3].u.operand;
|
---|
533 | OperandTypes types = OperandTypes::fromInt(currentInstruction[4].u.operand);
|
---|
534 |
|
---|
535 | // For now, only plant a fast int case if the constant operand is greater than zero.
|
---|
536 | int32_t value;
|
---|
537 | if (isOperandConstantImmediateInt(op1) && ((value = getConstantOperandImmediateInt(op1)) > 0)) {
|
---|
538 | emitGetVirtualRegister(op2, X86::eax);
|
---|
539 | emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
|
---|
540 | addSlowCase(branchMul32(Overflow, Imm32(value), X86::eax, X86::eax));
|
---|
541 | emitFastArithReTagImmediate(X86::eax, X86::eax);
|
---|
542 | } else if (isOperandConstantImmediateInt(op2) && ((value = getConstantOperandImmediateInt(op2)) > 0)) {
|
---|
543 | emitGetVirtualRegister(op1, X86::eax);
|
---|
544 | emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
|
---|
545 | addSlowCase(branchMul32(Overflow, Imm32(value), X86::eax, X86::eax));
|
---|
546 | emitFastArithReTagImmediate(X86::eax, X86::eax);
|
---|
547 | } else
|
---|
548 | compileBinaryArithOp(op_mul, result, op1, op2, types);
|
---|
549 |
|
---|
550 | emitPutVirtualRegister(result);
|
---|
551 | }
|
---|
552 | void JIT::compileFastArithSlow_op_mul(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
|
---|
553 | {
|
---|
554 | unsigned result = currentInstruction[1].u.operand;
|
---|
555 | unsigned op1 = currentInstruction[2].u.operand;
|
---|
556 | unsigned op2 = currentInstruction[3].u.operand;
|
---|
557 | OperandTypes types = OperandTypes::fromInt(currentInstruction[4].u.operand);
|
---|
558 |
|
---|
559 | if ((isOperandConstantImmediateInt(op1) && (getConstantOperandImmediateInt(op1) > 0))
|
---|
560 | || (isOperandConstantImmediateInt(op2) && (getConstantOperandImmediateInt(op2) > 0))) {
|
---|
561 | linkSlowCase(iter);
|
---|
562 | linkSlowCase(iter);
|
---|
563 | // There is an extra slow case for (op1 * -N) or (-N * op2), to check for 0 since this should produce a result of -0.
|
---|
564 | emitPutJITStubArgFromVirtualRegister(op1, 1, X86::ecx);
|
---|
565 | emitPutJITStubArgFromVirtualRegister(op2, 2, X86::ecx);
|
---|
566 | emitCTICall(Interpreter::cti_op_mul);
|
---|
567 | } else
|
---|
568 | compileBinaryArithOpSlowCase(op_mul, iter, result, op1, op2, types);
|
---|
569 |
|
---|
570 | emitPutVirtualRegister(result);
|
---|
571 | }
|
---|
572 |
|
---|
573 | void JIT::compileFastArith_op_sub(Instruction* currentInstruction)
|
---|
574 | {
|
---|
575 | unsigned result = currentInstruction[1].u.operand;
|
---|
576 | unsigned op1 = currentInstruction[2].u.operand;
|
---|
577 | unsigned op2 = currentInstruction[3].u.operand;
|
---|
578 | OperandTypes types = OperandTypes::fromInt(currentInstruction[4].u.operand);
|
---|
579 |
|
---|
580 | compileBinaryArithOp(op_sub, result, op1, op2, types);
|
---|
581 |
|
---|
582 | emitPutVirtualRegister(result);
|
---|
583 | }
|
---|
584 | void JIT::compileFastArithSlow_op_sub(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
|
---|
585 | {
|
---|
586 | unsigned result = currentInstruction[1].u.operand;
|
---|
587 | unsigned op1 = currentInstruction[2].u.operand;
|
---|
588 | unsigned op2 = currentInstruction[3].u.operand;
|
---|
589 | OperandTypes types = OperandTypes::fromInt(currentInstruction[4].u.operand);
|
---|
590 |
|
---|
591 | compileBinaryArithOpSlowCase(op_sub, iter, result, op1, op2, types);
|
---|
592 |
|
---|
593 | emitPutVirtualRegister(result);
|
---|
594 | }
|
---|
595 |
|
---|
596 | #else
|
---|
597 |
|
---|
598 | typedef X86Assembler::JmpSrc JmpSrc;
|
---|
599 | typedef X86Assembler::JmpDst JmpDst;
|
---|
600 | typedef X86Assembler::XMMRegisterID XMMRegisterID;
|
---|
601 |
|
---|
602 | #if PLATFORM(MAC)
|
---|
603 |
|
---|
604 | static inline bool isSSE2Present()
|
---|
605 | {
|
---|
606 | return true; // All X86 Macs are guaranteed to support at least SSE2
|
---|
607 | }
|
---|
608 |
|
---|
609 | #else
|
---|
610 |
|
---|
611 | static bool isSSE2Present()
|
---|
612 | {
|
---|
613 | static const int SSE2FeatureBit = 1 << 26;
|
---|
614 | struct SSE2Check {
|
---|
615 | SSE2Check()
|
---|
616 | {
|
---|
617 | int flags;
|
---|
618 | #if COMPILER(MSVC)
|
---|
619 | _asm {
|
---|
620 | mov eax, 1 // cpuid function 1 gives us the standard feature set
|
---|
621 | cpuid;
|
---|
622 | mov flags, edx;
|
---|
623 | }
|
---|
624 | #else
|
---|
625 | flags = 0;
|
---|
626 | // FIXME: Add GCC code to do above asm
|
---|
627 | #endif
|
---|
628 | present = (flags & SSE2FeatureBit) != 0;
|
---|
629 | }
|
---|
630 | bool present;
|
---|
631 | };
|
---|
632 | static SSE2Check check;
|
---|
633 | return check.present;
|
---|
634 | }
|
---|
635 |
|
---|
636 | #endif
|
---|
637 |
|
---|
638 | /*
|
---|
639 | This is required since number representation is canonical - values representable as a JSImmediate should not be stored in a JSNumberCell.
|
---|
640 |
|
---|
641 | In the common case, the double value from 'xmmSource' is written to the reusable JSNumberCell pointed to by 'jsNumberCell', then 'jsNumberCell'
|
---|
642 | is written to the output SF Register 'dst', and then a jump is planted (stored into *wroteJSNumberCell).
|
---|
643 |
|
---|
644 | However if the value from xmmSource is representable as a JSImmediate, then the JSImmediate value will be written to the output, and flow
|
---|
645 | control will fall through from the code planted.
|
---|
646 | */
|
---|
647 | void JIT::putDoubleResultToJSNumberCellOrJSImmediate(X86::XMMRegisterID xmmSource, X86::RegisterID jsNumberCell, unsigned dst, JmpSrc* wroteJSNumberCell, X86::XMMRegisterID tempXmm, X86::RegisterID tempReg1, X86::RegisterID tempReg2)
|
---|
648 | {
|
---|
649 | // convert (double -> JSImmediate -> double), and check if the value is unchanged - in which case the value is representable as a JSImmediate.
|
---|
650 | __ cvttsd2si_rr(xmmSource, tempReg1);
|
---|
651 | __ addl_rr(tempReg1, tempReg1);
|
---|
652 | __ sarl_i8r(1, tempReg1);
|
---|
653 | __ cvtsi2sd_rr(tempReg1, tempXmm);
|
---|
654 | // Compare & branch if immediate.
|
---|
655 | __ ucomisd_rr(tempXmm, xmmSource);
|
---|
656 | JmpSrc resultIsImm = __ je();
|
---|
657 | JmpDst resultLookedLikeImmButActuallyIsnt = __ label();
|
---|
658 |
|
---|
659 | // Store the result to the JSNumberCell and jump.
|
---|
660 | __ movsd_rm(xmmSource, FIELD_OFFSET(JSNumberCell, m_value), jsNumberCell);
|
---|
661 | if (jsNumberCell != X86::eax)
|
---|
662 | __ movl_rr(jsNumberCell, X86::eax);
|
---|
663 | emitPutVirtualRegister(dst);
|
---|
664 | *wroteJSNumberCell = __ jmp();
|
---|
665 |
|
---|
666 | __ linkJump(resultIsImm, __ label());
|
---|
667 | // value == (double)(JSImmediate)value... or at least, it looks that way...
|
---|
668 | // ucomi will report that (0 == -0), and will report true if either input in NaN (result is unordered).
|
---|
669 | __ linkJump(__ jp(), resultLookedLikeImmButActuallyIsnt); // Actually was a NaN
|
---|
670 | __ pextrw_irr(3, xmmSource, tempReg2);
|
---|
671 | __ cmpl_ir(0x8000, tempReg2);
|
---|
672 | __ linkJump(__ je(), resultLookedLikeImmButActuallyIsnt); // Actually was -0
|
---|
673 | // Yes it really really really is representable as a JSImmediate.
|
---|
674 | emitFastArithIntToImmNoCheck(tempReg1, X86::eax);
|
---|
675 | emitPutVirtualRegister(dst);
|
---|
676 | }
|
---|
677 |
|
---|
678 | void JIT::compileBinaryArithOp(OpcodeID opcodeID, unsigned dst, unsigned src1, unsigned src2, OperandTypes types)
|
---|
679 | {
|
---|
680 | Structure* numberStructure = m_globalData->numberStructure.get();
|
---|
681 | JmpSrc wasJSNumberCell1;
|
---|
682 | JmpSrc wasJSNumberCell1b;
|
---|
683 | JmpSrc wasJSNumberCell2;
|
---|
684 | JmpSrc wasJSNumberCell2b;
|
---|
685 |
|
---|
686 | emitGetVirtualRegisters(src1, X86::eax, src2, X86::edx);
|
---|
687 |
|
---|
688 | if (types.second().isReusable() && isSSE2Present()) {
|
---|
689 | ASSERT(types.second().mightBeNumber());
|
---|
690 |
|
---|
691 | // Check op2 is a number
|
---|
692 | __ testl_i32r(JSImmediate::TagTypeNumber, X86::edx);
|
---|
693 | JmpSrc op2imm = __ jne();
|
---|
694 | if (!types.second().definitelyIsNumber()) {
|
---|
695 | emitJumpSlowCaseIfNotJSCell(X86::edx, src2);
|
---|
696 | __ cmpl_im(reinterpret_cast<unsigned>(numberStructure), FIELD_OFFSET(JSCell, m_structure), X86::edx);
|
---|
697 | addSlowCase(__ jne());
|
---|
698 | }
|
---|
699 |
|
---|
700 | // (1) In this case src2 is a reusable number cell.
|
---|
701 | // Slow case if src1 is not a number type.
|
---|
702 | __ testl_i32r(JSImmediate::TagTypeNumber, X86::eax);
|
---|
703 | JmpSrc op1imm = __ jne();
|
---|
704 | if (!types.first().definitelyIsNumber()) {
|
---|
705 | emitJumpSlowCaseIfNotJSCell(X86::eax, src1);
|
---|
706 | __ cmpl_im(reinterpret_cast<unsigned>(numberStructure), FIELD_OFFSET(JSCell, m_structure), X86::eax);
|
---|
707 | addSlowCase(__ jne());
|
---|
708 | }
|
---|
709 |
|
---|
710 | // (1a) if we get here, src1 is also a number cell
|
---|
711 | __ movsd_mr(FIELD_OFFSET(JSNumberCell, m_value), X86::eax, X86::xmm0);
|
---|
712 | JmpSrc loadedDouble = __ jmp();
|
---|
713 | // (1b) if we get here, src1 is an immediate
|
---|
714 | __ linkJump(op1imm, __ label());
|
---|
715 | emitFastArithImmToInt(X86::eax);
|
---|
716 | __ cvtsi2sd_rr(X86::eax, X86::xmm0);
|
---|
717 | // (1c)
|
---|
718 | __ linkJump(loadedDouble, __ label());
|
---|
719 | if (opcodeID == op_add)
|
---|
720 | __ addsd_mr(FIELD_OFFSET(JSNumberCell, m_value), X86::edx, X86::xmm0);
|
---|
721 | else if (opcodeID == op_sub)
|
---|
722 | __ subsd_mr(FIELD_OFFSET(JSNumberCell, m_value), X86::edx, X86::xmm0);
|
---|
723 | else {
|
---|
724 | ASSERT(opcodeID == op_mul);
|
---|
725 | __ mulsd_mr(FIELD_OFFSET(JSNumberCell, m_value), X86::edx, X86::xmm0);
|
---|
726 | }
|
---|
727 |
|
---|
728 | putDoubleResultToJSNumberCellOrJSImmediate(X86::xmm0, X86::edx, dst, &wasJSNumberCell2, X86::xmm1, X86::ecx, X86::eax);
|
---|
729 | wasJSNumberCell2b = __ jmp();
|
---|
730 |
|
---|
731 | // (2) This handles cases where src2 is an immediate number.
|
---|
732 | // Two slow cases - either src1 isn't an immediate, or the subtract overflows.
|
---|
733 | __ linkJump(op2imm, __ label());
|
---|
734 | emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
|
---|
735 | } else if (types.first().isReusable() && isSSE2Present()) {
|
---|
736 | ASSERT(types.first().mightBeNumber());
|
---|
737 |
|
---|
738 | // Check op1 is a number
|
---|
739 | __ testl_i32r(JSImmediate::TagTypeNumber, X86::eax);
|
---|
740 | JmpSrc op1imm = __ jne();
|
---|
741 | if (!types.first().definitelyIsNumber()) {
|
---|
742 | emitJumpSlowCaseIfNotJSCell(X86::eax, src1);
|
---|
743 | __ cmpl_im(reinterpret_cast<unsigned>(numberStructure), FIELD_OFFSET(JSCell, m_structure), X86::eax);
|
---|
744 | addSlowCase(__ jne());
|
---|
745 | }
|
---|
746 |
|
---|
747 | // (1) In this case src1 is a reusable number cell.
|
---|
748 | // Slow case if src2 is not a number type.
|
---|
749 | __ testl_i32r(JSImmediate::TagTypeNumber, X86::edx);
|
---|
750 | JmpSrc op2imm = __ jne();
|
---|
751 | if (!types.second().definitelyIsNumber()) {
|
---|
752 | emitJumpSlowCaseIfNotJSCell(X86::edx, src2);
|
---|
753 | __ cmpl_im(reinterpret_cast<unsigned>(numberStructure), FIELD_OFFSET(JSCell, m_structure), X86::edx);
|
---|
754 | addSlowCase(__ jne());
|
---|
755 | }
|
---|
756 |
|
---|
757 | // (1a) if we get here, src2 is also a number cell
|
---|
758 | __ movsd_mr(FIELD_OFFSET(JSNumberCell, m_value), X86::edx, X86::xmm1);
|
---|
759 | JmpSrc loadedDouble = __ jmp();
|
---|
760 | // (1b) if we get here, src2 is an immediate
|
---|
761 | __ linkJump(op2imm, __ label());
|
---|
762 | emitFastArithImmToInt(X86::edx);
|
---|
763 | __ cvtsi2sd_rr(X86::edx, X86::xmm1);
|
---|
764 | // (1c)
|
---|
765 | __ linkJump(loadedDouble, __ label());
|
---|
766 | __ movsd_mr(FIELD_OFFSET(JSNumberCell, m_value), X86::eax, X86::xmm0);
|
---|
767 | if (opcodeID == op_add)
|
---|
768 | __ addsd_rr(X86::xmm1, X86::xmm0);
|
---|
769 | else if (opcodeID == op_sub)
|
---|
770 | __ subsd_rr(X86::xmm1, X86::xmm0);
|
---|
771 | else {
|
---|
772 | ASSERT(opcodeID == op_mul);
|
---|
773 | __ mulsd_rr(X86::xmm1, X86::xmm0);
|
---|
774 | }
|
---|
775 | __ movsd_rm(X86::xmm0, FIELD_OFFSET(JSNumberCell, m_value), X86::eax);
|
---|
776 | emitPutVirtualRegister(dst);
|
---|
777 |
|
---|
778 | putDoubleResultToJSNumberCellOrJSImmediate(X86::xmm0, X86::eax, dst, &wasJSNumberCell1, X86::xmm1, X86::ecx, X86::edx);
|
---|
779 | wasJSNumberCell1b = __ jmp();
|
---|
780 |
|
---|
781 | // (2) This handles cases where src1 is an immediate number.
|
---|
782 | // Two slow cases - either src2 isn't an immediate, or the subtract overflows.
|
---|
783 | __ linkJump(op1imm, __ label());
|
---|
784 | emitJumpSlowCaseIfNotImmediateInteger(X86::edx);
|
---|
785 | } else
|
---|
786 | emitJumpSlowCaseIfNotImmediateIntegers(X86::eax, X86::edx, X86::ecx);
|
---|
787 |
|
---|
788 | if (opcodeID == op_add) {
|
---|
789 | emitFastArithDeTagImmediate(X86::eax);
|
---|
790 | __ addl_rr(X86::edx, X86::eax);
|
---|
791 | addSlowCase(__ jo());
|
---|
792 | } else if (opcodeID == op_sub) {
|
---|
793 | __ subl_rr(X86::edx, X86::eax);
|
---|
794 | addSlowCase(__ jo());
|
---|
795 | signExtend32ToPtr(X86::eax, X86::eax);
|
---|
796 | emitFastArithReTagImmediate(X86::eax, X86::eax);
|
---|
797 | } else {
|
---|
798 | ASSERT(opcodeID == op_mul);
|
---|
799 | // convert eax & edx from JSImmediates to ints, and check if either are zero
|
---|
800 | emitFastArithImmToInt(X86::edx);
|
---|
801 | Jump op1Zero = emitFastArithDeTagImmediateJumpIfZero(X86::eax);
|
---|
802 | __ testl_rr(X86::edx, X86::edx);
|
---|
803 | JmpSrc op2NonZero = __ jne();
|
---|
804 | op1Zero.link(this);
|
---|
805 | // if either input is zero, add the two together, and check if the result is < 0.
|
---|
806 | // If it is, we have a problem (N < 0), (N * 0) == -0, not representatble as a JSImmediate.
|
---|
807 | __ movl_rr(X86::eax, X86::ecx);
|
---|
808 | __ addl_rr(X86::edx, X86::ecx);
|
---|
809 | addSlowCase(__ js());
|
---|
810 | // Skip the above check if neither input is zero
|
---|
811 | __ linkJump(op2NonZero, __ label());
|
---|
812 | __ imull_rr(X86::edx, X86::eax);
|
---|
813 | addSlowCase(__ jo());
|
---|
814 | signExtend32ToPtr(X86::eax, X86::eax);
|
---|
815 | emitFastArithReTagImmediate(X86::eax, X86::eax);
|
---|
816 | }
|
---|
817 | emitPutVirtualRegister(dst);
|
---|
818 |
|
---|
819 | if (types.second().isReusable() && isSSE2Present()) {
|
---|
820 | __ linkJump(wasJSNumberCell2, __ label());
|
---|
821 | __ linkJump(wasJSNumberCell2b, __ label());
|
---|
822 | }
|
---|
823 | else if (types.first().isReusable() && isSSE2Present()) {
|
---|
824 | __ linkJump(wasJSNumberCell1, __ label());
|
---|
825 | __ linkJump(wasJSNumberCell1b, __ label());
|
---|
826 | }
|
---|
827 | }
|
---|
828 |
|
---|
829 | void JIT::compileBinaryArithOpSlowCase(OpcodeID opcodeID, Vector<SlowCaseEntry>::iterator& iter, unsigned dst, unsigned src1, unsigned src2, OperandTypes types)
|
---|
830 | {
|
---|
831 | linkSlowCase(iter);
|
---|
832 | if (types.second().isReusable() && isSSE2Present()) {
|
---|
833 | if (!types.first().definitelyIsNumber()) {
|
---|
834 | linkSlowCaseIfNotJSCell(iter, src1);
|
---|
835 | linkSlowCase(iter);
|
---|
836 | }
|
---|
837 | if (!types.second().definitelyIsNumber()) {
|
---|
838 | linkSlowCaseIfNotJSCell(iter, src2);
|
---|
839 | linkSlowCase(iter);
|
---|
840 | }
|
---|
841 | } else if (types.first().isReusable() && isSSE2Present()) {
|
---|
842 | if (!types.first().definitelyIsNumber()) {
|
---|
843 | linkSlowCaseIfNotJSCell(iter, src1);
|
---|
844 | linkSlowCase(iter);
|
---|
845 | }
|
---|
846 | if (!types.second().definitelyIsNumber()) {
|
---|
847 | linkSlowCaseIfNotJSCell(iter, src2);
|
---|
848 | linkSlowCase(iter);
|
---|
849 | }
|
---|
850 | }
|
---|
851 | linkSlowCase(iter);
|
---|
852 |
|
---|
853 | // additional entry point to handle -0 cases.
|
---|
854 | if (opcodeID == op_mul)
|
---|
855 | linkSlowCase(iter);
|
---|
856 |
|
---|
857 | emitPutJITStubArgFromVirtualRegister(src1, 1, X86::ecx);
|
---|
858 | emitPutJITStubArgFromVirtualRegister(src2, 2, X86::ecx);
|
---|
859 | if (opcodeID == op_add)
|
---|
860 | emitCTICall(Interpreter::cti_op_add);
|
---|
861 | else if (opcodeID == op_sub)
|
---|
862 | emitCTICall(Interpreter::cti_op_sub);
|
---|
863 | else {
|
---|
864 | ASSERT(opcodeID == op_mul);
|
---|
865 | emitCTICall(Interpreter::cti_op_mul);
|
---|
866 | }
|
---|
867 | emitPutVirtualRegister(dst);
|
---|
868 | }
|
---|
869 |
|
---|
870 | void JIT::compileFastArith_op_add(Instruction* currentInstruction)
|
---|
871 | {
|
---|
872 | unsigned result = currentInstruction[1].u.operand;
|
---|
873 | unsigned op1 = currentInstruction[2].u.operand;
|
---|
874 | unsigned op2 = currentInstruction[3].u.operand;
|
---|
875 |
|
---|
876 | if (isOperandConstantImmediateInt(op1)) {
|
---|
877 | emitGetVirtualRegister(op2, X86::eax);
|
---|
878 | emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
|
---|
879 | addSlowCase(branchAdd32(Overflow, Imm32(getConstantOperandImmediateInt(op1) << JSImmediate::IntegerPayloadShift), X86::eax));
|
---|
880 | signExtend32ToPtr(X86::eax, X86::eax);
|
---|
881 | emitPutVirtualRegister(result);
|
---|
882 | } else if (isOperandConstantImmediateInt(op2)) {
|
---|
883 | emitGetVirtualRegister(op1, X86::eax);
|
---|
884 | emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
|
---|
885 | addSlowCase(branchAdd32(Overflow, Imm32(getConstantOperandImmediateInt(op2) << JSImmediate::IntegerPayloadShift), X86::eax));
|
---|
886 | signExtend32ToPtr(X86::eax, X86::eax);
|
---|
887 | emitPutVirtualRegister(result);
|
---|
888 | } else {
|
---|
889 | OperandTypes types = OperandTypes::fromInt(currentInstruction[4].u.operand);
|
---|
890 | if (types.first().mightBeNumber() && types.second().mightBeNumber())
|
---|
891 | compileBinaryArithOp(op_add, result, op1, op2, OperandTypes::fromInt(currentInstruction[4].u.operand));
|
---|
892 | else {
|
---|
893 | emitPutJITStubArgFromVirtualRegister(op1, 1, X86::ecx);
|
---|
894 | emitPutJITStubArgFromVirtualRegister(op2, 2, X86::ecx);
|
---|
895 | emitCTICall(Interpreter::cti_op_add);
|
---|
896 | emitPutVirtualRegister(result);
|
---|
897 | }
|
---|
898 | }
|
---|
899 | }
|
---|
900 | void JIT::compileFastArithSlow_op_add(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
|
---|
901 | {
|
---|
902 | unsigned result = currentInstruction[1].u.operand;
|
---|
903 | unsigned op1 = currentInstruction[2].u.operand;
|
---|
904 | unsigned op2 = currentInstruction[3].u.operand;
|
---|
905 |
|
---|
906 | if (isOperandConstantImmediateInt(op1)) {
|
---|
907 | Jump notImm = getSlowCase(iter);
|
---|
908 | linkSlowCase(iter);
|
---|
909 | sub32(Imm32(getConstantOperandImmediateInt(op1) << JSImmediate::IntegerPayloadShift), X86::eax);
|
---|
910 | notImm.link(this);
|
---|
911 | emitPutJITStubArgFromVirtualRegister(op1, 1, X86::ecx);
|
---|
912 | emitPutJITStubArg(X86::eax, 2);
|
---|
913 | emitCTICall(Interpreter::cti_op_add);
|
---|
914 | emitPutVirtualRegister(result);
|
---|
915 | } else if (isOperandConstantImmediateInt(op2)) {
|
---|
916 | Jump notImm = getSlowCase(iter);
|
---|
917 | linkSlowCase(iter);
|
---|
918 | sub32(Imm32(getConstantOperandImmediateInt(op2) << JSImmediate::IntegerPayloadShift), X86::eax);
|
---|
919 | notImm.link(this);
|
---|
920 | emitPutJITStubArg(X86::eax, 1);
|
---|
921 | emitPutJITStubArgFromVirtualRegister(op2, 2, X86::ecx);
|
---|
922 | emitCTICall(Interpreter::cti_op_add);
|
---|
923 | emitPutVirtualRegister(result);
|
---|
924 | } else {
|
---|
925 | OperandTypes types = OperandTypes::fromInt(currentInstruction[4].u.operand);
|
---|
926 | ASSERT(types.first().mightBeNumber() && types.second().mightBeNumber());
|
---|
927 | compileBinaryArithOpSlowCase(op_add, iter, result, op1, op2, types);
|
---|
928 | }
|
---|
929 | }
|
---|
930 |
|
---|
931 | void JIT::compileFastArith_op_mul(Instruction* currentInstruction)
|
---|
932 | {
|
---|
933 | unsigned result = currentInstruction[1].u.operand;
|
---|
934 | unsigned op1 = currentInstruction[2].u.operand;
|
---|
935 | unsigned op2 = currentInstruction[3].u.operand;
|
---|
936 |
|
---|
937 | // For now, only plant a fast int case if the constant operand is greater than zero.
|
---|
938 | int32_t value;
|
---|
939 | if (isOperandConstantImmediateInt(op1) && ((value = getConstantOperandImmediateInt(op1)) > 0)) {
|
---|
940 | emitGetVirtualRegister(op2, X86::eax);
|
---|
941 | emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
|
---|
942 | emitFastArithDeTagImmediate(X86::eax);
|
---|
943 | addSlowCase(branchMul32(Overflow, Imm32(value), X86::eax, X86::eax));
|
---|
944 | signExtend32ToPtr(X86::eax, X86::eax);
|
---|
945 | emitFastArithReTagImmediate(X86::eax, X86::eax);
|
---|
946 | emitPutVirtualRegister(result);
|
---|
947 | } else if (isOperandConstantImmediateInt(op2) && ((value = getConstantOperandImmediateInt(op2)) > 0)) {
|
---|
948 | emitGetVirtualRegister(op1, X86::eax);
|
---|
949 | emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
|
---|
950 | emitFastArithDeTagImmediate(X86::eax);
|
---|
951 | addSlowCase(branchMul32(Overflow, Imm32(value), X86::eax, X86::eax));
|
---|
952 | signExtend32ToPtr(X86::eax, X86::eax);
|
---|
953 | emitFastArithReTagImmediate(X86::eax, X86::eax);
|
---|
954 | emitPutVirtualRegister(result);
|
---|
955 | } else
|
---|
956 | compileBinaryArithOp(op_mul, result, op1, op2, OperandTypes::fromInt(currentInstruction[4].u.operand));
|
---|
957 | }
|
---|
958 | void JIT::compileFastArithSlow_op_mul(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
|
---|
959 | {
|
---|
960 | unsigned result = currentInstruction[1].u.operand;
|
---|
961 | unsigned op1 = currentInstruction[2].u.operand;
|
---|
962 | unsigned op2 = currentInstruction[3].u.operand;
|
---|
963 |
|
---|
964 | if ((isOperandConstantImmediateInt(op1) && (getConstantOperandImmediateInt(op1) > 0))
|
---|
965 | || (isOperandConstantImmediateInt(op2) && (getConstantOperandImmediateInt(op2) > 0))) {
|
---|
966 | linkSlowCase(iter);
|
---|
967 | linkSlowCase(iter);
|
---|
968 | // There is an extra slow case for (op1 * -N) or (-N * op2), to check for 0 since this should produce a result of -0.
|
---|
969 | emitPutJITStubArgFromVirtualRegister(op1, 1, X86::ecx);
|
---|
970 | emitPutJITStubArgFromVirtualRegister(op2, 2, X86::ecx);
|
---|
971 | emitCTICall(Interpreter::cti_op_mul);
|
---|
972 | emitPutVirtualRegister(result);
|
---|
973 | } else
|
---|
974 | compileBinaryArithOpSlowCase(op_mul, iter, result, op1, op2, OperandTypes::fromInt(currentInstruction[4].u.operand));
|
---|
975 | }
|
---|
976 |
|
---|
977 | void JIT::compileFastArith_op_sub(Instruction* currentInstruction)
|
---|
978 | {
|
---|
979 | compileBinaryArithOp(op_sub, currentInstruction[1].u.operand, currentInstruction[2].u.operand, currentInstruction[3].u.operand, OperandTypes::fromInt(currentInstruction[4].u.operand));
|
---|
980 | }
|
---|
981 | void JIT::compileFastArithSlow_op_sub(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
|
---|
982 | {
|
---|
983 | compileBinaryArithOpSlowCase(op_sub, iter, currentInstruction[1].u.operand, currentInstruction[2].u.operand, currentInstruction[3].u.operand, OperandTypes::fromInt(currentInstruction[4].u.operand));
|
---|
984 | }
|
---|
985 |
|
---|
986 | #endif
|
---|
987 |
|
---|
988 | } // namespace JSC
|
---|
989 |
|
---|
990 | #endif // ENABLE(JIT)
|
---|