Changeset 113930 in webkit for trunk/Source/JavaScriptCore/assembler

Timestamp:

Apr 11, 2012, 5:55:44 PM (13 years ago)

Author:

[email protected]

Message:

op_is_foo should be optimized
​https://bugs.webkit.org/show_bug.cgi?id=83666

Reviewed by Gavin Barraclough.

This implements inlining of op_is_undefined, op_is_string, op_is_number,
and op_is_boolean in LLInt and the baseline JIT. op_is_object and
op_is_function are not inlined because they are quite a bit more complex.

This also implements all of the op_is_foo opcodes in the DFG, but it does
not do any type profiling based optimizations, yet.

• assembler/MacroAssemblerARMv7.h:

(JSC::MacroAssemblerARMv7::compare8):
(MacroAssemblerARMv7):

• assembler/MacroAssemblerX86Common.h:

(JSC::MacroAssemblerX86Common::compare8):
(MacroAssemblerX86Common):

• assembler/MacroAssemblerX86_64.h:

(MacroAssemblerX86_64):
(JSC::MacroAssemblerX86_64::testPtr):

• dfg/DFGAbstractState.cpp:

(JSC::DFG::AbstractState::execute):

• dfg/DFGByteCodeParser.cpp:

(JSC::DFG::ByteCodeParser::parseBlock):

• dfg/DFGCCallHelpers.h:

(JSC::DFG::CCallHelpers::setupArguments):
(CCallHelpers):

• dfg/DFGCSEPhase.cpp:

(JSC::DFG::CSEPhase::performNodeCSE):

• dfg/DFGCapabilities.h:

(JSC::DFG::canCompileOpcode):

• dfg/DFGNodeType.h:

(DFG):

• dfg/DFGOperations.cpp:
• dfg/DFGOperations.h:
• dfg/DFGPredictionPropagationPhase.cpp:

(JSC::DFG::PredictionPropagationPhase::propagate):

• dfg/DFGSpeculativeJIT.h:

(JSC::DFG::SpeculativeJIT::callOperation):
(JSC::DFG::SpeculativeJIT::appendCallSetResult):

• dfg/DFGSpeculativeJIT32_64.cpp:

(JSC::DFG::SpeculativeJIT::compile):

• dfg/DFGSpeculativeJIT64.cpp:

(JSC::DFG::SpeculativeJIT::compile):

• jit/JIT.cpp:

(JSC::JIT::privateCompileMainPass):

• jit/JIT.h:

(JIT):

• jit/JITOpcodes.cpp:

(JSC::JIT::emit_op_is_undefined):
(JSC):
(JSC::JIT::emit_op_is_boolean):
(JSC::JIT::emit_op_is_number):
(JSC::JIT::emit_op_is_string):

• jit/JITOpcodes32_64.cpp:

(JSC::JIT::emit_op_is_undefined):
(JSC):
(JSC::JIT::emit_op_is_boolean):
(JSC::JIT::emit_op_is_number):
(JSC::JIT::emit_op_is_string):

• jit/JITStubs.cpp:

(JSC):

• llint/LLIntSlowPaths.cpp:

(LLInt):

• llint/LLIntSlowPaths.h:

(LLInt):

• llint/LowLevelInterpreter.asm:
• llint/LowLevelInterpreter32_64.asm:
• llint/LowLevelInterpreter64.asm:
• offlineasm/armv7.rb:
• offlineasm/instructions.rb:
• offlineasm/x86.rb:

Location:

trunk/Source/JavaScriptCore/assembler

Files:

• MacroAssemblerARMv7.h (modified) (1 diff)
• MacroAssemblerX86Common.h (modified) (1 diff)
• MacroAssemblerX86_64.h (modified) (2 diffs)

trunk/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h

@@ -1527 +1527 @@
     }
 
+    void compare8(RelationalCondition cond, Address left, TrustedImm32 right, RegisterID dest)
+    {
+        load8(left, addressTempRegister);
+        compare32(cond, addressTempRegister, right, dest);
+    }
+
     void compare32(RelationalCondition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
     {

trunk/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h

@@ -1354 +1354 @@
     }
 
+    void compare8(RelationalCondition cond, Address left, TrustedImm32 right, RegisterID dest)
+    {
+        m_assembler.cmpb_im(right.m_value, left.offset, left.base);
+        set32(x86Condition(cond), dest);
+    }
+    
     void compare32(RelationalCondition cond, RegisterID left, RegisterID right, RegisterID dest)
     {

trunk/Source/JavaScriptCore/assembler/MacroAssemblerX86_64.h

@@ -403 +403 @@
         return Jump(m_assembler.jCC(x86Condition(cond)));
     }
-
+    
     Jump branchTestPtr(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
     {
@@ -416 +416 @@
     }
 
+    void testPtr(ResultCondition cond, RegisterID reg, TrustedImm32 mask, RegisterID dest)
+    {
+        if (mask.m_value == -1)
+            m_assembler.testq_rr(reg, reg);
+        else if ((mask.m_value & ~0x7f) == 0)
+            m_assembler.testb_i8r(mask.m_value, reg);
+        else
+            m_assembler.testq_i32r(mask.m_value, reg);
+        set32(x86Condition(cond), dest);
+    }
+
+    void testPtr(ResultCondition cond, RegisterID reg, RegisterID mask, RegisterID dest)
+    {
+        m_assembler.testq_rr(reg, mask);
+        set32(x86Condition(cond), dest);
+    }
+
     Jump branchTestPtr(ResultCondition cond, AbsoluteAddress address, TrustedImm32 mask = TrustedImm32(-1))
     {