Changeset 177315 in webkit for trunk/Source/JavaScriptCore/ftl


Ignore:
Timestamp:
Dec 15, 2014, 2:58:17 PM (10 years ago)
Author:
Dániel Bátyai
Message:

[EFL] FTL JIT not working on ARM64
​https://bugs.webkit.org/show_bug.cgi?id=139295

Reviewed by Michael Saboff.

Source/JavaScriptCore:

Added the missing code for stack unwinding and some additional small fixes
to get FTL working correctly.

  • ftl/FTLCompile.cpp:

(JSC::FTL::mmAllocateDataSection):

  • ftl/FTLUnwindInfo.cpp:

(JSC::FTL::UnwindInfo::parse):

Tools:

Added patches for llvm to add ARM64 support for FTL JIT

  • efl/jhbuild.modules:
  • efl/patches/llvm-elf-add-stackmaps-arm64.patch: Added.
  • efl/patches/llvm-elf-allow-fde-references-outside-the-2gb-range-arm64.patch: Added.
Location:
trunk/Source/JavaScriptCore/ftl
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • trunk/Source/JavaScriptCore/ftl/FTLCompile.cpp

    r177222 r177315  
    9999#elif OS(LINUX)
    100100        if (!strcmp(sectionName, SECTION_NAME("eh_frame"))) {
     101#else
     102#error "Unrecognized OS"
    101103#endif
    102104            state.unwindDataSection = section->base();
    … …  
    626628       
    627629        if (isARM64())
     630#if OS(DARWIN)
    628631            llvm->SetTarget(state.module, "arm64-apple-ios");
    629        
     632#elif OS(LINUX)
     633            llvm->SetTarget(state.module, "aarch64-linux-gnu");
     634#else
     635#error "Unrecognized OS"
     636#endif
     637
    630638        if (llvm->CreateMCJITCompilerForModule(&engine, state.module, &options, sizeof(options), &error)) {
    631639            dataLog("FATAL: Could not create LLVM execution engine: ", error, "\n");

  • trunk/Source/JavaScriptCore/ftl/FTLUnwindInfo.cpp

    r173509 r177315  
    174174enum {
    175175    DW_X86_64_RET_addr = 16
     176};
     177
     178enum {
     179    UNW_ARM64_x0 = 0,
     180    UNW_ARM64_x1 = 1,
     181    UNW_ARM64_x2 = 2,
     182    UNW_ARM64_x3 = 3,
     183    UNW_ARM64_x4 = 4,
     184    UNW_ARM64_x5 = 5,
     185    UNW_ARM64_x6 = 6,
     186    UNW_ARM64_x7 = 7,
     187    UNW_ARM64_x8 = 8,
     188    UNW_ARM64_x9 = 9,
     189    UNW_ARM64_x10 = 10,
     190    UNW_ARM64_x11 = 11,
     191    UNW_ARM64_x12 = 12,
     192    UNW_ARM64_x13 = 13,
     193    UNW_ARM64_x14 = 14,
     194    UNW_ARM64_x15 = 15,
     195    UNW_ARM64_x16 = 16,
     196    UNW_ARM64_x17 = 17,
     197    UNW_ARM64_x18 = 18,
     198    UNW_ARM64_x19 = 19,
     199    UNW_ARM64_x20 = 20,
     200    UNW_ARM64_x21 = 21,
     201    UNW_ARM64_x22 = 22,
     202    UNW_ARM64_x23 = 23,
     203    UNW_ARM64_x24 = 24,
     204    UNW_ARM64_x25 = 25,
     205    UNW_ARM64_x26 = 26,
     206    UNW_ARM64_x27 = 27,
     207    UNW_ARM64_x28 = 28,
     208    UNW_ARM64_fp = 29,
     209    UNW_ARM64_x30 = 30,
     210    UNW_ARM64_sp = 31,
     211    UNW_ARM64_v0 = 64,
     212    UNW_ARM64_v1 = 65,
     213    UNW_ARM64_v2 = 66,
     214    UNW_ARM64_v3 = 67,
     215    UNW_ARM64_v4 = 68,
     216    UNW_ARM64_v5 = 69,
     217    UNW_ARM64_v6 = 70,
     218    UNW_ARM64_v7 = 71,
     219    UNW_ARM64_v8 = 72,
     220    UNW_ARM64_v9 = 73,
     221    UNW_ARM64_v10 = 74,
     222    UNW_ARM64_v11 = 75,
     223    UNW_ARM64_v12 = 76,
     224    UNW_ARM64_v13 = 77,
     225    UNW_ARM64_v14 = 78,
     226    UNW_ARM64_v15 = 79,
     227    UNW_ARM64_v16 = 80,
     228    UNW_ARM64_v17 = 81,
     229    UNW_ARM64_v18 = 82,
     230    UNW_ARM64_v19 = 83,
     231    UNW_ARM64_v20 = 84,
     232    UNW_ARM64_v21 = 85,
     233    UNW_ARM64_v22 = 86,
     234    UNW_ARM64_v23 = 87,
     235    UNW_ARM64_v24 = 88,
     236    UNW_ARM64_v25 = 89,
     237    UNW_ARM64_v26 = 90,
     238    UNW_ARM64_v27 = 91,
     239    UNW_ARM64_v28 = 92,
     240    UNW_ARM64_v29 = 93,
     241    UNW_ARM64_v30 = 94,
     242    UNW_ARM64_v31 = 95
    176243};
    177244
    … …  
    326393// Information about a frame layout and registers saved determined
    327394// by "running" the dwarf FDE "instructions"
     395#if CPU(ARM64)
     396enum { MaxRegisterNumber = 120 };
     397#elif CPU(X86_64)
    328398enum { MaxRegisterNumber = 17 };
     399#else
     400#error "Unrecognized architecture"
     401#endif
    329402
    330403struct RegisterLocation {
    … …  
    735808    }
    736809#elif CPU(ARM64)
    737     // FIXME: Implement stackunwinding based on eh_frame on ARM64
     810    RELEASE_ASSERT(prolog.cfaRegister == UNW_ARM64_fp);
     811    RELEASE_ASSERT(prolog.cfaRegisterOffset == 16);
     812    RELEASE_ASSERT(prolog.savedRegisters[UNW_ARM64_fp].saved);
     813    RELEASE_ASSERT(prolog.savedRegisters[UNW_ARM64_fp].offset == -prolog.cfaRegisterOffset);
     814
     815    for (int i = 0; i < MaxRegisterNumber; ++i) {
     816        if (prolog.savedRegisters[i].saved) {
     817            switch (i) {
     818            case UNW_ARM64_x0:
     819                m_registers.append(RegisterAtOffset(ARM64Registers::x0, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     820                break;
     821            case UNW_ARM64_x1:
     822                m_registers.append(RegisterAtOffset(ARM64Registers::x1, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     823                break;
     824            case UNW_ARM64_x2:
     825                m_registers.append(RegisterAtOffset(ARM64Registers::x2, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     826                break;
     827            case UNW_ARM64_x3:
     828                m_registers.append(RegisterAtOffset(ARM64Registers::x3, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     829                break;
     830            case UNW_ARM64_x4:
     831                m_registers.append(RegisterAtOffset(ARM64Registers::x4, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     832                break;
     833            case UNW_ARM64_x5:
     834                m_registers.append(RegisterAtOffset(ARM64Registers::x5, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     835                break;
     836            case UNW_ARM64_x6:
     837                m_registers.append(RegisterAtOffset(ARM64Registers::x6, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     838                break;
     839            case UNW_ARM64_x7:
     840                m_registers.append(RegisterAtOffset(ARM64Registers::x7, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     841                break;
     842            case UNW_ARM64_x8:
     843                m_registers.append(RegisterAtOffset(ARM64Registers::x8, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     844                break;
     845            case UNW_ARM64_x9:
     846                m_registers.append(RegisterAtOffset(ARM64Registers::x9, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     847                break;
     848            case UNW_ARM64_x10:
     849                m_registers.append(RegisterAtOffset(ARM64Registers::x10, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     850                break;
     851            case UNW_ARM64_x11:
     852                m_registers.append(RegisterAtOffset(ARM64Registers::x11, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     853                break;
     854            case UNW_ARM64_x12:
     855                m_registers.append(RegisterAtOffset(ARM64Registers::x12, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     856                break;
     857            case UNW_ARM64_x13:
     858                m_registers.append(RegisterAtOffset(ARM64Registers::x13, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     859                break;
     860            case UNW_ARM64_x14:
     861                m_registers.append(RegisterAtOffset(ARM64Registers::x14, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     862                break;
     863            case UNW_ARM64_x15:
     864                m_registers.append(RegisterAtOffset(ARM64Registers::x15, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     865                break;
     866            case UNW_ARM64_x16:
     867                m_registers.append(RegisterAtOffset(ARM64Registers::x16, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     868                break;
     869            case UNW_ARM64_x17:
     870                m_registers.append(RegisterAtOffset(ARM64Registers::x17, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     871                break;
     872            case UNW_ARM64_x18:
     873                m_registers.append(RegisterAtOffset(ARM64Registers::x18, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     874                break;
     875            case UNW_ARM64_x19:
     876                m_registers.append(RegisterAtOffset(ARM64Registers::x19, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     877                break;
     878            case UNW_ARM64_x20:
     879                m_registers.append(RegisterAtOffset(ARM64Registers::x20, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     880                break;
     881            case UNW_ARM64_x21:
     882                m_registers.append(RegisterAtOffset(ARM64Registers::x21, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     883                break;
     884            case UNW_ARM64_x22:
     885                m_registers.append(RegisterAtOffset(ARM64Registers::x22, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     886                break;
     887            case UNW_ARM64_x23:
     888                m_registers.append(RegisterAtOffset(ARM64Registers::x23, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     889                break;
     890            case UNW_ARM64_x24:
     891                m_registers.append(RegisterAtOffset(ARM64Registers::x24, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     892                break;
     893            case UNW_ARM64_x25:
     894                m_registers.append(RegisterAtOffset(ARM64Registers::x25, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     895                break;
     896            case UNW_ARM64_x26:
     897                m_registers.append(RegisterAtOffset(ARM64Registers::x26, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     898                break;
     899            case UNW_ARM64_x27:
     900                m_registers.append(RegisterAtOffset(ARM64Registers::x27, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     901                break;
     902            case UNW_ARM64_x28:
     903                m_registers.append(RegisterAtOffset(ARM64Registers::x28, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     904                break;
     905            case UNW_ARM64_fp:
     906                m_registers.append(RegisterAtOffset(ARM64Registers::fp, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     907                break;
     908            case UNW_ARM64_x30:
     909                m_registers.append(RegisterAtOffset(ARM64Registers::x30, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     910                break;
     911            case UNW_ARM64_sp:
     912                m_registers.append(RegisterAtOffset(ARM64Registers::sp, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     913                break;
     914            case UNW_ARM64_v0:
     915                m_registers.append(RegisterAtOffset(ARM64Registers::q0, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     916                break;
     917            case UNW_ARM64_v1:
     918                m_registers.append(RegisterAtOffset(ARM64Registers::q1, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     919                break;
     920            case UNW_ARM64_v2:
     921                m_registers.append(RegisterAtOffset(ARM64Registers::q2, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     922                break;
     923            case UNW_ARM64_v3:
     924                m_registers.append(RegisterAtOffset(ARM64Registers::q3, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     925                break;
     926            case UNW_ARM64_v4:
     927                m_registers.append(RegisterAtOffset(ARM64Registers::q4, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     928                break;
     929            case UNW_ARM64_v5:
     930                m_registers.append(RegisterAtOffset(ARM64Registers::q5, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     931                break;
     932            case UNW_ARM64_v6:
     933                m_registers.append(RegisterAtOffset(ARM64Registers::q6, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     934                break;
     935            case UNW_ARM64_v7:
     936                m_registers.append(RegisterAtOffset(ARM64Registers::q7, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     937                break;
     938            case UNW_ARM64_v8:
     939                m_registers.append(RegisterAtOffset(ARM64Registers::q8, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     940                break;
     941            case UNW_ARM64_v9:
     942                m_registers.append(RegisterAtOffset(ARM64Registers::q9, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     943                break;
     944            case UNW_ARM64_v10:
     945                m_registers.append(RegisterAtOffset(ARM64Registers::q10, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     946                break;
     947            case UNW_ARM64_v11:
     948                m_registers.append(RegisterAtOffset(ARM64Registers::q11, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     949                break;
     950            case UNW_ARM64_v12:
     951                m_registers.append(RegisterAtOffset(ARM64Registers::q12, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     952                break;
     953            case UNW_ARM64_v13:
     954                m_registers.append(RegisterAtOffset(ARM64Registers::q13, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     955                break;
     956            case UNW_ARM64_v14:
     957                m_registers.append(RegisterAtOffset(ARM64Registers::q14, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     958                break;
     959            case UNW_ARM64_v15:
     960                m_registers.append(RegisterAtOffset(ARM64Registers::q15, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     961                break;
     962            case UNW_ARM64_v16:
     963                m_registers.append(RegisterAtOffset(ARM64Registers::q16, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     964                break;
     965            case UNW_ARM64_v17:
     966                m_registers.append(RegisterAtOffset(ARM64Registers::q17, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     967                break;
     968            case UNW_ARM64_v18:
     969                m_registers.append(RegisterAtOffset(ARM64Registers::q18, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     970                break;
     971            case UNW_ARM64_v19:
     972                m_registers.append(RegisterAtOffset(ARM64Registers::q19, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     973                break;
     974            case UNW_ARM64_v20:
     975                m_registers.append(RegisterAtOffset(ARM64Registers::q20, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     976                break;
     977            case UNW_ARM64_v21:
     978                m_registers.append(RegisterAtOffset(ARM64Registers::q21, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     979                break;
     980            case UNW_ARM64_v22:
     981                m_registers.append(RegisterAtOffset(ARM64Registers::q22, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     982                break;
     983            case UNW_ARM64_v23:
     984                m_registers.append(RegisterAtOffset(ARM64Registers::q23, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     985                break;
     986            case UNW_ARM64_v24:
     987                m_registers.append(RegisterAtOffset(ARM64Registers::q24, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     988                break;
     989            case UNW_ARM64_v25:
     990                m_registers.append(RegisterAtOffset(ARM64Registers::q25, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     991                break;
     992            case UNW_ARM64_v26:
     993                m_registers.append(RegisterAtOffset(ARM64Registers::q26, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     994                break;
     995            case UNW_ARM64_v27:
     996                m_registers.append(RegisterAtOffset(ARM64Registers::q27, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     997                break;
     998            case UNW_ARM64_v28:
     999                m_registers.append(RegisterAtOffset(ARM64Registers::q28, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     1000                break;
     1001            case UNW_ARM64_v29:
     1002                m_registers.append(RegisterAtOffset(ARM64Registers::q29, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     1003                break;
     1004            case UNW_ARM64_v30:
     1005                m_registers.append(RegisterAtOffset(ARM64Registers::q30, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     1006                break;
     1007            case UNW_ARM64_v31:
     1008                m_registers.append(RegisterAtOffset(ARM64Registers::q31, prolog.savedRegisters[i].offset + prolog.cfaRegisterOffset));
     1009                break;
     1010            default:
     1011                RELEASE_ASSERT_NOT_REACHED(); // non-standard register being saved in prolog
     1012            }
     1013        }
     1014    }
    7381015#else
    7391016#error "Unrecognized architecture"
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