Changeset 39020 in webkit for trunk/JavaScriptCore/assembler
- Timestamp:
- Dec 4, 2008, 10:58:40 PM (16 years ago)
- Location:
- trunk/JavaScriptCore/assembler
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/JavaScriptCore/assembler/MacroAssembler.h
r38989 r39020 189 189 m_assembler->link(m_jmp, label.m_label); 190 190 } 191 192 // FIXME: transitionary method, while we replace JmpSrces with Jumps. 193 operator X86Assembler::JmpSrc() 194 { 195 return m_jmp; 196 } 191 197 192 198 private: … … 269 275 } 270 276 277 void add32(RegisterID src, RegisterID dest) 278 { 279 m_assembler.addl_rr(src, dest); 280 } 281 271 282 void add32(Imm32 imm, RegisterID dest) 272 283 { … … 282 293 } 283 294 295 void and32(RegisterID src, RegisterID dest) 296 { 297 m_assembler.andl_rr(src, dest); 298 } 299 300 void lshift32(Imm32 imm, RegisterID dest) 301 { 302 m_assembler.shll_i8r(imm.m_value, dest); 303 } 304 284 305 void or32(Imm32 imm, RegisterID dest) 285 306 { … … 288 309 else 289 310 m_assembler.orl_i32r(imm.m_value, dest); 311 } 312 313 void rshift32(Imm32 imm, RegisterID dest) 314 { 315 m_assembler.sarl_i8r(imm.m_value, dest); 290 316 } 291 317 … … 365 391 } 366 392 393 #if !PLATFORM(X86_64) 394 void storePtr(void* value, ImplicitAddress address) 395 { 396 if (address.offset) 397 m_assembler.movl_i32m(reinterpret_cast<unsigned>(value), address.offset, address.base); 398 else 399 m_assembler.movl_i32m(reinterpret_cast<unsigned>(value), address.base); 400 } 401 #endif 402 367 403 void store32(RegisterID src, ImplicitAddress address) 368 404 { … … 375 411 void store32(Imm32 imm, ImplicitAddress address) 376 412 { 377 // FIXME: add a version that doesn't take an offset 378 m_assembler.movl_i32m(imm.m_value, address.offset, address.base); 379 } 413 if (address.offset) 414 m_assembler.movl_i32m(imm.m_value, address.offset, address.base); 415 else 416 m_assembler.movl_i32m(imm.m_value, address.base); 417 } 418 419 #if !PLATFORM(X86_64) 420 void store32(Imm32 imm, void* address) 421 { 422 m_assembler.movl_i32m(imm.m_value, address); 423 } 424 #endif 380 425 381 426 … … 421 466 } 422 467 468 void poke(Imm32 value, int index = 0) 469 { 470 store32(value, Address(X86::esp, (index * sizeof(void *)))); 471 } 472 473 #if !PLATFORM(X86_64) 474 void poke(void* value, int index = 0) 475 { 476 storePtr(value, Address(X86::esp, (index * sizeof(void *)))); 477 } 478 #endif 423 479 424 480 // Register move operations: … … 447 503 } 448 504 505 #if !PLATFORM(X86_64) 506 void move(void* value, RegisterID dest) 507 { 508 m_assembler.movl_i32r(reinterpret_cast<int32_t>(value), dest); 509 } 510 #endif 511 449 512 450 513 // Forwards / external control flow operations: … … 482 545 } 483 546 547 void compareImm32ForBranchEquality(Address address, int32_t imm) 548 { 549 if (CAN_SIGN_EXTEND_8_32(imm)) { 550 if (address.offset) 551 m_assembler.cmpl_i8m(imm, address.offset, address.base); 552 else 553 m_assembler.cmpl_i8m(imm, address.base); 554 } else { 555 if (address.offset) 556 m_assembler.cmpl_i32m(imm, address.offset, address.base); 557 else 558 m_assembler.cmpl_i32m(imm, address.base); 559 } 560 } 561 484 562 public: 485 563 Jump jae32(RegisterID left, Imm32 right) … … 552 630 return Jump(m_assembler, m_assembler.jle()); 553 631 } 554 632 633 #if !PLATFORM(X86_64) 634 Jump jnePtr(void* ptr, Address address) 635 { 636 compareImm32ForBranchEquality(address, reinterpret_cast<uint32_t>(ptr)); 637 return Jump(m_assembler, m_assembler.jne()); 638 } 639 #endif 640 555 641 Jump jne32(RegisterID op1, RegisterID op2) 556 642 { … … 562 648 { 563 649 compareImm32ForBranchEquality(reg, imm.m_value); 650 return Jump(m_assembler, m_assembler.jne()); 651 } 652 653 Jump jnset32(Imm32 imm, RegisterID reg) 654 { 655 // if we are only interested in the low seven bits, this can be tested with a testb 656 if ((imm.m_value & ~0x7f) == 0) 657 m_assembler.testb_i8r(imm.m_value, reg); 658 else 659 m_assembler.testl_i32r(imm.m_value, reg); 660 return Jump(m_assembler, m_assembler.je()); 661 } 662 663 Jump jset32(Imm32 imm, RegisterID reg) 664 { 665 // if we are only interested in the low seven bits, this can be tested with a testb 666 if ((imm.m_value & ~0x7f) == 0) 667 m_assembler.testb_i8r(imm.m_value, reg); 668 else 669 m_assembler.testl_i32r(imm.m_value, reg); 564 670 return Jump(m_assembler, m_assembler.jne()); 565 671 } … … 627 733 628 734 735 // Arithmetic control flow operations: 736 // 737 // This set of conditional branch operations branch based 738 // on the result of an arithmetic operation. The operation 739 // is performed as normal, storing the result. 740 // 741 // * jz operations branch if the result is zero. 742 // * jo operations branch if the (signed) arithmetic 743 // operation caused an overflow to occur. 744 745 Jump jzSub32(Imm32 imm, RegisterID dest) 746 { 747 if (CAN_SIGN_EXTEND_8_32(imm.m_value)) 748 m_assembler.subl_i8r(imm.m_value, dest); 749 else 750 m_assembler.subl_i32r(imm.m_value, dest); 751 return Jump(m_assembler, m_assembler.je()); 752 } 753 754 Jump joAdd32(RegisterID src, RegisterID dest) 755 { 756 m_assembler.addl_rr(src, dest); 757 return Jump(m_assembler, m_assembler.jo()); 758 } 759 760 629 761 // Miscellaneous operations: 630 762 … … 634 766 } 635 767 768 Jump call() 769 { 770 return Jump(m_assembler, m_assembler.call()); 771 } 772 773 Jump call(RegisterID target) 774 { 775 return Jump(m_assembler, m_assembler.call(target)); 776 } 777 636 778 void ret() 637 779 { -
trunk/JavaScriptCore/assembler/X86Assembler.h
r38989 r39020 115 115 PRE_SSE_F2 = 0xF2, 116 116 OP_HLT = 0xF4, 117 OP_GROUP3_EbIb = 0xF6, 117 118 OP_GROUP3_Ev = 0xF7, 118 119 OP_GROUP3_EvIz = 0xF7, // OP_GROUP3_Ev has an immediate, when instruction is a test. … … 391 392 #endif 392 393 394 void cmpl_i8m(int imm, RegisterID dst) 395 { 396 m_buffer.putByte(OP_GROUP1_EvIb); 397 modRm_opm(GROUP1_OP_CMP, dst); 398 m_buffer.putByte(imm); 399 } 400 401 void cmpl_i8m(int imm, int offset, RegisterID dst) 402 { 403 m_buffer.putByte(OP_GROUP1_EvIb); 404 modRm_opm(GROUP1_OP_CMP, dst, offset); 405 m_buffer.putByte(imm); 406 } 407 393 408 void cmpl_i8m(int imm, int offset, RegisterID base, RegisterID index, int scale) 394 409 { … … 495 510 m_buffer.putByte(OP_SUB_GvEv); 496 511 modRm_rm(dst, base, offset); 512 } 513 514 void testb_i8r(int imm, RegisterID dst) 515 { 516 m_buffer.ensureSpace(maxInstructionSize); 517 m_buffer.putByteUnchecked(OP_GROUP3_EbIb); 518 modRm_opr_Unchecked(GROUP3_OP_TEST, dst); 519 m_buffer.putByteUnchecked(imm); 497 520 } 498 521 … … 556 579 } 557 580 558 void shl _i8r(int imm, RegisterID dst)581 void shll_i8r(int imm, RegisterID dst) 559 582 { 560 583 if (imm == 1) { … … 720 743 } 721 744 745 void movl_i32m(int imm, RegisterID base) 746 { 747 m_buffer.ensureSpace(maxInstructionSize); 748 m_buffer.putByteUnchecked(OP_GROUP11_EvIz); 749 modRm_opm_Unchecked(GROUP11_MOV, base); 750 m_buffer.putIntUnchecked(imm); 751 } 752 722 753 void movl_i32m(int imm, int offset, RegisterID base) 723 754 { … … 1090 1121 } 1091 1122 1092 #if USE(CTI_ARGUMENT)1093 void restoreArgumentReference()1094 {1095 #if USE(FAST_CALL_CTI_ARGUMENT)1096 movl_rr(X86::esp, X86::ecx);1097 #else1098 movl_rm(X86::esp, 0, X86::esp);1099 #endif1100 }1101 1102 void restoreArgumentReferenceForTrampoline()1103 {1104 #if USE(FAST_CALL_CTI_ARGUMENT)1105 movl_rr(X86::esp, X86::ecx);1106 addl_i32r(4, X86::ecx);1107 #endif1108 }1109 #else1110 void restoreArgumentReference() {}1111 void restoreArgumentReferenceForTrampoline() {}1112 #endif1113 1114 1123 private: 1115 1124 void modRm_rr(RegisterID reg, RegisterID rm) … … 1131 1140 } 1132 1141 #endif 1142 1143 void modRm_rm_Unchecked(RegisterID reg, RegisterID base) 1144 { 1145 if (base == X86::esp) { 1146 m_buffer.putByteUnchecked(MODRM(0, reg, X86::hasSib)); 1147 m_buffer.putByteUnchecked(SIB(0, X86::noScale, X86::esp)); 1148 } else { 1149 m_buffer.putByteUnchecked(MODRM(0, reg, base)); 1150 } 1151 } 1133 1152 1134 1153 void modRm_rm(RegisterID reg, RegisterID base) … … 1213 1232 } 1214 1233 1234 void modRm_opm_Unchecked(OpcodeID opcodeID, RegisterID base) 1235 { 1236 modRm_rm_Unchecked(static_cast<RegisterID>(opcodeID), base); 1237 } 1238 1215 1239 void modRm_opm_Unchecked(OpcodeID opcodeID, RegisterID base, int offset) 1216 1240 {
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