Changeset 44526 in webkit for trunk/JavaScriptCore/assembler

Timestamp:

Jun 9, 2009, 1:14:09 AM (16 years ago)

Author:

[email protected]

Message:

2009-06-09 Gavin Barraclough <​[email protected]>

Reviewed by Geoff Garen.

Enable JIT_OPTIMIZE_ARITHMETIC on ARMv7 platforms.

Temporarily split support for 'branchTruncateDoubleToInt32' onto its own switch
('supportsFloatingPointTruncate'). See comment in MacroAssemblerARMv7, we need
to work out wherther we are going to be able to support the current interface on
all platforms, or whether this should be refactored.

• assembler/MacroAssemblerARMv7.h: (JSC::MacroAssemblerARMv7::supportsFloatingPoint):

Add implementation of supportsFloatingPointTruncate (returns true).

(JSC::MacroAssemblerARMv7::supportsFloatingPointTruncate):

Add implementation of supportsFloatingPointTruncate (returns false).

(JSC::MacroAssemblerARMv7::loadDouble):
(JSC::MacroAssemblerARMv7::storeDouble):
(JSC::MacroAssemblerARMv7::addDouble):
(JSC::MacroAssemblerARMv7::subDouble):
(JSC::MacroAssemblerARMv7::mulDouble):
(JSC::MacroAssemblerARMv7::convertInt32ToDouble):
(JSC::MacroAssemblerARMv7::branchDouble):

Implement FP code genertion operations.

• assembler/MacroAssemblerX86.h: (JSC::MacroAssemblerX86::supportsFloatingPointTruncate):

Add implementation of supportsFloatingPointTruncate (returns true).

• assembler/MacroAssemblerX86_64.h: (JSC::MacroAssemblerX86_64::supportsFloatingPointTruncate):

Add implementation of supportsFloatingPointTruncate (returns true).

• jit/JITArithmetic.cpp: (JSC::JIT::emit_op_rshift):

Changed to call supportsFloatingPointTruncate().

(JSC::JIT::emitSlow_op_rshift):

Changed to call supportsFloatingPointTruncate().

• wtf/Platform.h:

Change to enable JIT_OPTIMIZE_ARITHMETIC.

Location:

trunk/JavaScriptCore/assembler

Files:

• MacroAssemblerARMv7.h (modified) (1 diff)
• MacroAssemblerX86.h (modified) (1 diff)
• MacroAssemblerX86_64.h (modified) (1 diff)

trunk/JavaScriptCore/assembler/MacroAssemblerARMv7.h

@@ -440 +440 @@
     // Floating-point operations:
 
-    bool supportsFloatingPoint() const { return false; }
-
-    void loadDouble(ImplicitAddress, FPRegisterID)
-    {
-        ASSERT_NOT_REACHED();
-    }
-
-    void storeDouble(FPRegisterID, ImplicitAddress)
-    {
-        ASSERT_NOT_REACHED();
-    }
-
-    void addDouble(FPRegisterID, FPRegisterID)
-    {
-        ASSERT_NOT_REACHED();
-    }
-
-    void addDouble(Address, FPRegisterID)
-    {
-        ASSERT_NOT_REACHED();
-    }
-
-    void subDouble(FPRegisterID, FPRegisterID)
-    {
-        ASSERT_NOT_REACHED();
-    }
-
-    void subDouble(Address, FPRegisterID)
-    {
-        ASSERT_NOT_REACHED();
-    }
-
-    void mulDouble(FPRegisterID, FPRegisterID)
-    {
-        ASSERT_NOT_REACHED();
-    }
-
-    void mulDouble(Address, FPRegisterID)
-    {
-        ASSERT_NOT_REACHED();
-    }
-
-    void convertInt32ToDouble(RegisterID, FPRegisterID)
-    {
-        ASSERT_NOT_REACHED();
-    }
-
-    Jump branchDouble(DoubleCondition, FPRegisterID, FPRegisterID)
-    {
-        ASSERT_NOT_REACHED();
+    bool supportsFloatingPoint() const { return true; }
+    // On x86(_64) the MacroAssembler provides an interface to truncate a double to an integer.
+    // If a value is not representable as an integer, and possibly for some values that are,
+    // (on x86 INT_MIN, since this is indistinguishable from results for out-of-range/NaN input)
+    // a branch will  be taken.  It is not clear whether this interface will be well suited to
+    // other platforms.  On ARMv7 the hardware truncation operation produces multiple possible
+    // failure values (saturates to INT_MIN & INT_MAX, NaN reulsts in a value of 0).  This is a
+    // temporary solution while we work out what this interface should be.  Either we need to
+    // decide to make this interface work on all platforms, rework the interface to make it more
+    // generic, or decide that the MacroAssembler cannot practically be used to abstracted these
+    // operations, and make clients go directly to the m_assembler to plant truncation instructions.
+    // In short, FIXME:.
+    bool supportsFloatingPointTruncate() const { return false; }
+
+    void loadDouble(ImplicitAddress address, FPRegisterID dest)
+    {
+        RegisterID base = address.base;
+        int32_t offset = address.offset;
+
+        // Arm vfp addresses can be offset by a 9-bit ones-comp immediate, left shifted by 2.
+        if ((offset & 3) || (offset > (255 * 4)) || (offset < -(255 * 4))) {
+            add32(Imm32(offset), base, addressTempRegister);
+            base = addressTempRegister;
+            offset = 0;
+        }
+        
+        m_assembler.vldr(dest, base, offset);
+    }
+
+    void storeDouble(FPRegisterID src, ImplicitAddress address)
+    {
+        RegisterID base = address.base;
+        int32_t offset = address.offset;
+
+        // Arm vfp addresses can be offset by a 9-bit ones-comp immediate, left shifted by 2.
+        if ((offset & 3) || (offset > (255 * 4)) || (offset < -(255 * 4))) {
+            add32(Imm32(offset), base, addressTempRegister);
+            base = addressTempRegister;
+            offset = 0;
+        }
+        
+        m_assembler.vstr(src, base, offset);
+    }
+
+    void addDouble(FPRegisterID src, FPRegisterID dest)
+    {
+        m_assembler.vadd_F64(dest, dest, src);
+    }
+
+    void addDouble(Address src, FPRegisterID dest)
+    {
+        loadDouble(src, fpTempRegister);
+        addDouble(fpTempRegister, dest);
+    }
+
+    void subDouble(FPRegisterID src, FPRegisterID dest)
+    {
+        m_assembler.vsub_F64(dest, dest, src);
+    }
+
+    void subDouble(Address src, FPRegisterID dest)
+    {
+        loadDouble(src, fpTempRegister);
+        subDouble(fpTempRegister, dest);
+    }
+
+    void mulDouble(FPRegisterID src, FPRegisterID dest)
+    {
+        m_assembler.vmul_F64(dest, dest, src);
+    }
+
+    void mulDouble(Address src, FPRegisterID dest)
+    {
+        loadDouble(src, fpTempRegister);
+        mulDouble(fpTempRegister, dest);
+    }
+
+    void convertInt32ToDouble(RegisterID src, FPRegisterID dest)
+    {
+        m_assembler.vmov(fpTempRegister, src);
+        m_assembler.vcvt_F64_S32(dest, fpTempRegister);
+    }
+
+    Jump branchDouble(DoubleCondition cond, FPRegisterID left, FPRegisterID right)
+    {
+        m_assembler.vcmp_F64(left, right);
+        m_assembler.vmrs_APSR_nzcv_FPSCR();
+        return makeBranch(cond);
     }
 

trunk/JavaScriptCore/assembler/MacroAssemblerX86.h

@@ -160 +160 @@
 
     bool supportsFloatingPoint() const { return m_isSSE2Present; }
+    // See comment on MacroAssemblerARMv7::supportsFloatingPointTruncate()
+    bool supportsFloatingPointTruncate() const { return m_isSSE2Present; }
 
 private:

trunk/JavaScriptCore/assembler/MacroAssemblerX86_64.h

@@ -445 +445 @@
 
     bool supportsFloatingPoint() const { return true; }
+    // See comment on MacroAssemblerARMv7::supportsFloatingPointTruncate()
+    bool supportsFloatingPointTruncate() const { return true; }
 };