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SimplifyCFG blocks SROA optimization #29546

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@llvmbot

Description

@llvmbot
Bugzilla Link 30188
Version trunk
OS Linux
Blocks #29592
Reporter LLVM Bugzilla Contributor
CC @chandlerc,@vns-mn,@jmolloy,@slacka,@mikaelholmen,@sebpop,@rotateright

Extended Description

struct b {
int x_;
};

struct a {
int l_;
struct b *data_;
};

int BinarySearch(struct a *input, struct b t) {
if (input->l_ > 0) {
int low = 0;
int high = input->l_;
while (high != low + 1) {
int mid = (high + low) / 2;
if (input->data_[mid].x_ > t.x_)
high = mid;
else
low = mid;
}
return low;
}
return -1;
}

The bug issue was introduced by http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160822/384231.html

Without the patch, the inner loop x86 code (compiled at -O2):

    leal    (%rcx,%rax), %edx
    movl    %edx, %edi
    shrl    $31, %edi
    addl    %edx, %edi
    sarl    %edi
    movslq  %edi, %rdx
    cmpl    %esi, (%r8,%rdx,4)
    cmovlel %edx, %eax
    cmovgl  %edx, %ecx
    leal    1(%rax), %edx
    cmpl    %edx, %ecx
    jne     .LBB0_3

With the patch:

    addl    %ecx, %eax
    movl    %eax, %ecx
    shrl    $31, %ecx
    addl    %eax, %ecx
    sarl    %ecx
    movslq  %ecx, %rax
    cmpl    %esi, (%rdx,%rax,4)
    movq    %r9, %rcx
    cmovgq  %r8, %rcx
    movl    %eax, (%rcx)
    movl    -8(%rsp), %ecx
    movl    -4(%rsp), %eax
    leal    1(%rax), %edi
    cmpl    %edi, %ecx
    jne     .LBB0_3

2 more memory store instructions are generated.

This is because when simplifycfg combines 2 store address into a select, SROA can no longer find the pairing for instruction addresses between load and store, thus the store cannot be removed.

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