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LLVM emits single precision variation of double precision intrinsics #71

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p32blo opened this issue Sep 29, 2017 · 3 comments
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@p32blo
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p32blo commented Sep 29, 2017

The affected intrinsics are:

AVX Intrinsic Expected Instruction Emitted Instruction
_mm256_and_pd vandpd vandps
_mm256_andnot_pd vandnpd vandnps
_mm256_or_pd vorpd vorps
_mm256_xor_pd vxorpd vxorps

Checking in clang here confirms this behavior. Note how gcc emits the correct instructions while clang always uses the single precision variation.

The result does not seem to be affected, since these are bitwise operations on vectors of the same size. However, since the expected instructions are not generated, the assert_* tests will fail if this behavior is not taken into account.

@alexcrichton
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Ok I'm going to close this for now as I think in general we're not going to be able to fix this but we're ruling this as "it's ok". LLVM in general will performan lots of optimizations under the hood, so we can't really guarantee precise intructions unfortunately!

@avl
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avl commented Jul 19, 2019

Don't vandpd and vandps do exactly the same thing anyway? Are they actually emitted as different opcodes by the assembler?

@gnzlbg
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gnzlbg commented Jul 23, 2019

Yes and yes.

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