You're reading from LLVM Code Generation A deep dive into compiler backend development

Product type Paperback

Published in May 2025

Publisher Packt

ISBN-13 9781837637782

Length 608 pages

Edition 1st Edition

Languages

C++

Tools

LLVM

Concepts

Programming Language

Author (1):

Quentin Colombet

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Table of Contents (29) Chapters

Preface

1. Getting Started with LLVM

2. Building LLVM and Understanding the Directory Structure FREE CHAPTER

3. Contributing to LLVM

4. Compiler Basics and How They Map to LLVM APIs

5. Writing Your First Optimization

6. Dealing with Pass Managers

7. TableGen – LLVM Swiss Army Knife for Modeling

8. Middle-End: LLVM IR to LLVM IR

9. Understanding LLVM IR

10. Survey of the Existing Passes

11. Introducing Target-Specific Constructs

12. Hands-On Debugging LLVM IR Passes

13. Introduction to the Backend

14. Getting Started with the Backend

15. Getting Started with the Machine Code Layer

16. The Machine Pass Pipeline

17. LLVM IR to Machine IR

18. Getting Started with Instruction Selection

19. Instruction Selection: The IR Building Phase

20. Instruction Selection: The Legalization Phase

21. Instruction Selection: The Selection Phase and Beyond

22. Final Lowering and Optimizations

23. Instruction Scheduling

24. Register Allocation

25. Lowering of the Stack Layout

26. Getting Started with the Assembler

27. Other Books You May Enjoy

28. Index

Instruction Scheduling

Instruction scheduling is a low-level optimization that improves the sequence of instructions according to different strategies. For instance, it is possible to use this optimization to reduce the register pressure (how many registers you need to allocate) or increase the instruction-level parallelism (ILP) (the number of instructions that can be executed in parallel) of your program.

While this optimization is optional in your LLVM backend, we thought it was important to cover it for two main reasons:

Instruction scheduling can unlock important performance improvements, especially if you are dealing with an in-order processor. In-order processors execute instructions in the order prescribed by the assembly code, whereas out-of-order processors can dynamically adapt the execution of the program while decoding the assembly code.
Approaching the LLVM instruction scheduling infrastructure can be tricky without some guidance.

In this...