You're reading from LLVM Code Generation A deep dive into compiler backend development

Product type Paperback

Published in May 2025

Publisher Packt

ISBN-13 9781837637782

Length 608 pages

Edition 1st Edition

Languages

C++

Tools

LLVM

Concepts

Programming Language

Author (1):

Quentin Colombet

View More author details

Table of Contents (29) Chapters

Preface

1. Getting Started with LLVM

2. Building LLVM and Understanding the Directory Structure FREE CHAPTER

3. Contributing to LLVM

4. Compiler Basics and How They Map to LLVM APIs

5. Writing Your First Optimization

6. Dealing with Pass Managers

7. TableGen – LLVM Swiss Army Knife for Modeling

8. Middle-End: LLVM IR to LLVM IR

9. Understanding LLVM IR

10. Survey of the Existing Passes

11. Introducing Target-Specific Constructs

12. Hands-On Debugging LLVM IR Passes

13. Introduction to the Backend

14. Getting Started with the Backend

15. Getting Started with the Machine Code Layer

16. The Machine Pass Pipeline

17. LLVM IR to Machine IR

18. Getting Started with Instruction Selection

19. Instruction Selection: The IR Building Phase

20. Instruction Selection: The Legalization Phase

21. Instruction Selection: The Selection Phase and Beyond

22. Final Lowering and Optimizations

23. Instruction Scheduling

24. Register Allocation

25. Lowering of the Stack Layout

26. Getting Started with the Assembler

27. Other Books You May Enjoy

28. Index

Getting Started with the Machine Code Layer

So far in this book, we started with high-level concepts and progressively, chapter by chapter, we explained how a concept is brought down to the next, lower level of abstraction. In this chapter, we break away from this top-down approach by making a detour to the machine code (MC) layer, which is the final stage of an LLVM backend.

We thought it was important to look at this layer now for two reasons.

First, this makes the instruction description you have been doing throughout Chapter 11 more concrete because you can see the connection to the hardware.

Second, adding the support for the MC layer to your target description (the .td files that you wrote for your registers and instructions) can be disruptive if you did not think it through beforehand. In other words, if you do not consider the MC layer now, you may need to severely rewrite how your instruction records are structured in TableGen. For example, Figure 12.1 shows a...