You're reading from LLVM Code Generation A deep dive into compiler backend development

Product type Paperback

Published in May 2025

Publisher Packt

ISBN-13 9781837637782

Length 620 pages

Edition 1st Edition

Languages

C++

Tools

LLVM

Concepts

Programming Language

Author (1):

Quentin Colombet

View More author details

Table of Contents (30) Chapters

Preface

1. Part 1: Getting Started with LLVM

2. Building LLVM and Understanding the Directory Structure FREE CHAPTER

3. Contributing to LLVM

4. Compiler Basics and How They Map to LLVM APIs

5. Writing Your First Optimization

6. Dealing with Pass Managers

7. TableGen – LLVM Swiss Army Knife for Modeling

8. Part 2: Middle-End: LLVM IR to LLVM IR

9. Understanding LLVM IR

10. Survey of the Existing Passes

11. Introducing Target-Specific Constructs

12. Hands-On Debugging LLVM IR Passes

13. Part 3: Introduction to the Backend

14. Getting Started with the Backend

15. Getting Started with the Machine Code Layer

16. The Machine Pass Pipeline

17. Part 4: LLVM IR to Machine IR

18. Getting Started with Instruction Selection

19. Instruction Selection: The IR Building Phase

20. Instruction Selection: The Legalization Phase

21. Instruction Selection: The Selection Phase and Beyond

22. Part 5: Final Lowering and Optimizations

23. Instruction Scheduling

24. Register Allocation

25. Lowering of the Stack Layout

26. Getting Started with the Assembler

27. Unlock Your Book’s Exclusive Benefits

28. Other Books You May Enjoy

29. Index

LLVM IR to Machine IR

Now that the secrets of the Machine intermediate representation (IR) have been uncovered, you are ready to learn how to produce it from the LLVM IR.

This part focuses on LLVM IR to Machine IR translation. This translation is called instruction selection and the LLVM infrastructure features several instruction selection frameworks to choose from.

In this part, you will learn about the different instruction selection frameworks, how to use them, and how to provide the necessary target-specific information that they need to function.

The target-specific information that you will learn to provide includes the application binary interface (ABI) of your target, which instructions are supported, and how you get from LLVM IR to your target-specific instruction.

By the end of this part, you will be able to write a completely functional instruction selection implementation that will pave the way for the later machine pass optimizations.

This part of...