Final Lowering and Optimizations
At this point, you are able to generate the Machine intermediate representation (IR) for your backend from any LLVM IR.
The next and final step is to lower this representation into the final assembly representation with properly assigned registers, stack space, and so on.
This part focuses on the optimization passes that the LLVM infrastructure features to perform this lowering.
More specifically, in this part, you will learn the following:
- How to teach instruction scheduling about the timing of your instructions such that you get the best-performing code out of the LLVM infrastructure
- How to use the LLVM register allocation infrastructure to assign registers to your program
- How to teach the prologue-epilogue inserter how to materialize the stack layout of your target
- How to produce the final binary object
Aside from instruction scheduling, which is an optimization, all these steps are mandatory to...
