Quiz time
Now that you have completed reading this chapter, try answering the following questions to test your knowledge:
- Is register allocation a monolithic pass in LLVM?
No, the register allocation infrastructure consists of several passes that work together to perform the register allocation. In an optimized pass pipeline, you can count at least three passes: the coalescer, the allocator, and the virtual register rewriter.
More details are in the Overview of register allocation in LLVM section.
- What are the two analysis passes that support the register allocation infrastructure?
The two analysis passes are the SlotIndexes and LiveIntervals passes, as explained in the Overview of register allocation in LLVM section.
- What does your target need to provide for the register allocation infrastructure to work?
Your target needs to implement the hooks that allow the insertion of spilled code.
See the Enabling the register...
