Design of a Pseudo-Random Binary Code Generator via a Developed Simulation Model

ACEEE Int. J. on Information Technology, Vol. 02, No. 01, March 2012

Design of a Pseudo-Random Binary Code Generator
via a Developed Simulation Model
A. Ahmad and D. Al-Abri
Department of Electrical and Computer Engineering
College of Engineering, Sultan Qaboos University
P. O. Box 33, Postal Code 123; Muscat, Sultanate of Oman
Tel.: (968) 2414 1327; Fax. (968) 2441 3416
E-mails afaq@squ.edu.om; alabrid@squ.edu.om

Abstract—This paper presents a developed tool for Pseudo- Optimized Counters
Random Binary Code generator (PRBCG). Based on extensive In this paper we present a developed simulated tool which
study of LFSR theory we developed the simulation model of
is capable of generating PRBC efficiently. The developed
PRBCG. The developed model is faster and simulates the
process for very high length of Linear Feedback Shift Registers
tool is culmination of exhaustive study of LFSR theory.
(LFSRs). We tested our model for the value n = 300 where n is Therefore, in the ensuing section first we briefly present the
the length of the LFSR. The developed software model is also mathematical modeling of LFSR.
capable of providing the transition states of different bits of
LFSRs. Further, the model has capability of switching to any II. MATHEMATICAL MODEL OF LINEAR FEEDBACK SHIFT REGISTER
possible characteristic polynomial (feedback connections) of
n-bit LFSR. Also, the model is designed such that it can There exist many LFSR models. The classifications of
accommodate all the possible initial conditions (2n) of LFSR. LFSR models are based on the placements of the Exclusive-
OR circuits and the shifts of the registers. The classifications
Index Terms— Pseudo-Random Binary Code, Linear Feedback on basis of shifts are right to left or left to right. Also, the
Shift Registers, Generating Function, Feedback Connection, shift is considered from the first bit to last bit or from last bit
Initial Condition, m-sequence to the first bit. Similarly, the classifications of LFSRs on the
basis of Exclusive-OR circuits are recognized as External
I. INTRODUCTION Exclusive-OR (EEOR) or as Internal Exclusive-OR (IEOR).
Pseudo-Random Binary Code (PRBC) is widely used in Figure 1 depicts an n-bit LFSR circuit. This structure is based
modern engineering. The generation of PRBCs and study of on External Exclusive-OR circuits. The shift register shifts
their properties has attained the more and more attention of the data from bit n to bit 1 while the feedback taps vector [c0,
the researchers because of its wide applications. Therefore, c1, . . . cn]. The feedback taps c1, c2, . . cn are linked with flip-
how to design the Linear Feedback Shift Register (LFSR) flop’s outputs Qn, Qn-1, . . Q2, Q1 respectively whereas c0 link
based hardware circuit to generate PRBCs. Moreover, the represents the connection between the output of EEOR
PRBC sequence o the longest cycle is popularly known as circuits and the input of the flip-flop n. The state space
Maximal Length PRBC sequence (m-sequence). The m- model of this LFSR can be described as follows.
sequence which is one of the basic sequences has always
been topic of current research.
Linear Feedback Shift Registers (LFSRs) have been used
for Pseudo-Random Binary Code Sequence (PRBCS)
generation. The PRRBSs have been used for multiple uses in
digital systems design. Applications include cryptographic
applications like stream ciphers and data hiding. The concept
of LFSR theory is useful in many error correction and detection
codes. The PRRBSs have been used in Built-In Self-Testing
(BIST) for VLSI circuits [1] – [19]. Many more application of Figure 1. An n-bit LFSR
LFSR and PRBCS can be listed as given below: The state space model of this LFSR structure can be
Wireless Communications described as given in equation (1). To explain let matrix [A]
Data Integrity represent the state transition matrix of order n × n, for an n
Checksums stage LFSR shown in Fig. 1. Let the state at any time ‘t’ be
Data Compression represented by vector [Q(t)] = [ Qn(t), ... ,Qj(t), ... ,Q2(t), Q1(t)]
Pseudo-random Number Generation (PN) (which is effectively the contents of the LFSR) where each Qj
represents the state of the jth stage of the LFSR. Further, let
Direct Sequence Spread Spectrum
the LFSR feedback stages be numbered from C0 to Cn,
Scrambler/Descrambler proceeding in the same direction as the shifting occurs i.e.
© 2012 ACEEE 33
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left to right. Let the present state of the LFSR be represented TABLE I. THE OPERATION OF LFSR OF EXAPLE 1
by [Q(t)] and, one clock later, the next state by [Q(t+1)]; then
the relationship between the two states is given by as
described in equation (1).

(1)

Any binary data sequence can be represented in form of
Where, cj = 0 or 1, for 1 j n-1 and cj = 1, for j = 0, n. polynomial in GF(2). Therefore, the tap vector for an LFSR
In equation (1), the values of cj show the existence or can be represented in the form of polynomial and is technically
presence of a feedback connection from the jth stage of the known as characteristic polynomial. Equations (5) define a
LFSR. Thus the state equation for this model can be given as general form of characteristic polynomial and let us call it as
in equation (2). P(x).
[Q(t+1)] = [A] * [Q(t)] (2)
If [Q] = [Q(0)] represents a particular initial loading of the (5)
LFSR, i.e. the content of each flip-flop is zero. Then the
sequence of states through which the LFSR will pass will all
Let {am} = [a0 , a1 , . . , ai , . .], represent the output sequence
the time zeros; means the LFSR is locked. Otherwise, for any
generated by the LFSR used as PRBCS, where ai = 0 or 1.
other loadings the LFSR will be governed by equation (3)
Then this sequence can be represented as as given in
during its successive operation times.
equation (6).
[Q(t)], [A][Q(t)], [A]2[Q(t)], [A]3[Q(t)],.. (3)
Let the matrix ‘period’ be the smallest integer p for which [A]p (6)
=I, where I is an identity matrix. Then [A]p[Q(t)] = [Q(t)] for
any non zero initial vector [Q(0)], indicating the ‘cycle length
From the structure of the type of the LFSR shown in Fig. 1, it
(or period)’ of the LFSR is p. As mentioned above the cycle
can be seen that if the current state of the ith flip-flop is am-i ,
length for [Q(0)] = 0 is always 1, independent of matrix [A].
for i = 1, 2 , ... , n , then by the recurrence relation an equation
Thus, on the basis of this property of periodicity of LFSR
can be given as below.
and equation (4), it follows that.
[Q(t)] = [Q(t+p)]=[A]p[Q(t)] (4)
(7)
To demonstrate equation (4) and to verify its existence let us
consider an example as below. Example 1: Consider a 3-bit
LFSR as shown in Fig. (2). The LFSR has feedback The generating function G(x) associated with the PRBCS can
connections as c0 = c1 = c3 = 1 and c2 = 0. It can be verified by be mathematically defined as in equation (8).
the by using equations (1) and (4) that this LFSR structure
has period of 7. (8)

Or,

(9)

Or, equation (9) can be rewritten as:

(10)
Figure 2. A 3-bit LFSR
Table I demonstrates the all possible sequences of states
through which this LFSR structure passes before repeating
the initial loading. The LFSR is loaded with all 1’s content.

© 2012 ACEEE 34
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III. ABOUT THE DEVELOPMENT AND TESTING OF THE SIMULATED
MODEL

To develop this simulation model we used Microsoft Visual
Basic .Net programming environment is used to create
graphical user application for the Microsoft Windows system.
The theory of LFSR discussed in the above sections are
embedded in this developed simulation model. In our
developed simulation model where the general structure of
LFSR model is programmed to target the objective of
generating PRBCS. Requesting immediate after the size of an
LFSR it generates lists of all possible polynomials for feedback
connections and initial loadings. Immediate after the initial
loading and feedback options are selected the developed
tool computes and outputs the PRBCS. Our simulation model
also has provision of controlling the length of the PRBCS.
Just to elaborate to the readers we present a model
demonstration for data of example 1. The execution of the
program outputs the first window which is shown in Fig. 3.

Figure 5: The output for n =3
computed and results are available in the window. These
results can also be stored in files.
Figure 3: The first window of Model “LFSR” We tested our model for n = 300 but it is difficult to show
the result. A partial window for n = 300 is shown in Fig. 6.
Immediate after feeding the value n = 3 it generates functional
windows for selecting P(x) and initial loadings as depicted in
Fig. 4.

Figure 6: Simulated Window for n = 300
Figure 4: Selection window for the options of P(x) and initial
loadings of Model “LFSR”
CONCLUSIONS
We can control the length of the generated sequence. As
shown in Fig. 5 that for n = 3, with desired sequence length of This work is based on the study of the theory of LFSR.
12, initial state loading of [1, 1, 1] and P(x) = ([1, 1, 0, 1] = 1 + Hence this tool is developed after a comprehensive study of
x + x3) that PRBCS repeats after the period of 7. It can also be LFSR theory and its related issues. First we tested our model
visualized that maximum 12 terms of G(x) are computed. Our for many values of n. We verified our models for small sizes
model provides the complete state table for the complete of n. We also demonstrated and executed this model for n up
operation of generating PRBCS. Also, each G(x) and N(x) are to 300 and it runs satisfactorily. This developed tool requires
© 2012 ACEEE 35
DOI: 01.IJIT.02.01. 53


a very small memory space and execution time is also less. [9] Jamil, T. and Ahmad, A., “An investigation in to the application
During the test and execution of this developed model we of linear feedback shift registers for steganography,” Proceedings
never faced the problem of hanging of computer. Also, the IEEE SoutheastCon2002, Columbia, SC, USA, April 5 – 7, 2002,
output file can be exported either in EXCEL, MATLAB, C pp. 239 – 244, 2002
and FORTRAN 95. [10] Ahmad A., Al-Musharafi, M. J., Al-Busaidi, S., “Design and
study of a strong stream crypto-system model for e-commerce,”
International Council for Computer Communication Publishers,
ACKNOWLEDGMENT Washington DC, USA (The ACM Library), vol. 1, pp. 619 – 630,
The authors wish to thank and acknowledge the support 2002
grant (SQU-DVC/ PSR/RAID/2010/23) provided by Sultan [11] Ahmad, A., Development of State Model Theory for External
Exclusive NOR Type LFSR Structures, Enformatika, vol. 10, pp.
Qaboos University, Sultanate of Oman.
125 – 129, 2005
[12] Ball, J.R., Spittle, A.H., Liu, H.T., ”High-speed m sequence
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DOI: 01.IJIT.02.01. 53

Design of a Pseudo-Random Binary Code Generator via a Developed Simulation Model

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