IRJET- High Speed Multi-Rate Approach based Adaptive Filter using Multiplier-Less Technique
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This document presents a high-speed multi-rate approach for an adaptive filter using a multiplier-less technique. The proposed approach uses decimator and interpolator structures in VHDL to design a narrow band filter. Each structure is simulated using an FPGA and compared to existing structures. The resulting structure is more hardware efficient and uses fewer logic slices than existing structures. Key aspects of multi-rate signal processing and the proposed narrow band filter design using decimation and interpolation are discussed. Simulation results show the proposed approach reduces hardware complexity and resource usage compared to direct-form implementation of the filter.
![International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056
Volume: 06 Issue: 04 | Apr 2019 www.irjet.net p-ISSN: 2395-0072
© 2019, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 202
HIGH SPEED MULTI-RATE APPROACH BASED ADAPTIVE FILTER USING
MULTIPLIER-LESS TECHNIQUE
Md Imran Alam1, Prof. Suresh S. Gawande2, Prof. Satyarth Tiwari3
1Research scholar, Electronics & Communication Department, Bhabha Engineering Research Institute, Bhopal
2,3Professor, Electronics & Communication Department, Bhabha Engineering Research Institute, Bhopal
---------------------------------------------------------------------***----------------------------------------------------------------------
Abstract - More and more people around the world suffer
from digital signal processing research field. The increase
hardware complexity and increase area are the main reasons
for this field. The multi-rate approach used for narrow band
filter is designed and implemented in Xilinx Vertex-E XCV50E
device family. The multi-rate approach is design using the
decimator and interpolator structure in VHDL. Eachstructure
is simulated using Xilinx Vertex-E XCV50E device family and
compared the existing structure. The resulting structure is
hardware efficient and consumes less slices compared to
existing structure.
Key Words: Filter Coefficient, Finite Impulse Response, Pass-
band Frequency, Narrow Band Filter.
1. INTRODUCTION
Multi rate simply means "multiple sampling rates". A multi
rate DSP framework utilizes differenttestingratesinsidethe
framework. At whatever point a flag at one rate must be
utilized by a framework that anticipates an alternate rate,
the rate must be expanded or diminished, and some
preparing is required to do as such. Along these lines "Multi
rate DSP" truly alludes to the workmanship or study of
changing testing rates. Multi-rate preparing discoversusein
flag handling frameworks where different sub-frameworks
with varying example or clock rates should be interfaced
together. At different occasions multi-rate preparing is
utilized to decrease computational overheadofa framework.
For instance, a calculation requires k tasks to be finished per
cycle. By diminishing the examplerateofa flagorframework
by a factor of M, the number-crunching transfer speed
prerequisites are decreasedfromkfsactivitiestokfs/Mtasks
every second. Customary converters are regularly hard to
actualize in scarcely discernible difference huge scale
coordination (VLSI) innovation. By remembering these
things the general population is going for over examining
converters, these converters make broad utilization of
computerized flag handling.
Higher reliability.
Increased functionality.
Reduced chip cost.
Those attributes are regularly required in the advanced
flag handling condition of today. An essential use of
computerized flag handling techniques is in deciding in the
discrete-time do-fundamental the recurrence substance ofa
ceaseless time flag, all the more generally known as
unearthly examination. All the more specifically, it includes
the assurance of either the vitality range or the power range
of the flag.
Practically all melodic projects are delivered in essentially
two phases. To start with, sound from every individual
instrument is recorded in an acoustically dormant studio on
a solitary track of a multitrack recording device.
At that point, the signs from each track are controlled by the
sound architect to include unique sound impacts and are
joined in a blend down framework to finally produce the
stereo chronicle on a two-track recording device.
The sound impacts are artificially produced utilizing
different flag preparing circuits and gadgets, and they are
progressively being performed utilizing advanced flag
handling strategies.
The remainder of the paper is organized as follows: multi-
rate approach algorithm is presented in Section II. The
proposed structures of narrow band filter are presented in
Section III. Hardware and time complexity of the proposed
structures are discussed and compared with the existing
structures in Section IV. ConclusionispresentedinSection V.
2. MULTIRATE APPROACH
The procedure ofchanging over a flag from an offered rateto
an alternate rate is called testing rate transformation. The
frameworks which utilize various examining rates in the
handling ofadvanced flag arecalled multi-rateflagpreparing
[5].
Annihilation is the procedures of bringing down the word
rate of a carefully encoded flag, which is inspected at high
frequencies much over the nyquist rate. It is typicallydoneto
build the goals ofan oversampled flagandtoexpeltheout-of-
band clamor. In a sigma-delta ADC, oversampling the simple
information motion by the modulator alone does not bring
down the quantization commotion; the ADC shouldutilizean
averaging channel, which fills in as a decimator to expel the
clamor and to accomplish higher goals. An essential square
diagrammatic portrayal of the decimator is appeared in
Figure 1.The decimator isa blend of a low pass channel and a
down sampler. In Figure 1 the exchange work, H(z) is](https://image.slidesharecdn.com/irjet-v6i446-190611093908/85/IRJET-High-Speed-Multi-Rate-Approach-based-Adaptive-Filter-using-Multiplier-Less-Technique-1-320.jpg)
![International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056
Volume: 06 Issue: 04 | Apr 2019 www.irjet.net p-ISSN: 2395-0072
© 2019, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 203
illustrative of performing both the activities. The yield word
rate of the decimator is down inspected by the factor M,
where M is the oversampling proportion [6]. The capacity of
low passseparatinganddowntestingcanbedoneutilizingan
averaging circuit. The exchange capacity of the averaging
circuit is given by condition (1.1). It sets up a connection
between the information and yield capacities (1.1)
Fig -1: Block Diagram of Decimator
1
0
1
)(
)(
)(
M
x
x
zMZY
ZX
ZH (1.1)
Up sampling is the way toward embeddings zero-esteemed
examples between uniqueexamplestoexpandtheexamining
rate. (This is classified "zero-stuffing".) Up testingaddstothe
first flag undesired ghastly pictures which are fixated on
products [7] of the first inspecting rate.
"Introduction", in the DSP sense, is the procedure of up-
examining pursued by sifting. (The separating evacuates the
undesired phantom pictures.) As a straight procedure, the
DSP feeling of insertion is to somedegree not the sameasthe
"math" feeling of addition, yet the outcome is reasonably
comparable: to make "in the middle of" tests from the first
examples.
The outcome is as though you had quite recently initially
tested your flag at the higher rate. Expanding the inspecting
recurrence use interpolator
Fig -2: Interpolation with factor L
Since addition depends on zero-stuffingyoucanjustinterject
by number components; you can't insert by fragmentary
variables. (Be that as it may, you can join insertion and
annihilation to accomplish a general sanefactor,forinstance,
4/5 Up-examining adds undesired phantom pictures to the
flag at products of the first inspecting rate, so except if you
expel those by separating, the up-tested flag [7] isn't
equivalent to the first: it's contorted.
A few applications might have the capacitytoendurethat;for
instance, if the pictures getexpelledlaterbyasimplechannel,
yet in many applications you should evacuate the undesired
pictures through advanced sifting. Along these lines,
introduction is undeniably increasingly normal [8] that up-
inspecting alone.
3. PROPOSED STRUCTURE
In this work the design of a decimation filter is presented for
integrating with an existing designed modulator to form a
complete sigma-delta ADC. We use multi-organize
destruction channel which implies the single pulverization
channel is supplanted by fell channels. In this part, we will
discuss the channel engineering utilized in this work,
including their structures, qualities and downsides. the
initial phase in structuring an obliteration channel is to
choose which sorts of channels will be utilized and where
demolition will happen. This section investigates the issues
associated with picking channel design for a listeningdevice
application. The general intensity of a few designs is
analyzed, bringing about the three-arrange engineeringthat
is picked to actualize this channel.
A typical need in gadgets and DSP is to confine a restricted
band of frequenciesfroma more extensivedata transmission
flag. Narrowband channels rather catch just a little piece of
the range. They are said to have a thin band-pass. The band-
pass is basically the amount of the rangethechannel permits
to pass. This is typically estimated in nanometers. Limited
band channel comprises of decimator, restricted band and
interpolator.
Fig -3: Interpolator structure with filter order N3=9 and
L=4
Fig -4: Decimator structure with filter order N1=17 and
M=4
Y(Z)X(Z)
H(Z)
Sampling
Frequency fs
After Decimator
Sampling Frequency
fs/M](https://image.slidesharecdn.com/irjet-v6i446-190611093908/85/IRJET-High-Speed-Multi-Rate-Approach-based-Adaptive-Filter-using-Multiplier-Less-Technique-2-320.jpg)
![International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056
Volume: 06 Issue: 04 | Apr 2019 www.irjet.net p-ISSN: 2395-0072
© 2019, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 205
number of filter coefficients required to realize the
decimator, interpolator and the narrowband filter 64 which
is almost 58% less than the direct method.
REFERENCES
[1] Azadeh Safari, Yinan Kong, “Four tap Daubechies filter
banks based on RNS”, 2012International Symposiumon
Communications and Information Technologies (ISCIT)
978-1-4673-1157-1/12/$31.00 © 2012 IEEE.
[2] Dr. Pawan K. Gaikwad, “Field Programmable Gate Array
Implementation of Digital Filter ofHighest-Possible
Order and its Testing using
AdvancedMicrocontroller”,IJREATInternational Journal
of Research in Engineering & Advanced Technology,
Volume 1, Issue 4, Aug-Sept, 2013.
[3] M.RAVIKUMAR,“ELECTROCARDIOGRAM(ECG)SIGNAL
PROCESSING ON FPGA FOR EMERGING HEALTHCARE
APPLICATIONS ”, International Journal of Electronics
Signals and Systems (IJESS) ISSN: 2231- 5969,Vol-1Iss-
3, 2012.
[4] Pramod Kumar Meher, SeniorMember, IEEE,Shrutisagar
Chandrasekaran, Member, IEEE,andAbbesAmira, Senior
Member, IEEE, “FPGA Realization of FIR Filters by
Efficient and Flexible Systolization Using Distributed
Arithmetic”, IEEE TRANSACTIONS ON SIGNAL
PROCESSING, VOL. 56, NO. 7, JULY 2008.
[5] Yajun Zhou, Sch. of Autom., HangZhou Dianzi Univ.,
Hangzhou China, “Distributed Arithmetic for FIR Filter
implementation on FPGA”, Proceedings of IC-BNMT
2011.
[6] Saman S. Abeysekera and Xue Yao, “Design of Narrow
Band Laguerre Filters Using Min-Max Criterion,”IEEE
conference vol.1, page.137-140, 2000.
[7] Ju-Won lee and Gun-ki lee, “Design of an Adaptive Filter
with a Dynamic Structure for ECG Signal Processing”,
International Journal of Control, AutomationandSystem,
Vol.3, pp.137-142,March2005.
[8] Saeid Sanei and J.A. Chambers, ECG Signal Processing,
John Wiley & Sons Ltd, England, 2007.
[9] Gordon M, Thurdals M. Repolarization Changes
Displayed in Surface ECG Maps. A Simulation Study.
International Journal of Bioelectromagnetism, 4 (5): 92-
104, 2002.
[10] Malmivuo J, Plonsey R. Bioelectromagnetism:Principles
and Application of Bioelectric and Biomagnetic Fields.
Oxford University Press, New York, 1995.
[11] Anderson FA. Impedance plethysmography, in
Encyclopedia of Medical Devices an Instrumentation.
Webster JG, Editor. John Wiley & Sons, New York, 1988,
111-122.](https://image.slidesharecdn.com/irjet-v6i446-190611093908/85/IRJET-High-Speed-Multi-Rate-Approach-based-Adaptive-Filter-using-Multiplier-Less-Technique-4-320.jpg)
IRJET- High Speed Multi-Rate Approach based Adaptive Filter using Multiplier-Less Technique
- 1. International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 06 Issue: 04 | Apr 2019 www.irjet.net p-ISSN: 2395-0072 © 2019, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 202 HIGH SPEED MULTI-RATE APPROACH BASED ADAPTIVE FILTER USING MULTIPLIER-LESS TECHNIQUE Md Imran Alam1, Prof. Suresh S. Gawande2, Prof. Satyarth Tiwari3 1Research scholar, Electronics & Communication Department, Bhabha Engineering Research Institute, Bhopal 2,3Professor, Electronics & Communication Department, Bhabha Engineering Research Institute, Bhopal ---------------------------------------------------------------------***---------------------------------------------------------------------- Abstract - More and more people around the world suffer from digital signal processing research field. The increase hardware complexity and increase area are the main reasons for this field. The multi-rate approach used for narrow band filter is designed and implemented in Xilinx Vertex-E XCV50E device family. The multi-rate approach is design using the decimator and interpolator structure in VHDL. Eachstructure is simulated using Xilinx Vertex-E XCV50E device family and compared the existing structure. The resulting structure is hardware efficient and consumes less slices compared to existing structure. Key Words: Filter Coefficient, Finite Impulse Response, Pass- band Frequency, Narrow Band Filter. 1. INTRODUCTION Multi rate simply means "multiple sampling rates". A multi rate DSP framework utilizes differenttestingratesinsidethe framework. At whatever point a flag at one rate must be utilized by a framework that anticipates an alternate rate, the rate must be expanded or diminished, and some preparing is required to do as such. Along these lines "Multi rate DSP" truly alludes to the workmanship or study of changing testing rates. Multi-rate preparing discoversusein flag handling frameworks where different sub-frameworks with varying example or clock rates should be interfaced together. At different occasions multi-rate preparing is utilized to decrease computational overheadofa framework. For instance, a calculation requires k tasks to be finished per cycle. By diminishing the examplerateofa flagorframework by a factor of M, the number-crunching transfer speed prerequisites are decreasedfromkfsactivitiestokfs/Mtasks every second. Customary converters are regularly hard to actualize in scarcely discernible difference huge scale coordination (VLSI) innovation. By remembering these things the general population is going for over examining converters, these converters make broad utilization of computerized flag handling. Higher reliability. Increased functionality. Reduced chip cost. Those attributes are regularly required in the advanced flag handling condition of today. An essential use of computerized flag handling techniques is in deciding in the discrete-time do-fundamental the recurrence substance ofa ceaseless time flag, all the more generally known as unearthly examination. All the more specifically, it includes the assurance of either the vitality range or the power range of the flag. Practically all melodic projects are delivered in essentially two phases. To start with, sound from every individual instrument is recorded in an acoustically dormant studio on a solitary track of a multitrack recording device. At that point, the signs from each track are controlled by the sound architect to include unique sound impacts and are joined in a blend down framework to finally produce the stereo chronicle on a two-track recording device. The sound impacts are artificially produced utilizing different flag preparing circuits and gadgets, and they are progressively being performed utilizing advanced flag handling strategies. The remainder of the paper is organized as follows: multi- rate approach algorithm is presented in Section II. The proposed structures of narrow band filter are presented in Section III. Hardware and time complexity of the proposed structures are discussed and compared with the existing structures in Section IV. ConclusionispresentedinSection V. 2. MULTIRATE APPROACH The procedure ofchanging over a flag from an offered rateto an alternate rate is called testing rate transformation. The frameworks which utilize various examining rates in the handling ofadvanced flag arecalled multi-rateflagpreparing [5]. Annihilation is the procedures of bringing down the word rate of a carefully encoded flag, which is inspected at high frequencies much over the nyquist rate. It is typicallydoneto build the goals ofan oversampled flagandtoexpeltheout-of- band clamor. In a sigma-delta ADC, oversampling the simple information motion by the modulator alone does not bring down the quantization commotion; the ADC shouldutilizean averaging channel, which fills in as a decimator to expel the clamor and to accomplish higher goals. An essential square diagrammatic portrayal of the decimator is appeared in Figure 1.The decimator isa blend of a low pass channel and a down sampler. In Figure 1 the exchange work, H(z) is
- 2. International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 06 Issue: 04 | Apr 2019 www.irjet.net p-ISSN: 2395-0072 © 2019, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 203 illustrative of performing both the activities. The yield word rate of the decimator is down inspected by the factor M, where M is the oversampling proportion [6]. The capacity of low passseparatinganddowntestingcanbedoneutilizingan averaging circuit. The exchange capacity of the averaging circuit is given by condition (1.1). It sets up a connection between the information and yield capacities (1.1) Fig -1: Block Diagram of Decimator 1 0 1 )( )( )( M x x zMZY ZX ZH (1.1) Up sampling is the way toward embeddings zero-esteemed examples between uniqueexamplestoexpandtheexamining rate. (This is classified "zero-stuffing".) Up testingaddstothe first flag undesired ghastly pictures which are fixated on products [7] of the first inspecting rate. "Introduction", in the DSP sense, is the procedure of up- examining pursued by sifting. (The separating evacuates the undesired phantom pictures.) As a straight procedure, the DSP feeling of insertion is to somedegree not the sameasthe "math" feeling of addition, yet the outcome is reasonably comparable: to make "in the middle of" tests from the first examples. The outcome is as though you had quite recently initially tested your flag at the higher rate. Expanding the inspecting recurrence use interpolator Fig -2: Interpolation with factor L Since addition depends on zero-stuffingyoucanjustinterject by number components; you can't insert by fragmentary variables. (Be that as it may, you can join insertion and annihilation to accomplish a general sanefactor,forinstance, 4/5 Up-examining adds undesired phantom pictures to the flag at products of the first inspecting rate, so except if you expel those by separating, the up-tested flag [7] isn't equivalent to the first: it's contorted. A few applications might have the capacitytoendurethat;for instance, if the pictures getexpelledlaterbyasimplechannel, yet in many applications you should evacuate the undesired pictures through advanced sifting. Along these lines, introduction is undeniably increasingly normal [8] that up- inspecting alone. 3. PROPOSED STRUCTURE In this work the design of a decimation filter is presented for integrating with an existing designed modulator to form a complete sigma-delta ADC. We use multi-organize destruction channel which implies the single pulverization channel is supplanted by fell channels. In this part, we will discuss the channel engineering utilized in this work, including their structures, qualities and downsides. the initial phase in structuring an obliteration channel is to choose which sorts of channels will be utilized and where demolition will happen. This section investigates the issues associated with picking channel design for a listeningdevice application. The general intensity of a few designs is analyzed, bringing about the three-arrange engineeringthat is picked to actualize this channel. A typical need in gadgets and DSP is to confine a restricted band of frequenciesfroma more extensivedata transmission flag. Narrowband channels rather catch just a little piece of the range. They are said to have a thin band-pass. The band- pass is basically the amount of the rangethechannel permits to pass. This is typically estimated in nanometers. Limited band channel comprises of decimator, restricted band and interpolator. Fig -3: Interpolator structure with filter order N3=9 and L=4 Fig -4: Decimator structure with filter order N1=17 and M=4 Y(Z)X(Z) H(Z) Sampling Frequency fs After Decimator Sampling Frequency fs/M
- 3. International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 06 Issue: 04 | Apr 2019 www.irjet.net p-ISSN: 2395-0072 © 2019, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 204 Table -1: Theoretical Analysis of Direct Method and Multi- rate Approach for Different Filter Coefficient and Sampling Frequency 4. SIMULATION RESULT The proposed architecture has very low hardware complexity compared to direct approach based structures, because direct method requires more multiplier compare to proposed architecture. In the proposed architecture, calculate the decimator and interpolatorstructurefordesign a narrow band filter. Table 1 shows the theoretical analysis of direct method & multi-rate approach for different filter coefficient and sampling frequency. Table 2 shows cell usage for the ComparisonofPerformance oftheProposedImplementation and the Existing Implementation of Narrow Band Filter. Table -2: Comparison Result for Previous and Proposed Approach for N=5 Properties Previous Approach Proposed Approach Number of Slice 45 34 Number of Flip Flops 39 32 No. of Slice LUTs 63 57 MCPD (ns) 17.564 14.352 Fig -5: Output Test Bench Waveform of Narrow Band Filter (Filter Coefficient N=5) The design as were discussed in figure 3 and figure 4 were implemented using VHDL and then were tested on model- sim to determine the number of slice and maximum high frequency. In figure 5, figure 6 and figure 7 have shown the output waveform of narrow band filter and chat between filter order and slices. In figure 7, compare the result between numbers of slice and filter order. Increase the filter order also increase the number of slice shown if figure 7. Table -3: Comparison Result for Previous and Proposed Approach for N=9 Previous Approach Proposed Approach Number of Slice 74 66 Number of Flip Flops 71 64 No. of Slice LUTs 141 113 MCPD (ns) 22.432 17.085 Fig -6: Output Waveform of 9_tap Narrow Band Filter 4. SIMULATION RESULT The narrowband filter is realized in FIR filter. Based on the direct approach, the filter requires 150 filter coefficients to meet the desired frequency response. To implement such a large order FIR filter in hardware involves large resources and sometime difficult to implementinresourceconstrained application. Keeping this in view, we have used Multirate approach to design the narrowband filter. We have used down sampling factor 2 and 4 for this purpose and found that, down sampling factor 4 requires significantly less filter constants than 2. To implement the narrowband filter, we therefore chosen down sampling factor 4 and designed the decimator, interpolator and narrowband filter. The total
- 4. International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 06 Issue: 04 | Apr 2019 www.irjet.net p-ISSN: 2395-0072 © 2019, IRJET | Impact Factor value: 7.211 | ISO 9001:2008 Certified Journal | Page 205 number of filter coefficients required to realize the decimator, interpolator and the narrowband filter 64 which is almost 58% less than the direct method. REFERENCES [1] Azadeh Safari, Yinan Kong, “Four tap Daubechies filter banks based on RNS”, 2012International Symposiumon Communications and Information Technologies (ISCIT) 978-1-4673-1157-1/12/$31.00 © 2012 IEEE. [2] Dr. Pawan K. Gaikwad, “Field Programmable Gate Array Implementation of Digital Filter ofHighest-Possible Order and its Testing using AdvancedMicrocontroller”,IJREATInternational Journal of Research in Engineering & Advanced Technology, Volume 1, Issue 4, Aug-Sept, 2013. [3] M.RAVIKUMAR,“ELECTROCARDIOGRAM(ECG)SIGNAL PROCESSING ON FPGA FOR EMERGING HEALTHCARE APPLICATIONS ”, International Journal of Electronics Signals and Systems (IJESS) ISSN: 2231- 5969,Vol-1Iss- 3, 2012. [4] Pramod Kumar Meher, SeniorMember, IEEE,Shrutisagar Chandrasekaran, Member, IEEE,andAbbesAmira, Senior Member, IEEE, “FPGA Realization of FIR Filters by Efficient and Flexible Systolization Using Distributed Arithmetic”, IEEE TRANSACTIONS ON SIGNAL PROCESSING, VOL. 56, NO. 7, JULY 2008. [5] Yajun Zhou, Sch. of Autom., HangZhou Dianzi Univ., Hangzhou China, “Distributed Arithmetic for FIR Filter implementation on FPGA”, Proceedings of IC-BNMT 2011. [6] Saman S. Abeysekera and Xue Yao, “Design of Narrow Band Laguerre Filters Using Min-Max Criterion,”IEEE conference vol.1, page.137-140, 2000. [7] Ju-Won lee and Gun-ki lee, “Design of an Adaptive Filter with a Dynamic Structure for ECG Signal Processing”, International Journal of Control, AutomationandSystem, Vol.3, pp.137-142,March2005. [8] Saeid Sanei and J.A. Chambers, ECG Signal Processing, John Wiley & Sons Ltd, England, 2007. [9] Gordon M, Thurdals M. Repolarization Changes Displayed in Surface ECG Maps. A Simulation Study. International Journal of Bioelectromagnetism, 4 (5): 92- 104, 2002. [10] Malmivuo J, Plonsey R. Bioelectromagnetism:Principles and Application of Bioelectric and Biomagnetic Fields. Oxford University Press, New York, 1995. [11] Anderson FA. Impedance plethysmography, in Encyclopedia of Medical Devices an Instrumentation. Webster JG, Editor. John Wiley & Sons, New York, 1988, 111-122.