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@TimNN TimNN commented Nov 6, 2022

The RISCV data layout was changed in llvm/llvm-project@974e2e6.

This updates all riscv64* targets, though I don't really know what the difference between the gc and imac ones is.

Passes x test codegen at LLVM head and with the currently bundled LLVM version. Without this patch, some tests fail with:

error: internal compiler error: compiler/rustc_codegen_llvm/src/context.rs:192:13: data-layout for target riscv64gc-unknown-none-elf, e-m:e-p:64:64-i64:64-i128:128-n64-S128, differs from LLVM target's riscv64 default layout, `e-m:e-p:64:64-i64:64-i128:128-n32:64-S128

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rustbot commented Nov 6, 2022

r? @nagisa

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@rustbot rustbot added S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue. labels Nov 6, 2022
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rustbot commented Nov 6, 2022

These commits modify compiler targets.
(See the Target Tier Policy.)

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nikic commented Nov 6, 2022

@bors r+ rollup

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bors commented Nov 6, 2022

📌 Commit f414715 has been approved by nikic

It is now in the queue for this repository.

@bors bors added S-waiting-on-bors Status: Waiting on bors to run and complete tests. Bors will change the label on completion. and removed S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. labels Nov 6, 2022
@cuviper cuviper added the llvm-main Marks PRs that are making Rust work with LLVM main (this label is consumed by CI tooling) label Nov 6, 2022
JohnTitor pushed a commit to JohnTitor/rust that referenced this pull request Nov 6, 2022
LLVM 16: Update RISCV data layout

The RISCV data layout was changed in llvm/llvm-project@974e2e6.

This updates all `riscv64*` targets, though I don't really know what the difference between the `gc` and `imac` ones is.

Passes `x test codegen` at LLVM head and with the currently bundled LLVM version. Without this patch, some tests fail with:

> error: internal compiler error: compiler/rustc_codegen_llvm/src/context.rs:192:13: data-layout for target `riscv64gc-unknown-none-elf`, `e-m:e-p:64:64-i64:64-i128:128-n64-S128`, differs from LLVM target's `riscv64` default layout, `e-m:e-p:64:64-i64:64-i128:128-n32:64-S128
bors added a commit to rust-lang-ci/rust that referenced this pull request Nov 7, 2022
Rollup of 9 pull requests

Successful merges:

 - rust-lang#103885 (rustdoc: various cross-crate reexport fixes)
 - rust-lang#103914 (Make underscore_literal_suffix a hard error.)
 - rust-lang#104045 (Add type_array to BaseTypeMethods)
 - rust-lang#104056 (Vec: IntoIterator signature consistency)
 - rust-lang#104059 (Fix typo in `rustc_middle/lint.rs`)
 - rust-lang#104062 (rustdoc: remove unused CSS `#sidebar-filler`)
 - rust-lang#104065 (Migrate rust logo filter to CSS variables)
 - rust-lang#104066 (LLVM 16: Update RISCV data layout)
 - rust-lang#104074 (rustdoc: Add an example for round that is different from truncate)

Failed merges:

r? `@ghost`
`@rustbot` modify labels: rollup
@bors bors merged commit 02a0bde into rust-lang:master Nov 7, 2022
@rustbot rustbot added this to the 1.67.0 milestone Nov 7, 2022
@TimNN TimNN deleted the riscv-layout branch November 7, 2022 07:39
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G = IMAFD (so hardware float support).

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