Ignore:
Timestamp:
Apr 27, 2013, 4:14:04 PM (12 years ago)
Author:
[email protected]
Message:

Cleaned up pre/post inc/dec in bytecode
https://bugs.webkit.org/show_bug.cgi?id=115222

Reviewed by Filip Pizlo.

Source/JavaScriptCore:

A few related changes here:

(*) Removed post_inc and post_dec. The two-result form was awkward to
reason about. Being explicit about the intermediate mov and to_number
reduces DFG overhead, removes some fragile ASSERTs from the DFG, and
fixes a const bug. Plus, we get to blow away 262 lines of code.

(*) Renamed pre_inc and pre_dec to inc and dec, since there's only one
version now.

(*) Renamed to_jsnumber to to_number, to match the ECMA name.

(*) Tightened up the codegen and runtime support for to_number.

  • bytecode/CodeBlock.cpp:

(JSC::CodeBlock::dumpBytecode):

  • bytecode/Opcode.h:

(JSC::padOpcodeName):

  • bytecompiler/BytecodeGenerator.cpp:

(JSC::BytecodeGenerator::emitInc):
(JSC::BytecodeGenerator::emitDec):

  • bytecompiler/BytecodeGenerator.h:

(JSC::BytecodeGenerator::emitToNumber):
(BytecodeGenerator): Removed post_inc and post_dec.

  • bytecompiler/NodesCodegen.cpp:

(JSC::emitPreIncOrDec): Updated for rename.

(JSC::emitPostIncOrDec): Issue an explicit mov and to_number when needed.
These are rare, and they boil away in the DFG.

(JSC::PostfixNode::emitResolve):
(JSC::PrefixNode::emitResolve): For const, use an explicit mov instead
of any special forms. This fixes a bug where we would do string
add/subtract instead of number.

  • dfg/DFGByteCodeParser.cpp:

(JSC::DFG::ByteCodeParser::parseBlock):

  • dfg/DFGCapabilities.h:

(JSC::DFG::canCompileOpcode):

  • jit/JIT.cpp:

(JSC::JIT::privateCompileMainPass):
(JSC::JIT::privateCompileSlowCases):

  • jit/JIT.h:
  • jit/JITArithmetic.cpp:

(JSC::JIT::emit_op_inc):
(JSC::JIT::emitSlow_op_inc):
(JSC::JIT::emit_op_dec):
(JSC::JIT::emitSlow_op_dec):

  • jit/JITArithmetic32_64.cpp:

(JSC::JIT::emit_op_inc):
(JSC::JIT::emitSlow_op_inc):
(JSC::JIT::emit_op_dec):
(JSC::JIT::emitSlow_op_dec): Removed post_inc/dec, and updated for renames.

  • jit/JITOpcodes.cpp:

(JSC::JIT::emit_op_to_number):
(JSC::JIT::emitSlow_op_to_number): Removed a test for number cells. There's
no such thing!

  • jit/JITOpcodes32_64.cpp:

(JSC::JIT::emit_op_to_number): Use LowestTag to avoid making assumptions
about the lowest valued tag.

(JSC::JIT::emitSlow_op_to_number): Updated for renames.

  • jit/JITStubs.cpp:

(JSC::DEFINE_STUB_FUNCTION):

  • jit/JITStubs.h:
  • llint/LLIntSlowPaths.cpp:

(JSC::LLInt::LLINT_SLOW_PATH_DECL):

  • llint/LLIntSlowPaths.h:
  • llint/LowLevelInterpreter32_64.asm:
  • llint/LowLevelInterpreter64.asm:
  • parser/NodeConstructors.h:

(JSC::UnaryPlusNode::UnaryPlusNode): Removed post_inc/dec, and updated for renames.

  • runtime/Operations.cpp:

(JSC::jsIsObjectType): Removed a test for number cells. There's
no such thing!

LayoutTests:

  • fast/js/const-expected.txt:
  • fast/js/resources/const.js: Added tests for some const cases we used

to get wrong.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/Source/JavaScriptCore/jit/JITArithmetic.cpp

    r144137 r149247  
    630630}
    631631
    632 void JIT::emit_op_post_inc(Instruction* currentInstruction)
    633 {
    634     unsigned result = currentInstruction[1].u.operand;
    635     unsigned srcDst = currentInstruction[2].u.operand;
    636 
    637     emitGetVirtualRegister(srcDst, regT0);
    638     move(regT0, regT1);
    639     emitJumpSlowCaseIfNotImmediateInteger(regT0);
    640     addSlowCase(branchAdd32(Overflow, TrustedImm32(1), regT1));
    641     emitFastArithIntToImmNoCheck(regT1, regT1);
    642     emitPutVirtualRegister(srcDst, regT1);
    643     emitPutVirtualRegister(result);
    644     if (canBeOptimizedOrInlined())
    645         killLastResultRegister();
    646 }
    647 
    648 void JIT::emitSlow_op_post_inc(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
    649 {
    650     unsigned result = currentInstruction[1].u.operand;
    651     unsigned srcDst = currentInstruction[2].u.operand;
    652 
    653     linkSlowCase(iter);
    654     linkSlowCase(iter);
    655     JITStubCall stubCall(this, cti_op_post_inc);
    656     stubCall.addArgument(regT0);
    657     stubCall.addArgument(Imm32(srcDst));
    658     stubCall.call(result);
    659 }
    660 
    661 void JIT::emit_op_post_dec(Instruction* currentInstruction)
    662 {
    663     unsigned result = currentInstruction[1].u.operand;
    664     unsigned srcDst = currentInstruction[2].u.operand;
    665 
    666     emitGetVirtualRegister(srcDst, regT0);
    667     move(regT0, regT1);
    668     emitJumpSlowCaseIfNotImmediateInteger(regT0);
    669     addSlowCase(branchSub32(Overflow, TrustedImm32(1), regT1));
    670     emitFastArithIntToImmNoCheck(regT1, regT1);
    671     emitPutVirtualRegister(srcDst, regT1);
    672     emitPutVirtualRegister(result);
    673     if (canBeOptimizedOrInlined())
    674         killLastResultRegister();
    675 }
    676 
    677 void JIT::emitSlow_op_post_dec(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
    678 {
    679     unsigned result = currentInstruction[1].u.operand;
    680     unsigned srcDst = currentInstruction[2].u.operand;
    681 
    682     linkSlowCase(iter);
    683     linkSlowCase(iter);
    684     JITStubCall stubCall(this, cti_op_post_dec);
    685     stubCall.addArgument(regT0);
    686     stubCall.addArgument(Imm32(srcDst));
    687     stubCall.call(result);
    688 }
    689 
    690 void JIT::emit_op_pre_inc(Instruction* currentInstruction)
     632void JIT::emit_op_inc(Instruction* currentInstruction)
    691633{
    692634    unsigned srcDst = currentInstruction[1].u.operand;
     
    699641}
    700642
    701 void JIT::emitSlow_op_pre_inc(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
     643void JIT::emitSlow_op_inc(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
    702644{
    703645    unsigned srcDst = currentInstruction[1].u.operand;
     
    707649    emitGetVirtualRegister(srcDst, regT0);
    708650    notImm.link(this);
    709     JITStubCall stubCall(this, cti_op_pre_inc);
     651    JITStubCall stubCall(this, cti_op_inc);
    710652    stubCall.addArgument(regT0);
    711653    stubCall.call(srcDst);
    712654}
    713655
    714 void JIT::emit_op_pre_dec(Instruction* currentInstruction)
     656void JIT::emit_op_dec(Instruction* currentInstruction)
    715657{
    716658    unsigned srcDst = currentInstruction[1].u.operand;
     
    723665}
    724666
    725 void JIT::emitSlow_op_pre_dec(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
     667void JIT::emitSlow_op_dec(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
    726668{
    727669    unsigned srcDst = currentInstruction[1].u.operand;
     
    731673    emitGetVirtualRegister(srcDst, regT0);
    732674    notImm.link(this);
    733     JITStubCall stubCall(this, cti_op_pre_dec);
     675    JITStubCall stubCall(this, cti_op_dec);
    734676    stubCall.addArgument(regT0);
    735677    stubCall.call(srcDst);
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