Ignore:
Timestamp:
Feb 25, 2014, 2:18:21 PM (11 years ago)
Author:
[email protected]
Message:

Inline caching in the FTL on ARM64 should "work"
https://bugs.webkit.org/show_bug.cgi?id=129334

Reviewed by Mark Hahnenberg.

Gets us to the point where simple tests that use inline caching are passing.

  • assembler/LinkBuffer.cpp:

(JSC::LinkBuffer::copyCompactAndLinkCode):
(JSC::LinkBuffer::shrink):

  • ftl/FTLInlineCacheSize.cpp:

(JSC::FTL::sizeOfGetById):
(JSC::FTL::sizeOfPutById):
(JSC::FTL::sizeOfCall):

  • ftl/FTLOSRExitCompiler.cpp:

(JSC::FTL::compileFTLOSRExit):

  • ftl/FTLThunks.cpp:

(JSC::FTL::osrExitGenerationThunkGenerator):

  • jit/GPRInfo.h:
  • offlineasm/arm64.rb:
File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/Source/JavaScriptCore/jit/GPRInfo.h

    r164333 r164673  
    549549    static const GPRReg regT2 = ARM64Registers::x2;
    550550    static const GPRReg regT3 = ARM64Registers::x23;
    551     static const GPRReg regT4 = ARM64Registers::x24;
    552     static const GPRReg regT5 = ARM64Registers::x5;
     551    static const GPRReg regT4 = ARM64Registers::x5;
     552    static const GPRReg regT5 = ARM64Registers::x24;
    553553    static const GPRReg regT6 = ARM64Registers::x6;
    554554    static const GPRReg regT7 = ARM64Registers::x7;
     
    565565    static const GPRReg argumentGPR1 = ARM64Registers::x1; // regT1
    566566    static const GPRReg argumentGPR2 = ARM64Registers::x2; // regT2
    567     static const GPRReg argumentGPR3 = ARM64Registers::x3; // regT3
    568     static const GPRReg argumentGPR4 = ARM64Registers::x4; // regT4
    569     static const GPRReg argumentGPR5 = ARM64Registers::x5; // regT5
     567    static const GPRReg argumentGPR3 = ARM64Registers::x3;
     568    static const GPRReg argumentGPR4 = ARM64Registers::x4;
     569    static const GPRReg argumentGPR5 = ARM64Registers::x5; // regT4
    570570    static const GPRReg argumentGPR6 = ARM64Registers::x6; // regT6
    571571    static const GPRReg argumentGPR7 = ARM64Registers::x7; // regT7
Note: See TracChangeset for help on using the changeset viewer.