Ignore:
Timestamp:
Mar 6, 2014, 12:16:38 PM (11 years ago)
Author:
[email protected]
Message:

FTL arity fixup should work on ARM64
https://bugs.webkit.org/show_bug.cgi?id=129810

Reviewed by Michael Saboff.

  • Using regT5 to pass the thunk return address to arityFixup is shady since that's a callee-save.


  • The FTL path was assuming X86 conventions for where SP points at the top of the prologue.


This makes some more tests pass.

  • dfg/DFGJITCompiler.cpp:

(JSC::DFG::JITCompiler::compileFunction):

  • ftl/FTLLink.cpp:

(JSC::FTL::link):

  • jit/AssemblyHelpers.h:

(JSC::AssemblyHelpers::prologueStackPointerDelta):

  • jit/JIT.cpp:

(JSC::JIT::privateCompile):

  • jit/ThunkGenerators.cpp:

(JSC::arityFixup):

  • llint/LowLevelInterpreter64.asm:
  • offlineasm/arm64.rb:
  • offlineasm/x86.rb: In addition to the t7 change, make t6 agree with GPRInfo.h.
File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/Source/JavaScriptCore/jit/AssemblyHelpers.h

    r165203 r165205  
    6969
    7070#if CPU(X86_64) || CPU(X86)
    71     size_t prologueStackPointerDelta()
     71    static size_t prologueStackPointerDelta()
    7272    {
    7373        // Prologue only saves the framePointerRegister
     
    104104
    105105#if CPU(ARM) || CPU(ARM64)
    106     size_t prologueStackPointerDelta()
     106    static size_t prologueStackPointerDelta()
    107107    {
    108108        // Prologue saves the framePointerRegister and linkRegister
     
    139139
    140140#if CPU(MIPS)
    141     size_t prologueStackPointerDelta()
     141    static size_t prologueStackPointerDelta()
    142142    {
    143143        // Prologue saves the framePointerRegister and returnAddressRegister
     
    162162
    163163#if CPU(SH4)
    164     size_t prologueStackPointerDelta()
     164    static size_t prologueStackPointerDelta()
    165165    {
    166166        // Prologue saves the framePointerRegister and link register
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