Changeset 173480 in webkit for trunk/Source/JavaScriptCore/llint/LowLevelInterpreter.asm

Timestamp:

Sep 10, 2014, 1:14:11 PM (11 years ago)

Author:

Julien Brianceau

Message:

[mips] Add missing parts and fix LLINT mips backend
​https://bugs.webkit.org/show_bug.cgi?id=136706

Reviewed by Michael Saboff.

• llint/LowLevelInterpreter.asm: Fix invalid CalleeSave register number.

Implement initPCRelative and setEntryAddress macros.

• llint/LowLevelInterpreter32_64.asm: Fix register distribution in

doVMEntry macro.

File:

• trunk/Source/JavaScriptCore/llint/LowLevelInterpreter.asm (modified) (3 diffs)

trunk/Source/JavaScriptCore/llint/LowLevelInterpreter.asm

@@ -254 +254 @@
 elsif ARM or ARMv7_TRADITIONAL or ARMv7
     const CalleeSaveRegisterCount = 7
-elsif ARM64 or MIPS
+elsif ARM64
     const CalleeSaveRegisterCount = 10
-elsif SH4 or X86_64
+elsif SH4 or X86_64 or MIPS
     const CalleeSaveRegisterCount = 5
 elsif X86 or X86_WIN
@@ -790 +790 @@
             subp 8, pcBase
         elsif MIPS
-            crash()  # Need to replace with any initialization steps needed to step up PC relative address calculation
+            la _relativePCBase, pcBase
+        _relativePCBase:
         elsif SH4
             mova _relativePCBase, t0
@@ -828 +829 @@
         flushcp # Force constant pool flush to avoid "pcrel too far" link error.
     elsif MIPS
-        crash()  # Need to replace with code to turn label into and absolute address and save at index
+        la label, t2
+        la _relativePCBase, t3
+        subp t3, t2
+        addp t2, t1, t2
+        move index, t3
+        storep t2, [a0, t3, 4]
     end
 end