Ignore:
Timestamp:
Sep 3, 2015, 3:16:23 PM (10 years ago)
Author:
[email protected]
Message:

Clean up register naming
​https://bugs.webkit.org/show_bug.cgi?id=148658

Reviewed by Geoffrey Garen.

This changes register naming conventions in the llint and baseline JIT
in order to use as few (native) callee-save registers as possible on
64-bits platforms. It also introduces significant changes in the way
registers names are defined in the LLint and baseline JIT in order to
enable a simpler convention about which registers can be aliased. That
convention is valid across all architecture, and described in
llint/LowLevelInterpreter.asm.

Callee save registers are now called out regCS<n> (in the JIT) or
csr<n> (in the LLInt) with a common numbering across all tiers. Some
registers are unused in some tiers.

As a part of this change, rdi was removed from the list of temporary
registers for X86-64 Windows as it is a callee saves register. This
reduced the number of temporary registers for X86-64 Windows.

This is in preparation for properly handling callee save register
preservation and restoration.

  • dfg/DFGJITCompiler.cpp:

(JSC::DFG::JITCompiler::compileFunction):

  • ftl/FTLLink.cpp:

(JSC::FTL::link):

  • jit/FPRInfo.h:

(JSC::FPRInfo::toRegister):
(JSC::FPRInfo::toIndex):

  • jit/GPRInfo.h:

(JSC::GPRInfo::toIndex):
(JSC::GPRInfo::toRegister):
(JSC::GPRInfo::debugName): Deleted.

  • jit/JIT.cpp:

(JSC::JIT::privateCompile):

  • jit/JITArithmetic.cpp:

(JSC::JIT::emit_op_mod):

  • jit/JITOpcodes.cpp:

(JSC::JIT::emitSlow_op_loop_hint):

  • jit/JITOpcodes32_64.cpp:

(JSC::JIT::emit_op_end):
(JSC::JIT::emit_op_new_object):

  • jit/RegisterPreservationWrapperGenerator.cpp:

(JSC::generateRegisterPreservationWrapper):
(JSC::generateRegisterRestoration):

  • jit/ThunkGenerators.cpp:

(JSC::arityFixupGenerator):
(JSC::nativeForGenerator): Deleted.

  • llint/LowLevelInterpreter.asm:
  • llint/LowLevelInterpreter32_64.asm:
  • llint/LowLevelInterpreter64.asm:
  • offlineasm/arm.rb:
  • offlineasm/arm64.rb:
  • offlineasm/cloop.rb:
  • offlineasm/mips.rb:
  • offlineasm/registers.rb:
  • offlineasm/sh4.rb:
  • offlineasm/x86.rb:
File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/Source/JavaScriptCore/jit/GPRInfo.h

    r181993 r189293  
    3232namespace JSC {
    3333
     34// We use the same conventions in the basline JIT as in the LLint. If you
     35// change mappings in the GPRInfo, you should change them in the offlineasm
     36// compiler adequately. The register naming conventions are described at the
     37// top of the LowLevelInterpreter.asm file.
     38
    3439typedef MacroAssembler::RegisterID GPRReg;
    3540#define InvalidGPRReg ((::JSC::GPRReg)-1)
    … …  
    295300#endif // USE(JSVALUE32_64)
    296301
    297 // The baseline JIT requires that regT3 be callee-preserved.
    298 
    299302#if CPU(X86)
    300303#define NUMBER_OF_ARGUMENT_REGISTERS 0u
    … …  
    305308    static const unsigned numberOfRegisters = 6;
    306309    static const unsigned numberOfArgumentRegisters = NUMBER_OF_ARGUMENT_REGISTERS;
    307 
    308     // Note: regT3 is required to be callee-preserved.
    309310
    310311    // Temporary registers.
    … …  
    312313    static const GPRReg regT1 = X86Registers::edx;
    313314    static const GPRReg regT2 = X86Registers::ecx;
    314     static const GPRReg regT3 = X86Registers::ebx;
    315     static const GPRReg regT4 = X86Registers::edi;
    316     static const GPRReg regT5 = X86Registers::esi;
    317     // These registers match the baseline JIT.
    318     static const GPRReg cachedResultRegister = regT0;
    319     static const GPRReg cachedResultRegister2 = regT1;
     315    static const GPRReg regT3 = X86Registers::ebx; // Callee-save
     316    static const GPRReg regT4 = X86Registers::esi; // Callee-save
     317    static const GPRReg regT5 = X86Registers::edi; // Callee-save
    320318    static const GPRReg callFrameRegister = X86Registers::ebp;
    321319    // These constants provide the names for the general purpose argument & return value registers.
    322320    static const GPRReg argumentGPR0 = X86Registers::ecx; // regT2
    323321    static const GPRReg argumentGPR1 = X86Registers::edx; // regT1
     322    static const GPRReg argumentGPR2 = X86Registers::eax; // regT0
     323    static const GPRReg argumentGPR3 = X86Registers::ebx; // regT3
    324324    static const GPRReg nonArgGPR0 = X86Registers::esi; // regT4
    325     static const GPRReg nonArgGPR1 = X86Registers::eax; // regT0
    326     static const GPRReg nonArgGPR2 = X86Registers::ebx; // regT3
     325    static const GPRReg nonArgGPR1 = X86Registers::edi; // regT5
    327326    static const GPRReg returnValueGPR = X86Registers::eax; // regT0
    328327    static const GPRReg returnValueGPR2 = X86Registers::edx; // regT1
    … …  
    346345        ASSERT(reg != InvalidGPRReg);
    347346        ASSERT(static_cast<int>(reg) < 8);
    348         static const unsigned indexForRegister[8] = { 0, 2, 1, 3, InvalidIndex, InvalidIndex, 5, 4 };
     347        static const unsigned indexForRegister[8] = { 0, 2, 1, 3, InvalidIndex, InvalidIndex, 4, 5 };
    349348        unsigned result = indexForRegister[reg];
    350349        return result;
    … …  
    380379    static const unsigned numberOfArgumentRegisters = NUMBER_OF_ARGUMENT_REGISTERS;
    381380
    382     // Note: regT3 is required to be callee-preserved.
    383 
    384381    // These registers match the baseline JIT.
    385     static const GPRReg cachedResultRegister = X86Registers::eax;
    386382    static const GPRReg callFrameRegister = X86Registers::ebp;
    387383    static const GPRReg tagTypeNumberRegister = X86Registers::r14;
    … …  
    389385    // Temporary registers.
    390386    static const GPRReg regT0 = X86Registers::eax;
     387#if !OS(WINDOWS)
     388    static const GPRReg regT1 = X86Registers::esi;
     389    static const GPRReg regT2 = X86Registers::edx;
     390    static const GPRReg regT3 = X86Registers::ecx;
     391    static const GPRReg regT4 = X86Registers::r8;
     392    static const GPRReg regT5 = X86Registers::r10;
     393    static const GPRReg regT6 = X86Registers::edi;
     394    static const GPRReg regT7 = X86Registers::r9;
     395#else
    391396    static const GPRReg regT1 = X86Registers::edx;
    392     static const GPRReg regT2 = X86Registers::ecx;
    393     static const GPRReg regT3 = X86Registers::ebx;
    394     static const GPRReg regT4 = X86Registers::edi;
    395     static const GPRReg regT5 = X86Registers::esi;
    396     static const GPRReg regT6 = X86Registers::r8;
    397     static const GPRReg regT7 = X86Registers::r9;
    398     static const GPRReg regT8 = X86Registers::r10;
    399     static const GPRReg regT9 = X86Registers::r12;
    400     static const GPRReg regT10 = X86Registers::r13;
     397    static const GPRReg regT2 = X86Registers::r8;
     398    static const GPRReg regT3 = X86Registers::r9;
     399    static const GPRReg regT4 = X86Registers::r10;
     400    static const GPRReg regT5 = X86Registers::ecx;
     401#endif
     402
     403    static const GPRReg regCS0 = X86Registers::ebx;
     404
     405#if !OS(WINDOWS)
     406    static const GPRReg regCS1 = X86Registers::r12;
     407    static const GPRReg regCS2 = X86Registers::r13;
     408    static const GPRReg regCS3 = X86Registers::r14;
     409    static const GPRReg regCS4 = X86Registers::r15;
     410#else
     411    static const GPRReg regCS1 = X86Registers::esi;
     412    static const GPRReg regCS2 = X86Registers::edi;
     413    static const GPRReg regCS3 = X86Registers::r12;
     414    static const GPRReg regCS4 = X86Registers::r13;
     415    static const GPRReg regCS5 = X86Registers::r14;
     416    static const GPRReg regCS6 = X86Registers::r15;
     417#endif
     418
    401419    // These constants provide the names for the general purpose argument & return value registers.
    402420#if !OS(WINDOWS)
    403     static const GPRReg argumentGPR0 = X86Registers::edi; // regT4
    404     static const GPRReg argumentGPR1 = X86Registers::esi; // regT5
    405     static const GPRReg argumentGPR2 = X86Registers::edx; // regT1
    406     static const GPRReg argumentGPR3 = X86Registers::ecx; // regT2
    407     static const GPRReg argumentGPR4 = X86Registers::r8;  // regT6
    408     static const GPRReg argumentGPR5 = X86Registers::r9;  // regT7
     421    static const GPRReg argumentGPR0 = X86Registers::edi; // regT6
     422    static const GPRReg argumentGPR1 = X86Registers::esi; // regT1
     423    static const GPRReg argumentGPR2 = X86Registers::edx; // regT2
     424    static const GPRReg argumentGPR3 = X86Registers::ecx; // regT3
     425    static const GPRReg argumentGPR4 = X86Registers::r8; // regT4
     426    static const GPRReg argumentGPR5 = X86Registers::r9; // regT7
    409427#else
    410     static const GPRReg argumentGPR0 = X86Registers::ecx;
    411     static const GPRReg argumentGPR1 = X86Registers::edx;
    412     static const GPRReg argumentGPR2 = X86Registers::r8; // regT6
    413     static const GPRReg argumentGPR3 = X86Registers::r9; // regT7
    414 #endif
    415     static const GPRReg nonArgGPR0 = X86Registers::r10; // regT8
    416     static const GPRReg nonArgGPR1 = X86Registers::ebx; // regT3
    417     static const GPRReg nonArgGPR2 = X86Registers::r12; // regT9
     428    static const GPRReg argumentGPR0 = X86Registers::ecx; // regT5
     429    static const GPRReg argumentGPR1 = X86Registers::edx; // regT1
     430    static const GPRReg argumentGPR2 = X86Registers::r8; // regT2
     431    static const GPRReg argumentGPR3 = X86Registers::r9; // regT3
     432#endif
     433    static const GPRReg nonArgGPR0 = X86Registers::r10; // regT5 (regT4 on Windows)
     434    static const GPRReg nonArgGPR1 = X86Registers::ebx; // Callee save
    418435    static const GPRReg returnValueGPR = X86Registers::eax; // regT0
    419     static const GPRReg returnValueGPR2 = X86Registers::edx; // regT1
    420     static const GPRReg nonPreservedNonReturnGPR = X86Registers::esi;
    421     static const GPRReg nonPreservedNonArgumentGPR = X86Registers::r10;
     436    static const GPRReg returnValueGPR2 = X86Registers::edx; // regT1 or regT2
     437    static const GPRReg nonPreservedNonReturnGPR = X86Registers::r10; // regT5 (regT4 on Windows)
     438    static const GPRReg nonPreservedNonArgumentGPR = X86Registers::r10; // regT5 (regT4 on Windows)
    422439    static const GPRReg patchpointScratchRegister = MacroAssembler::scratchRegister;
    423440
    … …  
    425442    {
    426443        ASSERT(index < numberOfRegisters);
    427         static const GPRReg registerForIndex[numberOfRegisters] = { regT0, regT1, regT2, regT3, regT4, regT5, regT6, regT7, regT8, regT9, regT10 };
     444#if !OS(WINDOWS)
     445        static const GPRReg registerForIndex[numberOfRegisters] = { regT0, regT1, regT2, regT3, regT4, regT5, regT6, regT7, regCS0, regCS1, regCS2 };
     446#else
     447        static const GPRReg registerForIndex[numberOfRegisters] = { regT0, regT1, regT2, regT3, regT4, regT5, regCS0, regCS1, regCS2, regCS3, regCS4 };
     448#endif
    428449        return registerForIndex[index];
    429450    }
    … …  
    444465        ASSERT(reg != InvalidGPRReg);
    445466        ASSERT(static_cast<int>(reg) < 16);
    446         static const unsigned indexForRegister[16] = { 0, 2, 1, 3, InvalidIndex, InvalidIndex, 5, 4, 6, 7, 8, InvalidIndex, 9, 10, InvalidIndex, InvalidIndex };
     467#if !OS(WINDOWS)
     468        static const unsigned indexForRegister[16] = { 0, 3, 2, 8, InvalidIndex, InvalidIndex, 1, 6, 4, 7, 5, InvalidIndex, 9, 10, InvalidIndex, InvalidIndex };
     469#else
     470        static const unsigned indexForRegister[16] = { 0, 5, 1, 6, InvalidIndex, InvalidIndex, 7, 8, 2, 3, 4, InvalidIndex, 9, 10, InvalidIndex, InvalidIndex };
     471#endif
    447472        return indexForRegister[reg];
    448473    }
    … …  
    475500    static const unsigned numberOfArgumentRegisters = NUMBER_OF_ARGUMENT_REGISTERS;
    476501
    477     // Note: regT3 is required to be callee-preserved.
    478 
    479502    // Temporary registers.
    480503    static const GPRReg regT0 = ARMRegisters::r0;
    481504    static const GPRReg regT1 = ARMRegisters::r1;
    482505    static const GPRReg regT2 = ARMRegisters::r2;
    483     static const GPRReg regT3 = ARMRegisters::r4;
     506    static const GPRReg regT3 = ARMRegisters::r3;
    484507    static const GPRReg regT4 = ARMRegisters::r8;
    485508    static const GPRReg regT5 = ARMRegisters::r9;
    … …  
    490513    static const GPRReg regT7 = ARMRegisters::r7;
    491514#endif
    492     static const GPRReg regT8 = ARMRegisters::r3;
     515    static const GPRReg regT8 = ARMRegisters::r4;
    493516    // These registers match the baseline JIT.
    494     static const GPRReg cachedResultRegister = regT0;
    495     static const GPRReg cachedResultRegister2 = regT1;
    496517    static const GPRReg callFrameRegister = ARMRegisters::fp;
    497518    // These constants provide the names for the general purpose argument & return value registers.
    … …  
    499520    static const GPRReg argumentGPR1 = ARMRegisters::r1; // regT1
    500521    static const GPRReg argumentGPR2 = ARMRegisters::r2; // regT2
    501     static const GPRReg argumentGPR3 = ARMRegisters::r3; // regT8
    502     static const GPRReg nonArgGPR0 = ARMRegisters::r4; // regT3
     522    static const GPRReg argumentGPR3 = ARMRegisters::r3; // regT3
     523    static const GPRReg nonArgGPR0 = ARMRegisters::r4; // regT8
    503524    static const GPRReg nonArgGPR1 = ARMRegisters::r8; // regT4
    504525    static const GPRReg nonArgGPR2 = ARMRegisters::r9; // regT5
    505526    static const GPRReg returnValueGPR = ARMRegisters::r0; // regT0
    506527    static const GPRReg returnValueGPR2 = ARMRegisters::r1; // regT1
    507     static const GPRReg nonPreservedNonReturnGPR = ARMRegisters::r5; // regT7
     528    static const GPRReg nonPreservedNonReturnGPR = ARMRegisters::r5;
    508529
    509530    static GPRReg toRegister(unsigned index)
    … …  
    527548        static const unsigned indexForRegister[16] =
    528549#if CPU(ARM_THUMB2)
    529             { 0, 1, 2, 8, 3, 9, InvalidIndex, InvalidIndex, 4, 5, 6, 7, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex };
     550            { 0, 1, 2, 3, 8, InvalidIndex, InvalidIndex, InvalidIndex, 4, 5, 6, 7, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex };
    530551#else
    531             { 0, 1, 2, 8, 3, 9, InvalidIndex, 7, 4, 5, 6, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex };
     552            { 0, 1, 2, 3, 8, InvalidIndex, InvalidIndex, 7, 4, 5, 6, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex };
    532553#endif
    533554        unsigned result = indexForRegister[reg];
    … …  
    562583    static const unsigned numberOfArgumentRegisters = 8;
    563584
    564     // Note: regT3 is required to be callee-preserved.
    565 
    566585    // These registers match the baseline JIT.
    567     static const GPRReg cachedResultRegister = ARM64Registers::x0;
    568     static const GPRReg timeoutCheckRegister = ARM64Registers::x26;
    569586    static const GPRReg callFrameRegister = ARM64Registers::fp;
    570587    static const GPRReg tagTypeNumberRegister = ARM64Registers::x27;
    … …  
    574591    static const GPRReg regT1 = ARM64Registers::x1;
    575592    static const GPRReg regT2 = ARM64Registers::x2;
    576     static const GPRReg regT3 = ARM64Registers::x23;
    577     static const GPRReg regT4 = ARM64Registers::x5;
    578     static const GPRReg regT5 = ARM64Registers::x24;
     593    static const GPRReg regT3 = ARM64Registers::x3;
     594    static const GPRReg regT4 = ARM64Registers::x4;
     595    static const GPRReg regT5 = ARM64Registers::x5;
    579596    static const GPRReg regT6 = ARM64Registers::x6;
    580597    static const GPRReg regT7 = ARM64Registers::x7;
    … …  
    587604    static const GPRReg regT14 = ARM64Registers::x14;
    588605    static const GPRReg regT15 = ARM64Registers::x15;
     606    static const GPRReg regCS0 = ARM64Registers::x26; // Used by LLInt only
     607    static const GPRReg regCS1 = ARM64Registers::x27; // tagTypeNumber
     608    static const GPRReg regCS2 = ARM64Registers::x28; // tagMask
    589609    // These constants provide the names for the general purpose argument & return value registers.
    590610    static const GPRReg argumentGPR0 = ARM64Registers::x0; // regT0
    591611    static const GPRReg argumentGPR1 = ARM64Registers::x1; // regT1
    592612    static const GPRReg argumentGPR2 = ARM64Registers::x2; // regT2
    593     static const GPRReg argumentGPR3 = ARM64Registers::x3;
    594     static const GPRReg argumentGPR4 = ARM64Registers::x4;
    595     static const GPRReg argumentGPR5 = ARM64Registers::x5; // regT4
     613    static const GPRReg argumentGPR3 = ARM64Registers::x3; // regT3
     614    static const GPRReg argumentGPR4 = ARM64Registers::x4; // regT4
     615    static const GPRReg argumentGPR5 = ARM64Registers::x5; // regT5
    596616    static const GPRReg argumentGPR6 = ARM64Registers::x6; // regT6
    597617    static const GPRReg argumentGPR7 = ARM64Registers::x7; // regT7
    598618    static const GPRReg nonArgGPR0 = ARM64Registers::x8; // regT8
    599619    static const GPRReg nonArgGPR1 = ARM64Registers::x9; // regT9
    600     static const GPRReg nonArgGPR2 = ARM64Registers::x10; // regT10
    601620    static const GPRReg returnValueGPR = ARM64Registers::x0; // regT0
    602621    static const GPRReg returnValueGPR2 = ARM64Registers::x1; // regT1
    … …  
    664683public:
    665684    typedef GPRReg RegisterType;
    666     static const unsigned numberOfRegisters = 7;
     685    static const unsigned numberOfRegisters = 8;
    667686    static const unsigned numberOfArgumentRegisters = NUMBER_OF_ARGUMENT_REGISTERS;
    668687
    669688    // regT0 must be v0 for returning a 32-bit value.
    670689    // regT1 must be v1 for returning a pair of 32-bit value.
    671     // regT3 must be saved in the callee, so use an S register.
    672690
    673691    // Temporary registers.
    674692    static const GPRReg regT0 = MIPSRegisters::v0;
    675693    static const GPRReg regT1 = MIPSRegisters::v1;
    676     static const GPRReg regT2 = MIPSRegisters::t4;
    677     static const GPRReg regT3 = MIPSRegisters::s2;
    678     static const GPRReg regT4 = MIPSRegisters::t5;
    679     static const GPRReg regT5 = MIPSRegisters::t6;
    680     static const GPRReg regT6 = MIPSRegisters::s0;
     694    static const GPRReg regT2 = MIPSRegisters::t2;
     695    static const GPRReg regT3 = MIPSRegisters::t3;
     696    static const GPRReg regT4 = MIPSRegisters::t4;
     697    static const GPRReg regT5 = MIPSRegisters::t5;
     698    static const GPRReg regT6 = MIPSRegisters::t0;
     699    static const GPRReg regT7 = MIPSRegisters::t1;
    681700    // These registers match the baseline JIT.
    682     static const GPRReg cachedResultRegister = regT0;
    683     static const GPRReg cachedResultRegister2 = regT1;
    684701    static const GPRReg callFrameRegister = MIPSRegisters::fp;
    685702    // These constants provide the names for the general purpose argument & return value registers.
    … …  
    688705    static const GPRReg argumentGPR2 = MIPSRegisters::a2;
    689706    static const GPRReg argumentGPR3 = MIPSRegisters::a3;
    690     static const GPRReg nonArgGPR0 = regT2;
    691     static const GPRReg nonArgGPR1 = regT3;
    692     static const GPRReg nonArgGPR2 = regT4;
     707    static const GPRReg nonArgGPR0 = regT0;
     708    static const GPRReg nonArgGPR1 = regT1;
    693709    static const GPRReg returnValueGPR = regT0;
    694710    static const GPRReg returnValueGPR2 = regT1;
    695     static const GPRReg nonPreservedNonReturnGPR = regT5;
     711    static const GPRReg nonPreservedNonReturnGPR = regT2;
    696712
    697713    static GPRReg toRegister(unsigned index)
    698714    {
    699715        ASSERT(index < numberOfRegisters);
    700         static const GPRReg registerForIndex[numberOfRegisters] = { regT0, regT1, regT2, regT3, regT4, regT5, regT6 };
     716        static const GPRReg registerForIndex[numberOfRegisters] = { regT0, regT1, regT2, regT3, regT4, regT5, regT6, regT7 };
    701717        return registerForIndex[index];
    702718    }
    … …  
    708724        static const unsigned indexForRegister[24] = {
    709725            InvalidIndex, InvalidIndex, 0, 1, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex,
    710             InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex, 2, 4, 5, InvalidIndex,
    711             6, InvalidIndex, 3, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex
     726            6, 7, 2, 3, 4, 5, InvalidIndex, InvalidIndex,
     727            InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex
    712728        };
    713729        unsigned result = indexForRegister[reg];
    … …  
    746762    static const GPRReg regT0 = SH4Registers::r0;
    747763    static const GPRReg regT1 = SH4Registers::r1;
    748     static const GPRReg regT2 = SH4Registers::r2;
    749     static const GPRReg regT3 = SH4Registers::r10;
    750     static const GPRReg regT4 = SH4Registers::r4;
    751     static const GPRReg regT5 = SH4Registers::r5;
    752     static const GPRReg regT6 = SH4Registers::r6;
    753     static const GPRReg regT7 = SH4Registers::r7;
     764    static const GPRReg regT2 = SH4Registers::r6;
     765    static const GPRReg regT3 = SH4Registers::r7;
     766    static const GPRReg regT4 = SH4Registers::r2;
     767    static const GPRReg regT5 = SH4Registers::r3;
     768    static const GPRReg regT6 = SH4Registers::r4;
     769    static const GPRReg regT7 = SH4Registers::r5;
    754770    static const GPRReg regT8 = SH4Registers::r8;
    755771    static const GPRReg regT9 = SH4Registers::r9;
    … …  
    759775    static const GPRReg callFrameRegister = SH4Registers::fp;
    760776    // These constants provide the names for the general purpose argument & return value registers.
    761     static const GPRReg argumentGPR0 = regT4;
    762     static const GPRReg argumentGPR1 = regT5;
    763     static const GPRReg argumentGPR2 = regT6;
    764     static const GPRReg argumentGPR3 = regT7;
    765     static const GPRReg nonArgGPR0 = regT3;
    766     static const GPRReg nonArgGPR1 = regT8;
    767     static const GPRReg nonArgGPR2 = regT9;
     777    static const GPRReg argumentGPR0 = SH4Registers::r4; // regT6
     778    static const GPRReg argumentGPR1 = SH4Registers::r5; // regT7
     779    static const GPRReg argumentGPR2 = SH4Registers::r6; // regT2
     780    static const GPRReg argumentGPR3 = SH4Registers::r7; // regT3
     781    static const GPRReg nonArgGPR0 = regT4;
     782    static const GPRReg nonArgGPR1 = regT5;
    768783    static const GPRReg returnValueGPR = regT0;
    769784    static const GPRReg returnValueGPR2 = regT1;
    … …  
    781796        ASSERT(reg != InvalidGPRReg);
    782797        ASSERT(reg < 14);
    783         static const unsigned indexForRegister[14] = { 0, 1, 2, InvalidIndex, 4, 5, 6, 7, 8, 9, 3, InvalidIndex, InvalidIndex, InvalidIndex };
     798        static const unsigned indexForRegister[14] = { 0, 1, 4, 5, 6, 7, 2, 3, 8, 9, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex };
    784799        unsigned result = indexForRegister[reg];
    785800        return result;
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