Changeset 195182 in webkit for trunk/Source/JavaScriptCore/offlineasm/mips.rb

Timestamp:

Jan 17, 2016, 1:15:45 AM (9 years ago)

Author:

Julien Brianceau

Message:

[mips] Fix regT2 and regT3 trampling in MacroAssembler
​https://bugs.webkit.org/show_bug.cgi?id=153131

Mips $t2 and $t3 registers were used as temporary registers
in MacroAssemblerMIPS.h, whereas they are mapped to regT2
and regT3 in LLInt and GPRInfo.

This patch rearranges register mapping for the mips architecture:

• use $t0 and $t1 as temp registers in LLInt (as in MacroAssembler)
• use $t7 and $t8 as temp registers in MacroAssembler (as in LLInt)
• remove $t6 from temp registers list in LLInt
• update GPRInfo.h accordingly
• add mips macroScratchRegisters() list in RegisterSet.cpp

Reviewed by Michael Saboff.

• assembler/MacroAssemblerMIPS.h:
• jit/GPRInfo.h:

(JSC::GPRInfo::toRegister):
(JSC::GPRInfo::toIndex):

• jit/RegisterSet.cpp:

(JSC::RegisterSet::macroScratchRegisters):
(JSC::RegisterSet::calleeSaveRegisters):

• offlineasm/mips.rb:

File:

• trunk/Source/JavaScriptCore/offlineasm/mips.rb (modified) (2 diffs)

trunk/Source/JavaScriptCore/offlineasm/mips.rb

@@ -33 +33 @@
 # $v0 => t0, r0
 # $v1 => t1, r1
+# $t0 =>            (scratch)
+# $t1 =>            (scratch)
 # $t2 =>         t2
 # $t3 =>         t3
 # $t4 =>         t4
 # $t5 =>         t5
-# $t6 =>            (scratch)
+# $t6 =>         t6
 # $t7 =>            (scratch)
 # $t8 =>            (scratch)
@@ -93 +95 @@
 end
 
-MIPS_TEMP_GPRS = [SpecialRegister.new("$t6"), SpecialRegister.new("$t7"), SpecialRegister.new("$t8")]
+MIPS_TEMP_GPRS = [SpecialRegister.new("$t0"), SpecialRegister.new("$t1"), SpecialRegister.new("$t7"), SpecialRegister.new("$t8")]
 MIPS_ZERO_REG = SpecialRegister.new("$zero")
 MIPS_GP_REG = SpecialRegister.new("$gp")