Changeset 201651 in webkit for trunk/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.cpp

Timestamp:

Jun 3, 2016, 11:42:11 AM (9 years ago)

Author:

[email protected]

Message:

ARMv7 vstm and vldm instructions can only operate on a maximum of 16 registers.
​https://bugs.webkit.org/show_bug.cgi?id=158349

Reviewed by Filip Pizlo.

According to the ARM Assembler Reference, the vstm and vldm instructions can only
operate on a maximum of 16 registers. See
​http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dht0002a/ch01s03s02.html
and ​http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dht0002a/ch01s03s02.html.

The ARMv7 probe code was wrongly using these instructions to store and load all
32 'd' registers. This is now fixed.

• assembler/MacroAssemblerARMv7.cpp:

File:

• trunk/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.cpp (modified) (2 diffs)

trunk/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.cpp

@@ -225 +225 @@
 
     "add       ip, sp, #" STRINGIZE_VALUE_OF(PROBE_CPU_D0_OFFSET) "\n"
-    "vstmia.64 ip, { d0-d31 }" "\n"
+    "vstmia.64 ip!, { d0-d15 }" "\n"
+    "vstmia.64 ip!, { d16-d31 }" "\n"
 
     "mov       fp, sp" "\n" // Save the ProbeContext*.
@@ -239 +240 @@
 
     "add       ip, sp, #" STRINGIZE_VALUE_OF(PROBE_CPU_D31_OFFSET + FPREG_SIZE) "\n"
-    "vldmdb.64 ip!, { d0-d31 }" "\n"
+    "vldmdb.64 ip!, { d16-d31 }" "\n"
+    "vldmdb.64 ip!, { d0-d15 }" "\n"
+
     "add       ip, sp, #" STRINGIZE_VALUE_OF(PROBE_CPU_R11_OFFSET + GPREG_SIZE) "\n"
     "ldmdb     ip, { r0-r11 }" "\n"