Changeset 219740 in webkit for trunk/Source/JavaScriptCore/assembler/MacroAssemblerPrinter.cpp

Timestamp:

Jul 21, 2017, 1:44:33 PM (8 years ago)

Author:

[email protected]

Message:

Refactor MASM probe CPUState to use arrays for register storage.
​https://bugs.webkit.org/show_bug.cgi?id=174694

Reviewed by Keith Miller.

Using arrays for register storage in CPUState allows us to do away with the
huge switch statements to decode each register id. We can now simply index into
the arrays.

With this patch, we now:

1. Remove the need for macros for defining the list of CPU registers. We can go back to simple enums. This makes the code easier to read.

2. Make the assembler the authority on register names. Most of this code is moved into the assembler from GPRInfo and FPRInfo. GPRInfo and FPRInfo now forwards to the assembler.

3. Make the assembler the authority on the number of registers of each type.

4. Fix a "bug" in ARMv7's lastRegister(). It was previously omitting lr and pc. This is inconsistent with how every other CPU architecture implements lastRegister(). This patch fixes it to return the true last GPR i.e. pc, but updates RegisterSet::reservedHardwareRegisters() to exclude those registers.

• assembler/ARM64Assembler.h:

(JSC::ARM64Assembler::numberOfRegisters):
(JSC::ARM64Assembler::firstSPRegister):
(JSC::ARM64Assembler::lastSPRegister):
(JSC::ARM64Assembler::numberOfSPRegisters):
(JSC::ARM64Assembler::numberOfFPRegisters):
(JSC::ARM64Assembler::gprName):
(JSC::ARM64Assembler::sprName):
(JSC::ARM64Assembler::fprName):

• assembler/ARMAssembler.h:

(JSC::ARMAssembler::numberOfRegisters):
(JSC::ARMAssembler::firstSPRegister):
(JSC::ARMAssembler::lastSPRegister):
(JSC::ARMAssembler::numberOfSPRegisters):
(JSC::ARMAssembler::numberOfFPRegisters):
(JSC::ARMAssembler::gprName):
(JSC::ARMAssembler::sprName):
(JSC::ARMAssembler::fprName):

• assembler/ARMv7Assembler.h:

(JSC::ARMv7Assembler::lastRegister):
(JSC::ARMv7Assembler::numberOfRegisters):
(JSC::ARMv7Assembler::firstSPRegister):
(JSC::ARMv7Assembler::lastSPRegister):
(JSC::ARMv7Assembler::numberOfSPRegisters):
(JSC::ARMv7Assembler::numberOfFPRegisters):
(JSC::ARMv7Assembler::gprName):
(JSC::ARMv7Assembler::sprName):
(JSC::ARMv7Assembler::fprName):

• assembler/AbstractMacroAssembler.h:

(JSC::AbstractMacroAssembler::numberOfRegisters):
(JSC::AbstractMacroAssembler::gprName):
(JSC::AbstractMacroAssembler::firstSPRegister):
(JSC::AbstractMacroAssembler::lastSPRegister):
(JSC::AbstractMacroAssembler::numberOfSPRegisters):
(JSC::AbstractMacroAssembler::sprName):
(JSC::AbstractMacroAssembler::numberOfFPRegisters):
(JSC::AbstractMacroAssembler::fprName):

• assembler/MIPSAssembler.h:

(JSC::MIPSAssembler::numberOfRegisters):
(JSC::MIPSAssembler::firstSPRegister):
(JSC::MIPSAssembler::lastSPRegister):
(JSC::MIPSAssembler::numberOfSPRegisters):
(JSC::MIPSAssembler::numberOfFPRegisters):
(JSC::MIPSAssembler::gprName):
(JSC::MIPSAssembler::sprName):
(JSC::MIPSAssembler::fprName):

• assembler/MacroAssembler.h:

(JSC::MacroAssembler::CPUState::gprName):
(JSC::MacroAssembler::CPUState::sprName):
(JSC::MacroAssembler::CPUState::fprName):
(JSC::MacroAssembler::CPUState::gpr):
(JSC::MacroAssembler::CPUState::spr):
(JSC::MacroAssembler::CPUState::fpr):
(JSC::MacroAssembler::CPUState::pc):
(JSC::MacroAssembler::CPUState::fp):
(JSC::MacroAssembler::CPUState::sp):
(JSC::ProbeContext::gpr):
(JSC::ProbeContext::spr):
(JSC::ProbeContext::fpr):
(JSC::ProbeContext::gprName):
(JSC::ProbeContext::sprName):
(JSC::ProbeContext::fprName):
(JSC::MacroAssembler::numberOfRegisters): Deleted.
(JSC::MacroAssembler::numberOfFPRegisters): Deleted.

• assembler/MacroAssemblerARM.cpp:
• assembler/MacroAssemblerARM64.cpp:

(JSC::arm64ProbeTrampoline):

• assembler/MacroAssemblerARMv7.cpp:
• assembler/MacroAssemblerPrinter.cpp:

(JSC::Printer::nextID):
(JSC::Printer::printAllRegisters):
(JSC::Printer::printPCRegister):
(JSC::Printer::printRegisterID):
(JSC::Printer::printAddress):

• assembler/MacroAssemblerX86Common.cpp:
• assembler/X86Assembler.h:

(JSC::X86Assembler::numberOfRegisters):
(JSC::X86Assembler::firstSPRegister):
(JSC::X86Assembler::lastSPRegister):
(JSC::X86Assembler::numberOfSPRegisters):
(JSC::X86Assembler::numberOfFPRegisters):
(JSC::X86Assembler::gprName):
(JSC::X86Assembler::sprName):
(JSC::X86Assembler::fprName):

• jit/FPRInfo.h:

(JSC::FPRInfo::debugName):

• jit/GPRInfo.h:

(JSC::GPRInfo::debugName):

• jit/RegisterSet.cpp:

(JSC::RegisterSet::reservedHardwareRegisters):

File:

• trunk/Source/JavaScriptCore/assembler/MacroAssemblerPrinter.cpp (modified) (5 diffs)

trunk/Source/JavaScriptCore/assembler/MacroAssemblerPrinter.cpp

@@ -38 +38 @@
 using FPRegisterID = MacroAssembler::FPRegisterID;
 
+template<typename T> T nextID(T id) { return static_cast<T>(id + 1); }
+
 void printAllRegisters(PrintStream& out, Context& context)
 {
@@ -57 +59 @@
 #endif
 
-    #define PRINT_GPREGISTER(_type, _regName) { \
-        intptr_t value = reinterpret_cast<intptr_t>(cpu._regName); \
-        INDENT, out.printf("    %6s: " INTPTR_HEX_VALUE_FORMAT "  %ld\n", #_regName, value, value) ; \
+    for (auto id = MacroAssembler::firstRegister(); id <= MacroAssembler::lastRegister(); id = nextID(id)) {
+        intptr_t value = static_cast<intptr_t>(cpu.gpr(id));
+        INDENT, out.printf("    %6s: " INTPTR_HEX_VALUE_FORMAT "  %ld\n", cpu.gprName(id), value, value);
     }
-    FOR_EACH_CPU_GPREGISTER(PRINT_GPREGISTER)
-    FOR_EACH_CPU_SPECIAL_REGISTER(PRINT_GPREGISTER)
-    #undef PRINT_GPREGISTER
+    for (auto id = MacroAssembler::firstSPRegister(); id <= MacroAssembler::lastSPRegister(); id = nextID(id)) {
+        intptr_t value = static_cast<intptr_t>(cpu.spr(id));
+        INDENT, out.printf("    %6s: " INTPTR_HEX_VALUE_FORMAT "  %ld\n", cpu.sprName(id), value, value);
+    }
     #undef INTPTR_HEX_VALUE_FORMAT
-    
-    #define PRINT_FPREGISTER(_type, _regName) { \
-        uint64_t* u = reinterpret_cast<uint64_t*>(&cpu._regName); \
-        double* d = reinterpret_cast<double*>(&cpu._regName); \
-        INDENT, out.printf("    %6s: 0x%016llx  %.13g\n", #_regName, *u, *d); \
+
+    for (auto id = MacroAssembler::firstFPRegister(); id <= MacroAssembler::lastFPRegister(); id = nextID(id)) {
+        uint64_t u = bitwise_cast<uint64_t>(cpu.fpr(id));
+        double d = cpu.fpr(id);
+        INDENT, out.printf("    %6s: 0x%016llx  %.13g\n", cpu.fprName(id), u, d);
     }
-    FOR_EACH_CPU_FPREGISTER(PRINT_FPREGISTER)
-    #undef PRINT_FPREGISTER
 
     INDENT, out.print("}\n");
@@ -82 +83 @@
 {
     auto cpu = context.probeContext.cpu;
-    void* value;
-#if CPU(X86) || CPU(X86_64)
-    value = cpu.eip;
-#elif CPU(ARM_TRADITIONAL) || CPU(ARM_THUMB2) || CPU(ARM64)
-    value = cpu.pc;
-#else
-#error "Unsupported CPU"
-#endif
-    out.printf("pc:<%p %ld>", value, bitwise_cast<intptr_t>(value));
+    intptr_t value = cpu.pc();
+    out.printf("pc:<%p %ld>", bitwise_cast<void*>(value), value);
 }
 
@@ -97 +91 @@
     RegisterID regID = context.data.as<RegisterID>();
     const char* name = CPUState::gprName(regID);
-    void* value = context.probeContext.gpr(regID);
-    out.printf("%s:<%p %ld>", name, value, bitwise_cast<intptr_t>(value));
+    intptr_t value = context.probeContext.gpr(regID);
+    out.printf("%s:<%p %ld>", name, bitwise_cast<void*>(value), value);
 }
 
@@ -114 +108 @@
     RegisterID regID = address.base;
     const char* name = CPUState::gprName(regID);
-    void* value = context.probeContext.gpr(regID);
-    out.printf("Address{base:%s:<%p %ld>, offset:<0x%x %d>", name, value, bitwise_cast<intptr_t>(value), address.offset, address.offset);
+    intptr_t value = context.probeContext.gpr(regID);
+    out.printf("Address{base:%s:<%p %ld>, offset:<0x%x %d>", name, bitwise_cast<void*>(value), value, address.offset, address.offset);
 }