Ignore:
Timestamp:
Jul 3, 2019, 12:52:42 PM (6 years ago)
Author:
[email protected]
Message:

Refactoring of architectural Register Information
https://bugs.webkit.org/show_bug.cgi?id=198604

Patch by Paulo Matos <Paulo Matos> on 2019-07-03
Reviewed by Keith Miller.

The goal of this patch is to centralize the register information per platform
but access it in a platform independent way. The patch as been implemented for all
known platforms: ARM64, ARMv7, MIPS, X86 and X86_64. Register information has
been centralized in an architecture per-file: each file is called assembler/<arch>Registers.h.

RegisterInfo.h is used as a forwarding header to choose which register information to load.
assembler/<arch>Assembler.h and jit/RegisterSet.cpp use this information in a platform
independent way.

  • CMakeLists.txt:
  • JavaScriptCore.xcodeproj/project.pbxproj:
  • assembler/ARM64Assembler.h:

(JSC::ARM64Assembler::gprName): Use register names from register info file.
(JSC::ARM64Assembler::sprName): likewise.
(JSC::ARM64Assembler::fprName): likewise.

  • assembler/ARM64Registers.h: Added.
  • assembler/ARMv7Assembler.h:

(JSC::ARMv7Assembler::gprName): Use register names from register info file.
(JSC::ARMv7Assembler::sprName): likewise.
(JSC::ARMv7Assembler::fprName): likewise.

  • assembler/ARMv7Registers.h: Added.
  • assembler/MIPSAssembler.h:

(JSC::MIPSAssembler::gprName): Use register names from register info file.
(JSC::MIPSAssembler::sprName): likewise.
(JSC::MIPSAssembler::fprName): likewise.

  • assembler/MIPSRegisters.h: Added.
  • assembler/RegisterInfo.h: Added.
  • assembler/X86Assembler.h:

(JSC::X86Assembler::gprName): Use register names from register info file.
(JSC::X86Assembler::sprName): likewise.
(JSC::X86Assembler::fprName): likewise.

  • assembler/X86Registers.h: Added.
  • assembler/X86_64Registers.h: Added.
  • jit/GPRInfo.h: Fix typo in comment (s/basline/baseline).
  • jit/RegisterSet.cpp:

(JSC::RegisterSet::reservedHardwareRegisters): Use register properties from register info file.
(JSC::RegisterSet::calleeSaveRegisters): likewise.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/Source/JavaScriptCore/assembler/ARMv7Assembler.h

    r240650 r247097  
    3131#include "AssemblerBuffer.h"
    3232#include "AssemblerCommon.h"
     33#include "RegisterInfo.h"
    3334#include <limits.h>
    3435#include <wtf/Assertions.h>
     
    3839namespace JSC {
    3940
    40 namespace ARMRegisters {
     41namespace RegisterNames {
    4142
    4243    typedef enum : int8_t {
    43         r0,
    44         r1,
    45         r2,
    46         r3,
    47         r4,
    48         r5,
    49         r6,
    50         r7,
    51         r8,
    52         r9,
    53         r10,
    54         r11,
    55         r12,
    56         r13,
    57         r14,
    58         r15,
    59 
    60         fp = r7,   // frame pointer
    61         sb = r9,   // static base
    62         sl = r10,  // stack limit
    63         ip = r12,
    64         sp = r13,
    65         lr = r14,
    66         pc = r15,
     44#define REGISTER_ID(id, name, r, cs) id,
     45        FOR_EACH_GP_REGISTER(REGISTER_ID)
     46#undef REGISTER_ID
     47
     48#define REGISTER_ALIAS(id, name, alias) id = alias,
     49        FOR_EACH_REGISTER_ALIAS(REGISTER_ALIAS)
     50#undef REGISTER_ALIAS
    6751        InvalidGPRReg = -1,
    6852    } RegisterID;
    6953
    7054    typedef enum : int8_t {
    71         apsr,
    72         fpscr
     55#define REGISTER_ID(id, name) id,
     56        FOR_EACH_SP_REGISTER(REGISTER_ID)
     57#undef REGISTER_ID
    7358    } SPRegisterID;
    7459
    7560    typedef enum : int8_t {
    76         s0,
    77         s1,
    78         s2,
    79         s3,
    80         s4,
    81         s5,
    82         s6,
    83         s7,
    84         s8,
    85         s9,
    86         s10,
    87         s11,
    88         s12,
    89         s13,
    90         s14,
    91         s15,
    92         s16,
    93         s17,
    94         s18,
    95         s19,
    96         s20,
    97         s21,
    98         s22,
    99         s23,
    100         s24,
    101         s25,
    102         s26,
    103         s27,
    104         s28,
    105         s29,
    106         s30,
    107         s31,
     61#define REGISTER_ID(id, name, r, cs) id,
     62        FOR_EACH_FP_SINGLE_REGISTER(REGISTER_ID)
     63#undef REGISTER_ID
    10864    } FPSingleRegisterID;
    10965
    11066    typedef enum : int8_t {
    111         d0,
    112         d1,
    113         d2,
    114         d3,
    115         d4,
    116         d5,
    117         d6,
    118         d7,
    119         d8,
    120         d9,
    121         d10,
    122         d11,
    123         d12,
    124         d13,
    125         d14,
    126         d15,
    127 #if CPU(ARM_NEON) || CPU(ARM_VFP_V3_D32)
    128         d16,
    129         d17,
    130         d18,
    131         d19,
    132         d20,
    133         d21,
    134         d22,
    135         d23,
    136         d24,
    137         d25,
    138         d26,
    139         d27,
    140         d28,
    141         d29,
    142         d30,
    143         d31,
    144 #endif // CPU(ARM_NEON) || CPU(ARM_VFP_V3_D32)
     67#define REGISTER_ID(id, name, r, cs) id,
     68        FOR_EACH_FP_DOUBLE_REGISTER(REGISTER_ID)
     69#undef REGISTER_ID
    14570        InvalidFPRReg = -1,
    14671    } FPDoubleRegisterID;
     
    14873#if CPU(ARM_NEON)
    14974    typedef enum : int8_t {
    150         q0,
    151         q1,
    152         q2,
    153         q3,
    154         q4,
    155         q5,
    156         q6,
    157         q7,
    158         q8,
    159         q9,
    160         q10,
    161         q11,
    162         q12,
    163         q13,
    164         q14,
    165         q15,
     75#define REGISTER_ID(id, name, r, cs) id,
     76        FOR_EACH_FP_QUAD_REGISTER(REGISTER_ID)
     77#undef REGISTER_ID
    16678    } FPQuadRegisterID;
    16779#endif // CPU(ARM_NEON)
     
    456368        ASSERT(id >= firstRegister() && id <= lastRegister());
    457369        static const char* const nameForRegister[numberOfRegisters()] = {
    458             "r0", "r1", "r2", "r3",
    459             "r4", "r5", "r6", "fp",
    460             "r8", "r9", "r10", "r11",
    461             "ip", "sp", "lr", "pc"
     370#define REGISTER_NAME(id, name, r, cs) name,
     371        FOR_EACH_GP_REGISTER(REGISTER_NAME)
     372#undef REGISTER_NAME       
    462373        };
    463374        return nameForRegister[id];
     
    468379        ASSERT(id >= firstSPRegister() && id <= lastSPRegister());
    469380        static const char* const nameForRegister[numberOfSPRegisters()] = {
    470             "apsr", "fpscr"
     381#define REGISTER_NAME(id, name) name,
     382        FOR_EACH_SP_REGISTER(REGISTER_NAME)
     383#undef REGISTER_NAME
    471384        };
    472385        return nameForRegister[id];
     
    477390        ASSERT(id >= firstFPRegister() && id <= lastFPRegister());
    478391        static const char* const nameForRegister[numberOfFPRegisters()] = {
    479             "d0", "d1", "d2", "d3",
    480             "d4", "d5", "d6", "d7",
    481             "d8", "d9", "d10", "d11",
    482             "d12", "d13", "d14", "d15",
    483 #if CPU(ARM_NEON) || CPU(ARM_VFP_V3_D32)
    484             "d16", "d17", "d18", "d19",
    485             "d20", "d21", "d22", "d23",
    486             "d24", "d25", "d26", "d27",
    487             "d28", "d29", "d30", "d31"
    488 #endif // CPU(ARM_NEON) || CPU(ARM_VFP_V3_D32)
     392#define REGISTER_NAME(id, name, r, cs) name,
     393        FOR_EACH_FP_DOUBLE_REGISTER(REGISTER_NAME)
     394#undef REGISTER_NAME
    489395        };
    490396        return nameForRegister[id];
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