Ignore:
Timestamp:
Feb 28, 2022, 1:56:27 AM (3 years ago)
Author:
Angelos Oikonomopoulos
Message:

[JSC] Reuse known register values on ARMv7
https://bugs.webkit.org/show_bug.cgi?id=237207

Reviewed by Žan Doberšek.

Set up a CachedTempRegister for each of addressTempRegister,
dataTempRegister on ARMv7 and use them to generate shorter instruction
sequences when possible.

Saves 1.5-2% of code size on JS2 with no measurable difference in
performance.

  • assembler/AbstractMacroAssembler.h:

(JSC::AbstractMacroAssembler::CachedTempRegister::value):

  • assembler/MacroAssemblerARMv7.cpp:

(JSC::MacroAssembler::probe):

  • assembler/MacroAssemblerARMv7.h:

(JSC::MacroAssemblerARMv7::MacroAssemblerARMv7):
(JSC::MacroAssemblerARMv7::add32):
(JSC::MacroAssemblerARMv7::getEffectiveAddress):
(JSC::MacroAssemblerARMv7::add64):
(JSC::MacroAssemblerARMv7::lshift32):
(JSC::MacroAssemblerARMv7::mul32):
(JSC::MacroAssemblerARMv7::rshift32):
(JSC::MacroAssemblerARMv7::urshift32):
(JSC::MacroAssemblerARMv7::load32):
(JSC::MacroAssemblerARMv7::load16):
(JSC::MacroAssemblerARMv7::load16SignedExtendTo32):
(JSC::MacroAssemblerARMv7::load8):
(JSC::MacroAssemblerARMv7::load8SignedExtendTo32):
(JSC::MacroAssemblerARMv7::loadPair32):
(JSC::MacroAssemblerARMv7::store8):
(JSC::MacroAssemblerARMv7::storePair32):
(JSC::MacroAssemblerARMv7::loadDouble):
(JSC::MacroAssemblerARMv7::loadFloat):
(JSC::MacroAssemblerARMv7::storeDouble):
(JSC::MacroAssemblerARMv7::storeFloat):
(JSC::MacroAssemblerARMv7::branchTruncateDoubleToInt32):
(JSC::MacroAssemblerARMv7::branchConvertDoubleToInt32):
(JSC::MacroAssemblerARMv7::long_move):
(JSC::MacroAssemblerARMv7::short_move):
(JSC::MacroAssemblerARMv7::move):
(JSC::MacroAssemblerARMv7::compare32AndSetFlags):
(JSC::MacroAssemblerARMv7::branch8):
(JSC::MacroAssemblerARMv7::branchTest8):
(JSC::MacroAssemblerARMv7::branchTest16):
(JSC::MacroAssemblerARMv7::farJump):
(JSC::MacroAssemblerARMv7::branchMul32):
(JSC::MacroAssemblerARMv7::nearCall):
(JSC::MacroAssemblerARMv7::nearTailCall):
(JSC::MacroAssemblerARMv7::call):
(JSC::MacroAssemblerARMv7::compare8):
(JSC::MacroAssemblerARMv7::test8):
(JSC::MacroAssemblerARMv7::jump):
(JSC::MacroAssemblerARMv7::makeBranch):
(JSC::MacroAssemblerARMv7::setupArmAddress):
(JSC::MacroAssemblerARMv7::makeBaseIndexBase):
(JSC::MacroAssemblerARMv7::moveFixedWidthEncoding):
(JSC::MacroAssemblerARMv7::cachedDataTempRegister):
(JSC::MacroAssemblerARMv7::cachedAddressTempRegister):
(JSC::MacroAssemblerARMv7::getCachedDataTempRegisterIDAndInvalidate):
(JSC::MacroAssemblerARMv7::getCachedAddressTempRegisterIDAndInvalidate):

  • bytecode/CallLinkInfo.cpp:

(JSC::CallLinkInfo::emitFastPathImpl):

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h

    r287301 r290589  
    6464    MacroAssemblerARMv7()
    6565        : m_makeJumpPatchable(false)
     66        , m_cachedDataTempRegister(this, dataTempRegister)
     67        , m_cachedAddressTempRegister(this, addressTempRegister)
    6668    {
    6769    }
     
    194196        // Avoid unpredictable instruction if the destination is the stack pointer
    195197        if (dest == ARMRegisters::sp && src != dest) {
    196             add32(imm, src, addressTempRegister);
    197             move(addressTempRegister, dest);
     198            RegisterID scratch = getCachedAddressTempRegisterIDAndInvalidate();
     199            add32(imm, src, scratch);
     200            move(scratch, dest);
    198201            return;
    199202        }
     
    223226    void add32(Address src, RegisterID dest)
    224227    {
     228        // load32 will invalidate the cachedDataTempRegister() for us
    225229        load32(src, dataTempRegister);
    226230        add32(dataTempRegister, dest);
     
    235239    void getEffectiveAddress(BaseIndex address, RegisterID dest)
    236240    {
    237         m_assembler.lsl(addressTempRegister, address.index, static_cast<int>(address.scale));
    238         m_assembler.add(dest, address.base, addressTempRegister);
     241        RegisterID scratch = getCachedAddressTempRegisterIDAndInvalidate();
     242        m_assembler.lsl(scratch, address.index, static_cast<int>(address.scale));
     243        m_assembler.add(dest, address.base, scratch);
    239244        if (address.offset)
    240245            add32(TrustedImm32(address.offset), dest);
     
    248253    void add64(TrustedImm32 imm, AbsoluteAddress address)
    249254    {
     255        RegisterID scratch = getCachedDataTempRegisterIDAndInvalidate();
    250256        move(TrustedImmPtr(address.m_ptr), addressTempRegister);
    251257
    252         m_assembler.ldr(dataTempRegister, addressTempRegister, ARMThumbImmediate::makeUInt12(0));
     258        m_assembler.ldr(scratch, addressTempRegister, ARMThumbImmediate::makeUInt12(0));
    253259        ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);
    254260        if (armImm.isValid())
    255             m_assembler.add_S(dataTempRegister, dataTempRegister, armImm);
     261            m_assembler.add_S(scratch, scratch, armImm);
    256262        else {
    257263            move(imm, addressTempRegister);
    258             m_assembler.add_S(dataTempRegister, dataTempRegister, addressTempRegister);
     264            m_assembler.add_S(scratch, scratch, addressTempRegister);
    259265            move(TrustedImmPtr(address.m_ptr), addressTempRegister);
    260266        }
    261         m_assembler.str(dataTempRegister, addressTempRegister, ARMThumbImmediate::makeUInt12(0));
    262 
    263         m_assembler.ldr(dataTempRegister, addressTempRegister, ARMThumbImmediate::makeUInt12(4));
    264         m_assembler.adc(dataTempRegister, dataTempRegister, ARMThumbImmediate::makeEncodedImm(imm.m_value >> 31));
    265         m_assembler.str(dataTempRegister, addressTempRegister, ARMThumbImmediate::makeUInt12(4));
     267        m_assembler.str(scratch, addressTempRegister, ARMThumbImmediate::makeUInt12(0));
     268
     269        m_assembler.ldr(scratch, addressTempRegister, ARMThumbImmediate::makeUInt12(4));
     270        m_assembler.adc(scratch, scratch, ARMThumbImmediate::makeEncodedImm(imm.m_value >> 31));
     271        m_assembler.str(scratch, addressTempRegister, ARMThumbImmediate::makeUInt12(4));
    266272    }
    267273
     
    318324    void lshift32(RegisterID src, RegisterID shiftAmount, RegisterID dest)
    319325    {
     326        RegisterID scratch = getCachedDataTempRegisterIDAndInvalidate();
    320327        // Clamp the shift to the range 0..31
    321328        ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(0x1f);
    322329        ASSERT(armImm.isValid());
    323         m_assembler.ARM_and(dataTempRegister, shiftAmount, armImm);
    324 
    325         m_assembler.lsl(dest, src, dataTempRegister);
     330        m_assembler.ARM_and(scratch, shiftAmount, armImm);
     331
     332        m_assembler.lsl(dest, src, scratch);
    326333    }
    327334
     
    343350    void mul32(RegisterID src, RegisterID dest)
    344351    {
    345         m_assembler.smull(dest, dataTempRegister, dest, src);
     352        RegisterID scratch = getCachedDataTempRegisterIDAndInvalidate();
     353        m_assembler.smull(dest, scratch, dest, src);
    346354    }
    347355
    348356    void mul32(RegisterID left, RegisterID right, RegisterID dest)
    349357    {
    350         m_assembler.smull(dest, dataTempRegister, left, right);
     358        RegisterID scratch = getCachedDataTempRegisterIDAndInvalidate();
     359        m_assembler.smull(dest, scratch, left, right);
    351360    }
    352361
     
    354363    {
    355364        move(imm, dataTempRegister);
     365        cachedDataTempRegister().invalidate();
    356366        m_assembler.smull(dest, dataTempRegister, src, dataTempRegister);
    357367    }
     
    478488    void rshift32(RegisterID src, RegisterID shiftAmount, RegisterID dest)
    479489    {
     490        RegisterID scratch = getCachedDataTempRegisterIDAndInvalidate();
    480491        // Clamp the shift to the range 0..31
    481492        ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(0x1f);
    482493        ASSERT(armImm.isValid());
    483         m_assembler.ARM_and(dataTempRegister, shiftAmount, armImm);
    484 
    485         m_assembler.asr(dest, src, dataTempRegister);
     494        m_assembler.ARM_and(scratch, shiftAmount, armImm);
     495
     496        m_assembler.asr(dest, src, scratch);
    486497    }
    487498
     
    506517    void urshift32(RegisterID src, RegisterID shiftAmount, RegisterID dest)
    507518    {
     519        RegisterID scratch = getCachedDataTempRegisterIDAndInvalidate();
    508520        // Clamp the shift to the range 0..31
    509521        ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(0x1f);
    510522        ASSERT(armImm.isValid());
    511         m_assembler.ARM_and(dataTempRegister, shiftAmount, armImm);
     523        m_assembler.ARM_and(scratch, shiftAmount, armImm);
    512524       
    513         m_assembler.lsr(dest, src, dataTempRegister);
     525        m_assembler.lsr(dest, src, scratch);
    514526    }
    515527   
     
    659671    void load32(ArmAddress address, RegisterID dest)
    660672    {
     673        if (dest == addressTempRegister)
     674            cachedAddressTempRegister().invalidate();
     675        else if (dest == dataTempRegister)
     676            cachedDataTempRegister().invalidate();
     677
    661678        if (address.type == ArmAddress::HasIndex)
    662679            m_assembler.ldr(dest, address.base, address.u.index, address.u.scale);
     
    673690    void load16(ArmAddress address, RegisterID dest)
    674691    {
     692        if (dest == addressTempRegister)
     693            cachedAddressTempRegister().invalidate();
     694        else if (dest == dataTempRegister)
     695            cachedDataTempRegister().invalidate();
     696
    675697        if (address.type == ArmAddress::HasIndex)
    676698            m_assembler.ldrh(dest, address.base, address.u.index, address.u.scale);
     
    688710    {
    689711        ASSERT(address.type == ArmAddress::HasIndex);
     712        if (dest == addressTempRegister)
     713            cachedAddressTempRegister().invalidate();
     714        else if (dest == dataTempRegister)
     715            cachedDataTempRegister().invalidate();
     716
    690717        m_assembler.ldrsh(dest, address.base, address.u.index, address.u.scale);
    691718    }
     
    693720    void load8(ArmAddress address, RegisterID dest)
    694721    {
     722        if (dest == addressTempRegister)
     723            cachedAddressTempRegister().invalidate();
     724        else if (dest == dataTempRegister)
     725            cachedDataTempRegister().invalidate();
     726
    695727        if (address.type == ArmAddress::HasIndex)
    696728            m_assembler.ldrb(dest, address.base, address.u.index, address.u.scale);
     
    708740    {
    709741        ASSERT(address.type == ArmAddress::HasIndex);
     742        if (dest == addressTempRegister)
     743            cachedAddressTempRegister().invalidate();
     744        else if (dest == dataTempRegister)
     745            cachedDataTempRegister().invalidate();
     746
    710747        m_assembler.ldrsb(dest, address.base, address.u.index, address.u.scale);
    711748    }
     
    780817        move(TrustedImmPtr(address), addressTempRegister);
    781818        m_assembler.ldr(dest, addressTempRegister, ARMThumbImmediate::makeUInt16(0));
     819        cachedAddressTempRegister().invalidate();
    782820    }
    783821   
     
    876914        if (absOffset < 0)
    877915            absOffset = -absOffset;
    878         if (!(absOffset & ~0x3fc))
     916        if (!(absOffset & ~0x3fc)) {
     917            if ((dest1 == addressTempRegister) || (dest2 == addressTempRegister))
     918                cachedAddressTempRegister().invalidate();
     919            if ((dest1 == dataTempRegister) || (dest2 == dataTempRegister))
     920                cachedDataTempRegister().invalidate();
    879921            m_assembler.ldrd(dest1, dest2, address.base, address.offset, /* index: */ true, /* wback: */ false);
    880         else if (address.base == dest1) {
     922        } else if (address.base == dest1) {
    881923            load32(address.withOffset(4), dest2);
    882924            load32(address, dest1);
     
    953995    void store8(RegisterID src, const void *address)
    954996    {
    955         move(TrustedImmPtr(address), addressTempRegister);
    956         store8(src, ArmAddress(addressTempRegister, 0));
     997        RegisterID scratch = getCachedAddressTempRegisterIDAndInvalidate();
     998        move(TrustedImmPtr(address), scratch);
     999        store8(src, ArmAddress(scratch, 0));
    9571000    }
    9581001   
     
    10241067    {
    10251068        ASSERT(src1 != dataTempRegister && src2 != dataTempRegister);
     1069        RegisterID scratch = getCachedDataTempRegisterIDAndInvalidate();
    10261070        // The 'addressTempRegister' might be used when the offset is wide, so use 'dataTempRegister'
    10271071        if (address.scale == TimesOne)
    1028             m_assembler.add(dataTempRegister, address.base, address.index);
     1072            m_assembler.add(scratch, address.base, address.index);
    10291073        else {
    10301074            ShiftTypeAndAmount shift { ARMShiftType::SRType_LSL, static_cast<unsigned>(address.scale) };
    1031             m_assembler.add(dataTempRegister, address.base, address.index, shift);
    1032         }
    1033         storePair32(src1, src2, Address(dataTempRegister, address.offset));
     1075            m_assembler.add(scratch, address.base, address.index, shift);
     1076        }
     1077        storePair32(src1, src2, Address(scratch, address.offset));
    10341078    }
    10351079
     
    10841128        // Arm vfp addresses can be offset by a 9-bit ones-comp immediate, left shifted by 2.
    10851129        if ((offset & 3) || (offset > (255 * 4)) || (offset < -(255 * 4))) {
    1086             add32(TrustedImm32(offset), base, addressTempRegister);
    1087             base = addressTempRegister;
     1130            RegisterID scratch = getCachedAddressTempRegisterIDAndInvalidate();
     1131            add32(TrustedImm32(offset), base, scratch);
     1132            base = scratch;
    10881133            offset = 0;
    10891134        }
     
    10991144        // Arm vfp addresses can be offset by a 9-bit ones-comp immediate, left shifted by 2.
    11001145        if ((offset & 3) || (offset > (255 * 4)) || (offset < -(255 * 4))) {
    1101             add32(TrustedImm32(offset), base, addressTempRegister);
    1102             base = addressTempRegister;
     1146            RegisterID scratch = getCachedAddressTempRegisterIDAndInvalidate();
     1147            add32(TrustedImm32(offset), base, scratch);
     1148            base = scratch;
    11031149            offset = 0;
    11041150        }
     
    11121158        lshift32(TrustedImm32(address.scale), addressTempRegister);
    11131159        add32(address.base, addressTempRegister);
     1160        cachedAddressTempRegister().invalidate();
    11141161        loadDouble(Address(addressTempRegister, address.offset), dest);
    11151162    }
     
    11201167        lshift32(TrustedImm32(address.scale), addressTempRegister);
    11211168        add32(address.base, addressTempRegister);
     1169        cachedAddressTempRegister().invalidate();
    11221170        loadFloat(Address(addressTempRegister, address.offset), dest);
    11231171    }
     
    11531201        // Arm vfp addresses can be offset by a 9-bit ones-comp immediate, left shifted by 2.
    11541202        if ((offset & 3) || (offset > (255 * 4)) || (offset < -(255 * 4))) {
    1155             add32(TrustedImm32(offset), base, addressTempRegister);
    1156             base = addressTempRegister;
     1203            RegisterID scratch = getCachedAddressTempRegisterIDAndInvalidate();
     1204            add32(TrustedImm32(offset), base, scratch);
     1205            base = scratch;
    11571206            offset = 0;
    11581207        }
     
    11681217        // Arm vfp addresses can be offset by a 9-bit ones-comp immediate, left shifted by 2.
    11691218        if ((offset & 3) || (offset > (255 * 4)) || (offset < -(255 * 4))) {
    1170             add32(TrustedImm32(offset), base, addressTempRegister);
    1171             base = addressTempRegister;
     1219            RegisterID scratch = getCachedAddressTempRegisterIDAndInvalidate();
     1220            add32(TrustedImm32(offset), base, scratch);
     1221            base = scratch;
    11721222            offset = 0;
    11731223        }
     
    11871237        lshift32(TrustedImm32(address.scale), addressTempRegister);
    11881238        add32(address.base, addressTempRegister);
     1239        cachedAddressTempRegister().invalidate();
    11891240        storeDouble(src, Address(addressTempRegister, address.offset));
    11901241    }
     
    11951246        lshift32(TrustedImm32(address.scale), addressTempRegister);
    11961247        add32(address.base, addressTempRegister);
     1248        cachedAddressTempRegister().invalidate();
    11971249        storeFloat(src, Address(addressTempRegister, address.offset));
    11981250    }
     
    13641416    Jump branchTruncateDoubleToInt32(FPRegisterID src, RegisterID dest, BranchTruncateType branchType = BranchIfTruncateFailed)
    13651417    {
     1418        RegisterID scratch = getCachedDataTempRegisterIDAndInvalidate();
    13661419        // Convert into dest.
    13671420        m_assembler.vcvt_floatingPointToSigned(fpTempRegisterAsSingle(), src);
     
    13711424        // clamped to 0x80000000, so 2x dest is zero in this case. In the case of
    13721425        // overflow the result will be equal to -2.
    1373         Jump underflow = branchAdd32(Zero, dest, dest, dataTempRegister);
    1374         Jump noOverflow = branch32(NotEqual, dataTempRegister, TrustedImm32(-2));
     1426        Jump underflow = branchAdd32(Zero, dest, dest, scratch);
     1427        Jump noOverflow = branch32(NotEqual, scratch, TrustedImm32(-2));
    13751428
    13761429        // For BranchIfTruncateSuccessful, we branch if 'noOverflow' jumps.
     
    14151468        if (negZeroCheck) {
    14161469            Jump valueIsNonZero = branchTest32(NonZero, dest);
    1417             m_assembler.vmov(dataTempRegister, ARMRegisters::asSingleUpper(src));
    1418             failureCases.append(branch32(LessThan, dataTempRegister, TrustedImm32(0)));
     1470            RegisterID scratch = getCachedDataTempRegisterIDAndInvalidate();
     1471            m_assembler.vmov(scratch, ARMRegisters::asSingleUpper(src));
     1472            failureCases.append(branch32(LessThan, scratch, TrustedImm32(0)));
    14191473            valueIsNonZero.link(this);
    14201474        }
     
    14831537        m_assembler.push(1 << src1 | 1 << src2);
    14841538    }
    1485    
     1539
     1540    ALWAYS_INLINE void long_move(TrustedImm32 imm, RegisterID dest)
     1541    {
     1542        uint32_t value = imm.m_value;
     1543        m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(value));
     1544        if (value & 0xffff0000)
     1545            m_assembler.movt(dest, ARMThumbImmediate::makeUInt16(value >> 16));
     1546    }
     1547
     1548    bool short_move(RegisterID dest, CachedTempRegister& cachedRegister, intptr_t valueAsInt)
     1549    {
     1550        intptr_t currentRegisterContents;
     1551        if (cachedRegister.value(currentRegisterContents)) {
     1552            intptr_t valueDelta = valueAsInt - currentRegisterContents;
     1553            intptr_t valueDeltaSave = valueDelta;
     1554            if (valueDelta < 0) {
     1555                valueDelta = -valueDelta;
     1556            } else if (!valueDelta) {
     1557                // If valueDelta is 0, no need to emit or update anything.
     1558                return true;
     1559            }
     1560            ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(valueDelta);
     1561            if (armImm.isValid()) {
     1562                if (valueDeltaSave > 0)
     1563                    m_assembler.add(dest, dest, armImm);
     1564                else if (valueDeltaSave < 0)
     1565                    m_assembler.sub(dest, dest, armImm);
     1566                return true;
     1567            }
     1568        }
     1569        return false;
     1570    }
     1571
    14861572    // Register move operations:
    14871573    //
     
    14931579
    14941580        ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(value);
     1581        intptr_t valueAsInt = reinterpret_cast<intptr_t>(reinterpret_cast<void *>(value));
    14951582
    14961583        if (armImm.isValid())
     
    14981585        else if ((armImm = ARMThumbImmediate::makeEncodedImm(~value)).isValid())
    14991586            m_assembler.mvn(dest, armImm);
    1500         else {
    1501             m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(value));
    1502             if (value & 0xffff0000)
    1503                 m_assembler.movt(dest, ARMThumbImmediate::makeUInt16(value >> 16));
    1504         }
     1587        else if (dest == addressTempRegister) {
     1588            if (!short_move(dest, cachedAddressTempRegister(), valueAsInt))
     1589                long_move(imm, dest);
     1590        } else if (dest == dataTempRegister) {
     1591            if (!short_move(dest, cachedDataTempRegister(), valueAsInt))
     1592                long_move(imm, dest);
     1593        } else {
     1594            long_move(imm, dest);
     1595        }
     1596
     1597        if (dest == addressTempRegister)
     1598            cachedAddressTempRegister().setValue(valueAsInt);
     1599        else if (dest == dataTempRegister)
     1600            cachedDataTempRegister().setValue(valueAsInt);
     1601
    15051602    }
    15061603
     
    15091606        if (src != dest)
    15101607            m_assembler.mov(dest, src);
     1608        if (dest == dataTempRegister)
     1609            cachedDataTempRegister().invalidate();
     1610        else if (dest == addressTempRegister)
     1611            cachedAddressTempRegister().invalidate();
    15111612    }
    15121613
     
    16101711            if (!(left & 8) && armImm.isUInt3() && (left != addressTempRegister)) {
    16111712                // This is common enough to warrant a special case to save 2 bytes
    1612                 m_assembler.add_S(addressTempRegister, left, armImm);
     1713                RegisterID scratch = getCachedAddressTempRegisterIDAndInvalidate();
     1714                m_assembler.add_S(scratch, left, armImm);
    16131715                return;
    16141716            }
     
    17801882    {
    17811883        // use addressTempRegister incase the branch8 we call uses dataTempRegister. :-/
     1884        RegisterID scratch = getCachedAddressTempRegisterIDAndInvalidate();
    17821885        TrustedImm32 right8 = MacroAssemblerHelpers::mask8OnCondition(*this, cond, right);
    1783         MacroAssemblerHelpers::load8OnCondition(*this, cond, left, addressTempRegister);
    1784         return branch8(cond, addressTempRegister, right8);
     1886        MacroAssemblerHelpers::load8OnCondition(*this, cond, left, scratch);
     1887        return branch8(cond, scratch, right8);
    17851888    }
    17861889
     
    17881891    {
    17891892        // use addressTempRegister incase the branch32 we call uses dataTempRegister. :-/
     1893        RegisterID scratch = getCachedAddressTempRegisterIDAndInvalidate();
    17901894        TrustedImm32 right8 = MacroAssemblerHelpers::mask8OnCondition(*this, cond, right);
    1791         MacroAssemblerHelpers::load8OnCondition(*this, cond, left, addressTempRegister);
    1792         return branch32(cond, addressTempRegister, right8);
     1895        MacroAssemblerHelpers::load8OnCondition(*this, cond, left, scratch);
     1896        return branch32(cond, scratch, right8);
    17931897    }
    17941898   
     
    18411945    {
    18421946        // use addressTempRegister incase the branchTest32 we call uses dataTempRegister. :-/
     1947        RegisterID scratch = getCachedAddressTempRegisterIDAndInvalidate();
    18431948        TrustedImm32 mask8 = MacroAssemblerHelpers::mask8OnCondition(*this, cond, mask);
    1844         MacroAssemblerHelpers::load8OnCondition(*this, cond, address, addressTempRegister);
    1845         return branchTest32(cond, addressTempRegister, mask8);
     1949        MacroAssemblerHelpers::load8OnCondition(*this, cond, address, scratch);
     1950        return branchTest32(cond, scratch, mask8);
    18461951    }
    18471952
     
    18491954    {
    18501955        // use addressTempRegister incase the branchTest32 we call uses dataTempRegister. :-/
     1956        RegisterID scratch = getCachedAddressTempRegisterIDAndInvalidate();
    18511957        TrustedImm32 mask8 = MacroAssemblerHelpers::mask8OnCondition(*this, cond, mask);
    1852         MacroAssemblerHelpers::load8OnCondition(*this, cond, address, addressTempRegister);
    1853         return branchTest32(cond, addressTempRegister, mask8);
     1958        MacroAssemblerHelpers::load8OnCondition(*this, cond, address, scratch);
     1959        return branchTest32(cond, scratch, mask8);
    18541960    }
    18551961
     
    18661972    {
    18671973        // use addressTempRegister incase the branchTest32 we call uses dataTempRegister. :-/
     1974        RegisterID scratch = getCachedAddressTempRegisterIDAndInvalidate();
    18681975        TrustedImm32 mask16 = MacroAssemblerHelpers::mask16OnCondition(*this, cond, mask);
    1869         MacroAssemblerHelpers::load16OnCondition(*this, cond, address, addressTempRegister);
    1870         return branchTest32(cond, addressTempRegister, mask16);
     1976        MacroAssemblerHelpers::load16OnCondition(*this, cond, address, scratch);
     1977        return branchTest32(cond, scratch, mask16);
    18711978    }
    18721979
     
    18741981    {
    18751982        // use addressTempRegister incase the branchTest32 we call uses dataTempRegister. :-/
     1983        RegisterID scratch = getCachedAddressTempRegisterIDAndInvalidate();
    18761984        TrustedImm32 mask16 = MacroAssemblerHelpers::mask16OnCondition(*this, cond, mask);
    1877         MacroAssemblerHelpers::load16OnCondition(*this, cond, address, addressTempRegister);
    1878         return branchTest32(cond, addressTempRegister, mask16);
     1985        MacroAssemblerHelpers::load16OnCondition(*this, cond, address, scratch);
     1986        return branchTest32(cond, scratch, mask16);
    18791987    }
    18801988
     
    18901998    void farJump(RegisterID target, PtrTag)
    18911999    {
     2000        cachedDataTempRegister().invalidate();
     2001        cachedAddressTempRegister().invalidate();
    18922002        m_assembler.bx(target);
    18932003    }
     
    18962006    {
    18972007        move(target, addressTempRegister);
     2008        cachedDataTempRegister().invalidate();
     2009        cachedAddressTempRegister().invalidate();
    18982010        m_assembler.bx(addressTempRegister);
    18992011    }
     
    19032015    {
    19042016        load32(address, addressTempRegister);
     2017        cachedDataTempRegister().invalidate(); // addressTempRegister already invalidated by the load
    19052018        m_assembler.bx(addressTempRegister);
    19062019    }
     
    19102023        move(TrustedImmPtr(address.m_ptr), addressTempRegister);
    19112024        load32(Address(addressTempRegister), addressTempRegister);
     2025        cachedDataTempRegister().invalidate();
    19122026        m_assembler.bx(addressTempRegister);
    19132027    }
     
    19782092    {
    19792093        m_assembler.smull(dest, dataTempRegister, src1, src2);
    1980 
     2094        // The invalidation of cachedDataTempRegister is handled by the branch.
    19812095        if (cond == Overflow) {
    1982             m_assembler.asr(addressTempRegister, dest, 31);
    1983             return branch32(NotEqual, addressTempRegister, dataTempRegister);
     2096            RegisterID scratch = getCachedAddressTempRegisterIDAndInvalidate();
     2097            m_assembler.asr(scratch, dest, 31);
     2098            return branch32(NotEqual, scratch, dataTempRegister);
    19842099        }
    19852100
     
    20642179    {
    20652180        moveFixedWidthEncoding(TrustedImm32(0), dataTempRegister);
     2181        invalidateAllTempRegisters();
    20662182        return Call(m_assembler.blx(dataTempRegister), Call::LinkableNear);
    20672183    }
     
    20702186    {
    20712187        moveFixedWidthEncoding(TrustedImm32(0), dataTempRegister);
     2188        invalidateAllTempRegisters();
    20722189        return Call(m_assembler.bx(dataTempRegister), Call::LinkableNearTail);
    20732190    }
     
    20762193    {
    20772194        moveFixedWidthEncoding(TrustedImm32(0), dataTempRegister);
     2195        invalidateAllTempRegisters();
    20782196        return Call(m_assembler.blx(dataTempRegister), Call::Linkable);
    20792197    }
     
    20812199    ALWAYS_INLINE Call call(RegisterID target, PtrTag)
    20822200    {
     2201        invalidateAllTempRegisters();
    20832202        return Call(m_assembler.blx(target), Call::None);
    20842203    }
     
    20872206    {
    20882207        load32(address, addressTempRegister);
     2208        cachedDataTempRegister().invalidate();
    20892209        return Call(m_assembler.blx(addressTempRegister), Call::None);
    20902210    }
     
    21162236    {
    21172237        TrustedImm32 right8 = MacroAssemblerHelpers::mask8OnCondition(*this, cond, right);
    2118         MacroAssemblerHelpers::load8OnCondition(*this, cond, left, addressTempRegister);
    2119         compare32(cond, addressTempRegister, right8, dest);
     2238        RegisterID scratch = getCachedAddressTempRegisterIDAndInvalidate();
     2239        MacroAssemblerHelpers::load8OnCondition(*this, cond, left, scratch);
     2240        compare32(cond, scratch, right8, dest);
    21202241    }
    21212242
     
    21442265    {
    21452266        TrustedImm32 mask8 = MacroAssemblerHelpers::mask8OnCondition(*this, cond, mask);
    2146         MacroAssemblerHelpers::load8OnCondition(*this, cond, address, addressTempRegister);
    2147         test32(addressTempRegister, mask8);
     2267        RegisterID scratch = getCachedAddressTempRegisterIDAndInvalidate();
     2268        MacroAssemblerHelpers::load8OnCondition(*this, cond, address, scratch);
     2269        test32(scratch, mask8);
    21482270        m_assembler.it(armV7Condition(cond), false);
    21492271        m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(1));
     
    23282450        m_assembler.label(); // Force nop-padding if we're in the middle of a watchpoint.
    23292451        moveFixedWidthEncoding(TrustedImm32(0), dataTempRegister);
     2452        cachedDataTempRegister().invalidate();
    23302453        return Jump(m_assembler.bx(dataTempRegister), m_makeJumpPatchable ? ARMv7Assembler::JumpNoConditionFixedSize : ARMv7Assembler::JumpNoCondition);
    23312454    }
     
    23362459        m_assembler.it(cond, true, true);
    23372460        moveFixedWidthEncoding(TrustedImm32(0), dataTempRegister);
     2461        cachedDataTempRegister().invalidate();
    23382462        return Jump(m_assembler.bx(dataTempRegister), m_makeJumpPatchable ? ARMv7Assembler::JumpConditionFixedSize : ARMv7Assembler::JumpCondition, cond);
    23392463    }
     
    23462470        if (address.offset) {
    23472471            ARMThumbImmediate imm = ARMThumbImmediate::makeUInt12OrEncodedImm(address.offset);
    2348             if (imm.isValid())
    2349                 m_assembler.add(addressTempRegister, address.base, imm);
    2350             else {
     2472            if (imm.isValid()) {
     2473                RegisterID scratch = getCachedAddressTempRegisterIDAndInvalidate();
     2474                m_assembler.add(scratch, address.base, imm);
     2475            } else {
    23512476                move(TrustedImm32(address.offset), addressTempRegister);
     2477                cachedAddressTempRegister().invalidate();
    23522478                m_assembler.add(addressTempRegister, addressTempRegister, address.base);
    23532479            }
     
    23802506        }
    23812507
     2508        cachedAddressTempRegister().invalidate();
    23822509        return addressTempRegister;
    23832510    }
     
    23862513    {
    23872514        uint32_t value = imm.m_value;
     2515        intptr_t valueAsInt = reinterpret_cast<intptr_t>(reinterpret_cast<void *>(value));
     2516        if (dst == dataTempRegister)
     2517            cachedDataTempRegister().setValue(valueAsInt);
     2518        else if (dst == addressTempRegister)
     2519            cachedAddressTempRegister().setValue(valueAsInt);
    23882520        m_assembler.movT3(dst, ARMThumbImmediate::makeUInt16(value & 0xffff));
    23892521        m_assembler.movt(dst, ARMThumbImmediate::makeUInt16(value >> 16));
     
    24052537    }
    24062538
     2539    ALWAYS_INLINE CachedTempRegister& cachedDataTempRegister()
     2540    {
     2541        return m_cachedDataTempRegister;
     2542    }
     2543
     2544    ALWAYS_INLINE CachedTempRegister& cachedAddressTempRegister()
     2545    {
     2546        RELEASE_ASSERT(m_allowScratchRegister);
     2547        return m_cachedAddressTempRegister;
     2548    }
     2549
     2550    ALWAYS_INLINE RegisterID getCachedDataTempRegisterIDAndInvalidate()
     2551    {
     2552        return cachedDataTempRegister().registerIDInvalidate();
     2553    }
     2554
     2555    ALWAYS_INLINE RegisterID getCachedAddressTempRegisterIDAndInvalidate()
     2556    {
     2557        return cachedAddressTempRegister().registerIDInvalidate();
     2558    }
    24072559private:
    24082560    friend class LinkBuffer;
     
    24182570
    24192571    bool m_makeJumpPatchable;
     2572    CachedTempRegister m_cachedDataTempRegister;
     2573    CachedTempRegister m_cachedAddressTempRegister;
    24202574};
    24212575
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