Changeset 39266 in webkit for trunk/JavaScriptCore/jit/JIT.cpp
- Timestamp:
- Dec 12, 2008, 7:18:10 PM (16 years ago)
- File:
-
- 1 edited
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trunk/JavaScriptCore/jit/JIT.cpp
r39265 r39266 134 134 } 135 135 136 #ifndef NDEBUG137 138 void JIT::printBytecodeOperandTypes(unsigned src1, unsigned src2)139 {140 char which1 = '*';141 if (m_codeBlock->isConstantRegisterIndex(src1)) {142 JSValue* value = m_codeBlock->getConstant(src1);143 which1 =144 JSImmediate::isImmediate(value) ?145 (JSImmediate::isNumber(value) ? 'i' :146 JSImmediate::isBoolean(value) ? 'b' :147 value->isUndefined() ? 'u' :148 value->isNull() ? 'n' : '?')149 :150 (value->isString() ? 's' :151 value->isObject() ? 'o' :152 'k');153 }154 char which2 = '*';155 if (m_codeBlock->isConstantRegisterIndex(src2)) {156 JSValue* value = m_codeBlock->getConstant(src2);157 which2 =158 JSImmediate::isImmediate(value) ?159 (JSImmediate::isNumber(value) ? 'i' :160 JSImmediate::isBoolean(value) ? 'b' :161 value->isUndefined() ? 'u' :162 value->isNull() ? 'n' : '?')163 :164 (value->isString() ? 's' :165 value->isObject() ? 'o' :166 'k');167 }168 if ((which1 != '*') | (which2 != '*'))169 fprintf(stderr, "Types %c %c\n", which1, which2);170 }171 172 #endif173 174 136 JIT::JIT(JSGlobalData* globalData, CodeBlock* codeBlock) 175 137 : m_interpreter(globalData->interpreter) … … 184 146 } 185 147 186 #define CTI_COMPILE_BINARY_OP(name) \ 187 case name: { \ 188 emitPutCTIArgFromVirtualRegister(instruction[i + 2].u.operand, 0, X86::ecx); \ 189 emitPutCTIArgFromVirtualRegister(instruction[i + 3].u.operand, 4, X86::ecx); \ 190 emitCTICall(i, Interpreter::cti_##name); \ 191 emitPutVirtualRegister(instruction[i + 1].u.operand); \ 192 i += 4; \ 193 break; \ 194 } 195 196 #define CTI_COMPILE_UNARY_OP(name) \ 197 case name: { \ 198 emitPutCTIArgFromVirtualRegister(instruction[i + 2].u.operand, 0, X86::ecx); \ 199 emitCTICall(i, Interpreter::cti_##name); \ 200 emitPutVirtualRegister(instruction[i + 1].u.operand); \ 201 i += 3; \ 202 break; \ 203 } 204 205 void JIT::compileOpStrictEq(Instruction* instruction, unsigned i, CompileOpStrictEqType type) 148 void JIT::compileOpStrictEq(Instruction* currentInstruction, CompileOpStrictEqType type) 206 149 { 207 150 bool negated = (type == OpNStrictEq); 208 151 209 unsigned dst = instruction[1].u.operand;210 unsigned src1 = instruction[2].u.operand;211 unsigned src2 = instruction[3].u.operand;212 213 emitGetVirtualRegisters(src1, X86::eax, src2, X86::edx , i);152 unsigned dst = currentInstruction[1].u.operand; 153 unsigned src1 = currentInstruction[2].u.operand; 154 unsigned src2 = currentInstruction[3].u.operand; 155 156 emitGetVirtualRegisters(src1, X86::eax, src2, X86::edx); 214 157 215 158 // Check that bot are immediates, if so check if they're equal … … 226 169 // otherwise these values are not equal. 227 170 firstNotImmediate.link(this); 228 emitJumpSlowCaseIfJSCell(X86::edx , i);229 m_slowCases.append(SlowCaseEntry(je32(X86::edx, Imm32(asInteger(JSImmediate::zeroImmediate()))), i));171 emitJumpSlowCaseIfJSCell(X86::edx); 172 addSlowCase(je32(X86::edx, Imm32(asInteger(JSImmediate::zeroImmediate())))); 230 173 Jump firstWasNotImmediate = jump(); 231 174 … … 233 176 // If eax is 0 jump to a slow case, otherwise these values are not equal. 234 177 secondNotImmediate.link(this); 235 m_slowCases.append(SlowCaseEntry(je32(X86::eax, Imm32(asInteger(JSImmediate::zeroImmediate()))), i));178 addSlowCase(je32(X86::eax, Imm32(asInteger(JSImmediate::zeroImmediate())))); 236 179 237 180 // We get here if the two values are different immediates, or one is 0 and the other is a JSCell. … … 245 188 } 246 189 247 void JIT::emitSlowScriptCheck( unsigned bytecodeIndex)190 void JIT::emitSlowScriptCheck() 248 191 { 249 192 Jump skipTimeout = jnzSub32(Imm32(1), X86::esi); 250 emitCTICall( bytecodeIndex,Interpreter::cti_timeout_check);193 emitCTICall(Interpreter::cti_timeout_check); 251 194 move(X86::eax, X86::esi); 252 195 skipTimeout.link(this); … … 255 198 } 256 199 200 201 #define NEXT_OPCODE(name) \ 202 m_bytecodeIndex += OPCODE_LENGTH(name); \ 203 break; 204 205 #define CTI_COMPILE_BINARY_OP(name) \ 206 case name: { \ 207 emitPutCTIArgFromVirtualRegister(currentInstruction[2].u.operand, 0, X86::ecx); \ 208 emitPutCTIArgFromVirtualRegister(currentInstruction[3].u.operand, 4, X86::ecx); \ 209 emitCTICall(Interpreter::cti_##name); \ 210 emitPutVirtualRegister(currentInstruction[1].u.operand); \ 211 NEXT_OPCODE(name); \ 212 } 213 214 #define CTI_COMPILE_UNARY_OP(name) \ 215 case name: { \ 216 emitPutCTIArgFromVirtualRegister(currentInstruction[2].u.operand, 0, X86::ecx); \ 217 emitCTICall(Interpreter::cti_##name); \ 218 emitPutVirtualRegister(currentInstruction[1].u.operand); \ 219 NEXT_OPCODE(name); \ 220 } 221 257 222 void JIT::privateCompileMainPass() 258 223 { 259 Instruction* instruction = m_codeBlock->instructions().begin();224 Instruction* instructionsBegin = m_codeBlock->instructions().begin(); 260 225 unsigned instructionCount = m_codeBlock->instructions().size(); 261 262 226 unsigned propertyAccessInstructionIndex = 0; 263 227 unsigned globalResolveInfoIndex = 0; 264 228 unsigned callLinkInfoIndex = 0; 265 229 266 for (unsigned i = 0; i < instructionCount; ) { 267 ASSERT_WITH_MESSAGE(m_interpreter->isOpcode(instruction[i].u.opcode), "privateCompileMainPass gone bad @ %d", i); 230 for (m_bytecodeIndex = 0; m_bytecodeIndex < instructionCount; ) { 231 Instruction* currentInstruction = instructionsBegin + m_bytecodeIndex; 232 ASSERT_WITH_MESSAGE(m_interpreter->isOpcode(currentInstruction->u.opcode), "privateCompileMainPass gone bad @ %d", m_bytecodeIndex); 268 233 269 234 #if ENABLE(OPCODE_SAMPLING) 270 if ( i> 0) // Avoid the overhead of sampling op_enter twice.271 store32(m_interpreter->sampler()->encodeSample( instruction + i), m_interpreter->sampler()->sampleSlot());235 if (m_bytecodeIndex > 0) // Avoid the overhead of sampling op_enter twice. 236 store32(m_interpreter->sampler()->encodeSample(currentInstruction), m_interpreter->sampler()->sampleSlot()); 272 237 #endif 273 238 274 m_labels[i] = __ label(); 275 OpcodeID opcodeID = m_interpreter->getOpcodeID(instruction[i].u.opcode); 239 m_labels[m_bytecodeIndex] = __ label(); 240 OpcodeID opcodeID = m_interpreter->getOpcodeID(currentInstruction->u.opcode); 241 276 242 switch (opcodeID) { 277 243 case op_mov: { 278 emitGetVirtualRegister(instruction[i + 2].u.operand, X86::eax, i); 279 emitPutVirtualRegister(instruction[i + 1].u.operand); 280 i += OPCODE_LENGTH(op_mov); 281 break; 244 emitGetVirtualRegister(currentInstruction[2].u.operand, X86::eax); 245 emitPutVirtualRegister(currentInstruction[1].u.operand); 246 NEXT_OPCODE(op_mov); 282 247 } 283 248 case op_add: { 284 unsigned dst = instruction[i +1].u.operand;285 unsigned src1 = instruction[i +2].u.operand;286 unsigned src2 = instruction[i +3].u.operand;249 unsigned dst = currentInstruction[1].u.operand; 250 unsigned src1 = currentInstruction[2].u.operand; 251 unsigned src2 = currentInstruction[3].u.operand; 287 252 288 253 if (JSValue* value = getConstantImmediateNumericArg(src1)) { 289 emitGetVirtualRegister(src2, X86::eax , i);290 emitJumpSlowCaseIfNotImmNum(X86::eax , i);291 m_slowCases.append(SlowCaseEntry(joAdd32(Imm32(getDeTaggedConstantImmediate(value)), X86::eax), i));254 emitGetVirtualRegister(src2, X86::eax); 255 emitJumpSlowCaseIfNotImmNum(X86::eax); 256 addSlowCase(joAdd32(Imm32(getDeTaggedConstantImmediate(value)), X86::eax)); 292 257 emitPutVirtualRegister(dst); 293 258 } else if (JSValue* value = getConstantImmediateNumericArg(src2)) { 294 emitGetVirtualRegister(src1, X86::eax , i);295 emitJumpSlowCaseIfNotImmNum(X86::eax , i);296 m_slowCases.append(SlowCaseEntry(joAdd32(Imm32(getDeTaggedConstantImmediate(value)), X86::eax), i));259 emitGetVirtualRegister(src1, X86::eax); 260 emitJumpSlowCaseIfNotImmNum(X86::eax); 261 addSlowCase(joAdd32(Imm32(getDeTaggedConstantImmediate(value)), X86::eax)); 297 262 emitPutVirtualRegister(dst); 298 263 } else { 299 OperandTypes types = OperandTypes::fromInt( instruction[i +4].u.operand);264 OperandTypes types = OperandTypes::fromInt(currentInstruction[4].u.operand); 300 265 if (types.first().mightBeNumber() && types.second().mightBeNumber()) 301 compileBinaryArithOp(op_add, instruction[i + 1].u.operand, instruction[i + 2].u.operand, instruction[i + 3].u.operand, OperandTypes::fromInt(instruction[i + 4].u.operand), i);266 compileBinaryArithOp(op_add, currentInstruction[1].u.operand, currentInstruction[2].u.operand, currentInstruction[3].u.operand, OperandTypes::fromInt(currentInstruction[4].u.operand)); 302 267 else { 303 emitPutCTIArgFromVirtualRegister( instruction[i +2].u.operand, 0, X86::ecx);304 emitPutCTIArgFromVirtualRegister( instruction[i +3].u.operand, 4, X86::ecx);305 emitCTICall( i,Interpreter::cti_op_add);306 emitPutVirtualRegister( instruction[i +1].u.operand);268 emitPutCTIArgFromVirtualRegister(currentInstruction[2].u.operand, 0, X86::ecx); 269 emitPutCTIArgFromVirtualRegister(currentInstruction[3].u.operand, 4, X86::ecx); 270 emitCTICall(Interpreter::cti_op_add); 271 emitPutVirtualRegister(currentInstruction[1].u.operand); 307 272 } 308 273 } 309 310 i += OPCODE_LENGTH(op_add); 311 break; 274 NEXT_OPCODE(op_add); 312 275 } 313 276 case op_end: { 314 277 if (m_codeBlock->needsFullScopeChain()) 315 emitCTICall( i,Interpreter::cti_op_end);316 emitGetVirtualRegister( instruction[i + 1].u.operand, X86::eax, i);278 emitCTICall(Interpreter::cti_op_end); 279 emitGetVirtualRegister(currentInstruction[1].u.operand, X86::eax); 317 280 __ pushl_m(RegisterFile::ReturnPC * static_cast<int>(sizeof(Register)), X86::edi); 318 281 __ ret(); 319 i += OPCODE_LENGTH(op_end); 320 break; 282 NEXT_OPCODE(op_end); 321 283 } 322 284 case op_jmp: { 323 unsigned target = instruction[i + 1].u.operand; 324 m_jmpTable.append(JmpTable(jump(), i + 1 + target)); 325 i += OPCODE_LENGTH(op_jmp); 326 break; 285 unsigned target = currentInstruction[1].u.operand; 286 addJump(jump(), target + 1); 287 NEXT_OPCODE(op_jmp); 327 288 } 328 289 case op_pre_inc: { 329 int srcDst = instruction[i +1].u.operand;330 emitGetVirtualRegister(srcDst, X86::eax , i);331 emitJumpSlowCaseIfNotImmNum(X86::eax , i);332 m_slowCases.append(SlowCaseEntry(joAdd32(Imm32(getDeTaggedConstantImmediate(JSImmediate::oneImmediate())), X86::eax), i));290 int srcDst = currentInstruction[1].u.operand; 291 emitGetVirtualRegister(srcDst, X86::eax); 292 emitJumpSlowCaseIfNotImmNum(X86::eax); 293 addSlowCase(joAdd32(Imm32(getDeTaggedConstantImmediate(JSImmediate::oneImmediate())), X86::eax)); 333 294 emitPutVirtualRegister(srcDst); 334 i += OPCODE_LENGTH(op_pre_inc); 335 break; 295 NEXT_OPCODE(op_pre_inc); 336 296 } 337 297 case op_loop: { 338 emitSlowScriptCheck(i); 339 340 unsigned target = instruction[i + 1].u.operand; 341 m_jmpTable.append(JmpTable(jump(), i + 1 + target)); 342 i += OPCODE_LENGTH(op_end); 343 break; 298 emitSlowScriptCheck(); 299 300 unsigned target = currentInstruction[1].u.operand; 301 addJump(jump(), target + 1); 302 NEXT_OPCODE(op_end); 344 303 } 345 304 case op_loop_if_less: { 346 emitSlowScriptCheck( i);347 348 unsigned target = instruction[i +3].u.operand;349 JSValue* src2imm = getConstantImmediateNumericArg( instruction[i +2].u.operand);305 emitSlowScriptCheck(); 306 307 unsigned target = currentInstruction[3].u.operand; 308 JSValue* src2imm = getConstantImmediateNumericArg(currentInstruction[2].u.operand); 350 309 if (src2imm) { 351 emitGetVirtualRegister( instruction[i + 1].u.operand, X86::eax, i);352 emitJumpSlowCaseIfNotImmNum(X86::eax , i);353 m_jmpTable.append(JmpTable(jl32(X86::eax, Imm32(asInteger(src2imm))), i + 3 + target));310 emitGetVirtualRegister(currentInstruction[1].u.operand, X86::eax); 311 emitJumpSlowCaseIfNotImmNum(X86::eax); 312 addJump(jl32(X86::eax, Imm32(asInteger(src2imm))), target + 3); 354 313 } else { 355 emitGetVirtualRegisters( instruction[i + 1].u.operand, X86::eax, instruction[i + 2].u.operand, X86::edx, i);356 emitJumpSlowCaseIfNotImmNum(X86::eax , i);357 emitJumpSlowCaseIfNotImmNum(X86::edx , i);358 m_jmpTable.append(JmpTable(jl32(X86::eax, X86::edx), i + 3 + target));314 emitGetVirtualRegisters(currentInstruction[1].u.operand, X86::eax, currentInstruction[2].u.operand, X86::edx); 315 emitJumpSlowCaseIfNotImmNum(X86::eax); 316 emitJumpSlowCaseIfNotImmNum(X86::edx); 317 addJump(jl32(X86::eax, X86::edx), target + 3); 359 318 } 360 i += OPCODE_LENGTH(op_loop_if_less); 361 break; 319 NEXT_OPCODE(op_loop_if_less); 362 320 } 363 321 case op_loop_if_lesseq: { 364 emitSlowScriptCheck( i);365 366 unsigned target = instruction[i +3].u.operand;367 JSValue* src2imm = getConstantImmediateNumericArg( instruction[i +2].u.operand);322 emitSlowScriptCheck(); 323 324 unsigned target = currentInstruction[3].u.operand; 325 JSValue* src2imm = getConstantImmediateNumericArg(currentInstruction[2].u.operand); 368 326 if (src2imm) { 369 emitGetVirtualRegister( instruction[i + 1].u.operand, X86::eax, i);370 emitJumpSlowCaseIfNotImmNum(X86::eax , i);371 m_jmpTable.append(JmpTable(jle32(X86::eax, Imm32(asInteger(src2imm))), i + 3 + target));327 emitGetVirtualRegister(currentInstruction[1].u.operand, X86::eax); 328 emitJumpSlowCaseIfNotImmNum(X86::eax); 329 addJump(jle32(X86::eax, Imm32(asInteger(src2imm))), target + 3); 372 330 } else { 373 emitGetVirtualRegisters( instruction[i + 1].u.operand, X86::eax, instruction[i + 2].u.operand, X86::edx, i);374 emitJumpSlowCaseIfNotImmNum(X86::eax , i);375 emitJumpSlowCaseIfNotImmNum(X86::edx , i);376 m_jmpTable.append(JmpTable(jle32(X86::eax, X86::edx), i + 3 + target));331 emitGetVirtualRegisters(currentInstruction[1].u.operand, X86::eax, currentInstruction[2].u.operand, X86::edx); 332 emitJumpSlowCaseIfNotImmNum(X86::eax); 333 emitJumpSlowCaseIfNotImmNum(X86::edx); 334 addJump(jle32(X86::eax, X86::edx), target + 3); 377 335 } 378 i += OPCODE_LENGTH(op_loop_if_lesseq); 379 break; 336 NEXT_OPCODE(op_loop_if_lesseq); 380 337 } 381 338 case op_new_object: { 382 emitCTICall(i, Interpreter::cti_op_new_object); 383 emitPutVirtualRegister(instruction[i + 1].u.operand); 384 i += OPCODE_LENGTH(op_new_object); 385 break; 339 emitCTICall(Interpreter::cti_op_new_object); 340 emitPutVirtualRegister(currentInstruction[1].u.operand); 341 NEXT_OPCODE(op_new_object); 386 342 } 387 343 case op_put_by_id: { 388 compilePutByIdHotPath(instruction[i + 1].u.operand, &(m_codeBlock->identifier(instruction[i + 2].u.operand)), instruction[i + 3].u.operand, i, propertyAccessInstructionIndex++); 389 i += OPCODE_LENGTH(op_put_by_id); 390 break; 344 compilePutByIdHotPath(currentInstruction[1].u.operand, &(m_codeBlock->identifier(currentInstruction[2].u.operand)), currentInstruction[3].u.operand, propertyAccessInstructionIndex++); 345 NEXT_OPCODE(op_put_by_id); 391 346 } 392 347 case op_get_by_id: { 393 compileGetByIdHotPath(instruction[i + 1].u.operand, instruction[i + 2].u.operand, &(m_codeBlock->identifier(instruction[i + 3].u.operand)), i, propertyAccessInstructionIndex++); 394 i += OPCODE_LENGTH(op_get_by_id); 395 break; 348 compileGetByIdHotPath(currentInstruction[1].u.operand, currentInstruction[2].u.operand, &(m_codeBlock->identifier(currentInstruction[3].u.operand)), propertyAccessInstructionIndex++); 349 NEXT_OPCODE(op_get_by_id); 396 350 } 397 351 case op_instanceof: { 398 emitGetVirtualRegister( instruction[i + 2].u.operand, X86::eax, i); // value399 emitGetVirtualRegister( instruction[i + 3].u.operand, X86::ecx, i); // baseVal400 emitGetVirtualRegister( instruction[i + 4].u.operand, X86::edx, i); // proto352 emitGetVirtualRegister(currentInstruction[2].u.operand, X86::eax); // value 353 emitGetVirtualRegister(currentInstruction[3].u.operand, X86::ecx); // baseVal 354 emitGetVirtualRegister(currentInstruction[4].u.operand, X86::edx); // proto 401 355 402 356 // check if any are immediates … … 404 358 or32(X86::ecx, X86::ebx); 405 359 or32(X86::edx, X86::ebx); 406 emitJumpSlowCaseIfNotJSCell(X86::ebx , i);360 emitJumpSlowCaseIfNotJSCell(X86::ebx); 407 361 408 362 // check that all are object type - this is a bit of a bithack to avoid excess branching; … … 415 369 sub32(Address(X86::eax, FIELD_OFFSET(Structure, m_typeInfo.m_type)), X86::ebx); 416 370 sub32(Address(X86::ecx, FIELD_OFFSET(Structure, m_typeInfo.m_type)), X86::ebx); 417 m_slowCases.append(SlowCaseEntry(jne32(Address(X86::edx, FIELD_OFFSET(Structure, m_typeInfo.m_type)), X86::ebx), i));371 addSlowCase(jne32(Address(X86::edx, FIELD_OFFSET(Structure, m_typeInfo.m_type)), X86::ebx)); 418 372 419 373 // check that baseVal's flags include ImplementsHasInstance but not OverridesHasInstance 420 374 load32(Address(X86::ecx, FIELD_OFFSET(Structure, m_typeInfo.m_flags)), X86::ecx); 421 375 and32(Imm32(ImplementsHasInstance | OverridesHasInstance), X86::ecx); 422 m_slowCases.append(SlowCaseEntry(jne32(X86::ecx, Imm32(ImplementsHasInstance)), i));423 424 emitGetVirtualRegister( instruction[i + 2].u.operand, X86::ecx, i); // reload value425 emitGetVirtualRegister( instruction[i + 4].u.operand, X86::edx, i); // reload proto376 addSlowCase(jne32(X86::ecx, Imm32(ImplementsHasInstance))); 377 378 emitGetVirtualRegister(currentInstruction[2].u.operand, X86::ecx); // reload value 379 emitGetVirtualRegister(currentInstruction[4].u.operand, X86::edx); // reload proto 426 380 427 381 // optimistically load true result … … 442 396 exit.link(this); 443 397 444 emitPutVirtualRegister(instruction[i + 1].u.operand); 445 446 i += OPCODE_LENGTH(op_instanceof); 447 break; 398 emitPutVirtualRegister(currentInstruction[1].u.operand); 399 400 NEXT_OPCODE(op_instanceof); 448 401 } 449 402 case op_del_by_id: { 450 emitPutCTIArgFromVirtualRegister( instruction[i +2].u.operand, 0, X86::ecx);451 Identifier* ident = &(m_codeBlock->identifier( instruction[i +3].u.operand));403 emitPutCTIArgFromVirtualRegister(currentInstruction[2].u.operand, 0, X86::ecx); 404 Identifier* ident = &(m_codeBlock->identifier(currentInstruction[3].u.operand)); 452 405 emitPutCTIArgConstant(reinterpret_cast<unsigned>(ident), 4); 453 emitCTICall(i, Interpreter::cti_op_del_by_id); 454 emitPutVirtualRegister(instruction[i + 1].u.operand); 455 i += OPCODE_LENGTH(op_del_by_id); 456 break; 406 emitCTICall(Interpreter::cti_op_del_by_id); 407 emitPutVirtualRegister(currentInstruction[1].u.operand); 408 NEXT_OPCODE(op_del_by_id); 457 409 } 458 410 case op_mul: { 459 unsigned dst = instruction[i +1].u.operand;460 unsigned src1 = instruction[i +2].u.operand;461 unsigned src2 = instruction[i +3].u.operand;411 unsigned dst = currentInstruction[1].u.operand; 412 unsigned src1 = currentInstruction[2].u.operand; 413 unsigned src2 = currentInstruction[3].u.operand; 462 414 463 415 // For now, only plant a fast int case if the constant operand is greater than zero. … … 466 418 int32_t value; 467 419 if (src1Value && ((value = JSImmediate::intValue(src1Value)) > 0)) { 468 emitGetVirtualRegister(src2, X86::eax , i);469 emitJumpSlowCaseIfNotImmNum(X86::eax , i);420 emitGetVirtualRegister(src2, X86::eax); 421 emitJumpSlowCaseIfNotImmNum(X86::eax); 470 422 emitFastArithDeTagImmediate(X86::eax); 471 m_slowCases.append(SlowCaseEntry(joMul32(Imm32(value), X86::eax, X86::eax), i));423 addSlowCase(joMul32(Imm32(value), X86::eax, X86::eax)); 472 424 emitFastArithReTagImmediate(X86::eax); 473 425 emitPutVirtualRegister(dst); 474 426 } else if (src2Value && ((value = JSImmediate::intValue(src2Value)) > 0)) { 475 emitGetVirtualRegister(src1, X86::eax , i);476 emitJumpSlowCaseIfNotImmNum(X86::eax , i);427 emitGetVirtualRegister(src1, X86::eax); 428 emitJumpSlowCaseIfNotImmNum(X86::eax); 477 429 emitFastArithDeTagImmediate(X86::eax); 478 m_slowCases.append(SlowCaseEntry(joMul32(Imm32(value), X86::eax, X86::eax), i));430 addSlowCase(joMul32(Imm32(value), X86::eax, X86::eax)); 479 431 emitFastArithReTagImmediate(X86::eax); 480 432 emitPutVirtualRegister(dst); 481 433 } else 482 compileBinaryArithOp(op_mul, instruction[i + 1].u.operand, instruction[i + 2].u.operand, instruction[i + 3].u.operand, OperandTypes::fromInt(instruction[i + 4].u.operand), i); 483 484 i += OPCODE_LENGTH(op_mul); 485 break; 434 compileBinaryArithOp(op_mul, currentInstruction[1].u.operand, currentInstruction[2].u.operand, currentInstruction[3].u.operand, OperandTypes::fromInt(currentInstruction[4].u.operand)); 435 436 NEXT_OPCODE(op_mul); 486 437 } 487 438 case op_new_func: { 488 FuncDeclNode* func = m_codeBlock->function( instruction[i +2].u.operand);439 FuncDeclNode* func = m_codeBlock->function(currentInstruction[2].u.operand); 489 440 emitPutCTIArgConstant(reinterpret_cast<unsigned>(func), 0); 490 emitCTICall(i, Interpreter::cti_op_new_func); 491 emitPutVirtualRegister(instruction[i + 1].u.operand); 492 i += OPCODE_LENGTH(op_new_func); 493 break; 494 } 495 case op_call: 496 case op_call_eval: 441 emitCTICall(Interpreter::cti_op_new_func); 442 emitPutVirtualRegister(currentInstruction[1].u.operand); 443 NEXT_OPCODE(op_new_func); 444 } 445 case op_call: { 446 compileOpCall(opcodeID, currentInstruction, callLinkInfoIndex++); 447 NEXT_OPCODE(op_call); 448 } 449 case op_call_eval: { 450 compileOpCall(opcodeID, currentInstruction, callLinkInfoIndex++); 451 NEXT_OPCODE(op_call_eval); 452 } 497 453 case op_construct: { 498 compileOpCall(opcodeID, instruction + i, i, callLinkInfoIndex++); 499 i += (opcodeID == op_construct ? OPCODE_LENGTH(op_construct) : OPCODE_LENGTH(op_call)); 500 break; 454 compileOpCall(opcodeID, currentInstruction, callLinkInfoIndex++); 455 NEXT_OPCODE(op_construct); 501 456 } 502 457 case op_get_global_var: { 503 JSVariableObject* globalObject = static_cast<JSVariableObject*>( instruction[i +2].u.jsCell);458 JSVariableObject* globalObject = static_cast<JSVariableObject*>(currentInstruction[2].u.jsCell); 504 459 move(ImmPtr(globalObject), X86::eax); 505 emitGetVariableObjectRegister(X86::eax, instruction[i + 3].u.operand, X86::eax); 506 emitPutVirtualRegister(instruction[i + 1].u.operand); 507 i += OPCODE_LENGTH(op_get_global_var); 508 break; 460 emitGetVariableObjectRegister(X86::eax, currentInstruction[3].u.operand, X86::eax); 461 emitPutVirtualRegister(currentInstruction[1].u.operand); 462 NEXT_OPCODE(op_get_global_var); 509 463 } 510 464 case op_put_global_var: { 511 emitGetVirtualRegister( instruction[i + 3].u.operand, X86::edx, i);512 JSVariableObject* globalObject = static_cast<JSVariableObject*>( instruction[i +1].u.jsCell);465 emitGetVirtualRegister(currentInstruction[3].u.operand, X86::edx); 466 JSVariableObject* globalObject = static_cast<JSVariableObject*>(currentInstruction[1].u.jsCell); 513 467 move(ImmPtr(globalObject), X86::eax); 514 emitPutVariableObjectRegister(X86::edx, X86::eax, instruction[i + 2].u.operand); 515 i += OPCODE_LENGTH(op_put_global_var); 516 break; 468 emitPutVariableObjectRegister(X86::edx, X86::eax, currentInstruction[2].u.operand); 469 NEXT_OPCODE(op_put_global_var); 517 470 } 518 471 case op_get_scoped_var: { 519 int skip = instruction[i +3].u.operand + m_codeBlock->needsFullScopeChain();472 int skip = currentInstruction[3].u.operand + m_codeBlock->needsFullScopeChain(); 520 473 521 474 emitGetFromCallFrameHeader(RegisterFile::ScopeChain, X86::eax); … … 524 477 525 478 loadPtr(Address(X86::eax, FIELD_OFFSET(ScopeChainNode, object)), X86::eax); 526 emitGetVariableObjectRegister(X86::eax, instruction[i + 2].u.operand, X86::eax); 527 emitPutVirtualRegister(instruction[i + 1].u.operand); 528 i += OPCODE_LENGTH(op_get_scoped_var); 529 break; 479 emitGetVariableObjectRegister(X86::eax, currentInstruction[2].u.operand, X86::eax); 480 emitPutVirtualRegister(currentInstruction[1].u.operand); 481 NEXT_OPCODE(op_get_scoped_var); 530 482 } 531 483 case op_put_scoped_var: { 532 int skip = instruction[i +2].u.operand + m_codeBlock->needsFullScopeChain();484 int skip = currentInstruction[2].u.operand + m_codeBlock->needsFullScopeChain(); 533 485 534 486 emitGetFromCallFrameHeader(RegisterFile::ScopeChain, X86::edx); 535 emitGetVirtualRegister( instruction[i + 3].u.operand, X86::eax, i);487 emitGetVirtualRegister(currentInstruction[3].u.operand, X86::eax); 536 488 while (skip--) 537 489 loadPtr(Address(X86::edx, FIELD_OFFSET(ScopeChainNode, next)), X86::edx); 538 490 539 491 loadPtr(Address(X86::edx, FIELD_OFFSET(ScopeChainNode, object)), X86::edx); 540 emitPutVariableObjectRegister(X86::eax, X86::edx, instruction[i + 1].u.operand); 541 i += OPCODE_LENGTH(op_put_scoped_var); 542 break; 492 emitPutVariableObjectRegister(X86::eax, X86::edx, currentInstruction[1].u.operand); 493 NEXT_OPCODE(op_put_scoped_var); 543 494 } 544 495 case op_tear_off_activation: { 545 emitPutCTIArgFromVirtualRegister(instruction[i + 1].u.operand, 0, X86::ecx); 546 emitCTICall(i, Interpreter::cti_op_tear_off_activation); 547 i += OPCODE_LENGTH(op_tear_off_activation); 548 break; 496 emitPutCTIArgFromVirtualRegister(currentInstruction[1].u.operand, 0, X86::ecx); 497 emitCTICall(Interpreter::cti_op_tear_off_activation); 498 NEXT_OPCODE(op_tear_off_activation); 549 499 } 550 500 case op_tear_off_arguments: { 551 emitCTICall(i, Interpreter::cti_op_tear_off_arguments); 552 i += OPCODE_LENGTH(op_tear_off_arguments); 553 break; 501 emitCTICall(Interpreter::cti_op_tear_off_arguments); 502 NEXT_OPCODE(op_tear_off_arguments); 554 503 } 555 504 case op_ret: { 556 505 // We could JIT generate the deref, only calling out to C when the refcount hits zero. 557 506 if (m_codeBlock->needsFullScopeChain()) 558 emitCTICall( i,Interpreter::cti_op_ret_scopeChain);507 emitCTICall(Interpreter::cti_op_ret_scopeChain); 559 508 560 509 // Return the result in %eax. 561 emitGetVirtualRegister( instruction[i + 1].u.operand, X86::eax, i);510 emitGetVirtualRegister(currentInstruction[1].u.operand, X86::eax); 562 511 563 512 // Grab the return address. … … 571 520 __ ret(); 572 521 573 i += OPCODE_LENGTH(op_ret); 574 break; 522 NEXT_OPCODE(op_ret); 575 523 } 576 524 case op_new_array: { 577 emitPutCTIArgConstant(instruction[i + 2].u.operand, 0); 578 emitPutCTIArgConstant(instruction[i + 3].u.operand, 4); 579 emitCTICall(i, Interpreter::cti_op_new_array); 580 emitPutVirtualRegister(instruction[i + 1].u.operand); 581 i += OPCODE_LENGTH(op_new_array); 582 break; 525 emitPutCTIArgConstant(currentInstruction[2].u.operand, 0); 526 emitPutCTIArgConstant(currentInstruction[3].u.operand, 4); 527 emitCTICall(Interpreter::cti_op_new_array); 528 emitPutVirtualRegister(currentInstruction[1].u.operand); 529 NEXT_OPCODE(op_new_array); 583 530 } 584 531 case op_resolve: { 585 Identifier* ident = &(m_codeBlock->identifier( instruction[i +2].u.operand));532 Identifier* ident = &(m_codeBlock->identifier(currentInstruction[2].u.operand)); 586 533 emitPutCTIArgConstant(reinterpret_cast<unsigned>(ident), 0); 587 emitCTICall(i, Interpreter::cti_op_resolve); 588 emitPutVirtualRegister(instruction[i + 1].u.operand); 589 i += OPCODE_LENGTH(op_resolve); 590 break; 534 emitCTICall(Interpreter::cti_op_resolve); 535 emitPutVirtualRegister(currentInstruction[1].u.operand); 536 NEXT_OPCODE(op_resolve); 591 537 } 592 538 case op_construct_verify: { 593 emitGetVirtualRegister( instruction[i + 1].u.operand, X86::eax, i);594 595 emitJumpSlowCaseIfNotJSCell(X86::eax , i);539 emitGetVirtualRegister(currentInstruction[1].u.operand, X86::eax); 540 541 emitJumpSlowCaseIfNotJSCell(X86::eax); 596 542 loadPtr(Address(X86::eax, FIELD_OFFSET(JSCell, m_structure)), X86::ecx); 597 m_slowCases.append(SlowCaseEntry(jne32(Address(X86::ecx, FIELD_OFFSET(Structure, m_typeInfo) + FIELD_OFFSET(TypeInfo, m_type)), Imm32(ObjectType)), i)); 598 599 i += OPCODE_LENGTH(op_construct_verify); 600 break; 543 addSlowCase(jne32(Address(X86::ecx, FIELD_OFFSET(Structure, m_typeInfo) + FIELD_OFFSET(TypeInfo, m_type)), Imm32(ObjectType))); 544 545 NEXT_OPCODE(op_construct_verify); 601 546 } 602 547 case op_get_by_val: { 603 emitGetVirtualRegisters( instruction[i + 2].u.operand, X86::eax, instruction[i + 3].u.operand, X86::edx, i);604 emitJumpSlowCaseIfNotImmNum(X86::edx , i);548 emitGetVirtualRegisters(currentInstruction[2].u.operand, X86::eax, currentInstruction[3].u.operand, X86::edx); 549 emitJumpSlowCaseIfNotImmNum(X86::edx); 605 550 emitFastArithImmToInt(X86::edx); 606 emitJumpSlowCaseIfNotJSCell(X86::eax , i);607 m_slowCases.append(SlowCaseEntry(jnePtr(Address(X86::eax), ImmPtr(m_interpreter->m_jsArrayVptr)), i));551 emitJumpSlowCaseIfNotJSCell(X86::eax); 552 addSlowCase(jnePtr(Address(X86::eax), ImmPtr(m_interpreter->m_jsArrayVptr))); 608 553 609 554 // This is an array; get the m_storage pointer into ecx, then check if the index is below the fast cutoff 610 555 loadPtr(Address(X86::eax, FIELD_OFFSET(JSArray, m_storage)), X86::ecx); 611 m_slowCases.append(SlowCaseEntry(jae32(X86::edx, Address(X86::eax, FIELD_OFFSET(JSArray, m_fastAccessCutoff))), i));556 addSlowCase(jae32(X86::edx, Address(X86::eax, FIELD_OFFSET(JSArray, m_fastAccessCutoff)))); 612 557 613 558 // Get the value from the vector 614 559 loadPtr(BaseIndex(X86::ecx, X86::edx, ScalePtr, FIELD_OFFSET(ArrayStorage, m_vector[0])), X86::eax); 615 emitPutVirtualRegister(instruction[i + 1].u.operand); 616 i += OPCODE_LENGTH(op_get_by_val); 617 break; 560 emitPutVirtualRegister(currentInstruction[1].u.operand); 561 NEXT_OPCODE(op_get_by_val); 618 562 } 619 563 case op_resolve_func: { 620 Identifier* ident = &(m_codeBlock->identifier( instruction[i +3].u.operand));564 Identifier* ident = &(m_codeBlock->identifier(currentInstruction[3].u.operand)); 621 565 emitPutCTIArgConstant(reinterpret_cast<unsigned>(ident), 0); 622 emitCTICall(i, Interpreter::cti_op_resolve_func); 623 emitPutVirtualRegister(instruction[i + 2].u.operand, X86::edx); 624 emitPutVirtualRegister(instruction[i + 1].u.operand); 625 i += OPCODE_LENGTH(op_resolve_func); 626 break; 566 emitCTICall(Interpreter::cti_op_resolve_func); 567 emitPutVirtualRegister(currentInstruction[2].u.operand, X86::edx); 568 emitPutVirtualRegister(currentInstruction[1].u.operand); 569 NEXT_OPCODE(op_resolve_func); 627 570 } 628 571 case op_sub: { 629 compileBinaryArithOp(op_sub, instruction[i + 1].u.operand, instruction[i + 2].u.operand, instruction[i + 3].u.operand, OperandTypes::fromInt(instruction[i + 4].u.operand), i); 630 i += OPCODE_LENGTH(op_sub); 631 break; 572 compileBinaryArithOp(op_sub, currentInstruction[1].u.operand, currentInstruction[2].u.operand, currentInstruction[3].u.operand, OperandTypes::fromInt(currentInstruction[4].u.operand)); 573 NEXT_OPCODE(op_sub); 632 574 } 633 575 case op_put_by_val: { 634 emitGetVirtualRegisters( instruction[i + 1].u.operand, X86::eax, instruction[i + 2].u.operand, X86::edx, i);635 emitJumpSlowCaseIfNotImmNum(X86::edx , i);576 emitGetVirtualRegisters(currentInstruction[1].u.operand, X86::eax, currentInstruction[2].u.operand, X86::edx); 577 emitJumpSlowCaseIfNotImmNum(X86::edx); 636 578 emitFastArithImmToInt(X86::edx); 637 emitJumpSlowCaseIfNotJSCell(X86::eax , i);638 m_slowCases.append(SlowCaseEntry(jnePtr(Address(X86::eax), ImmPtr(m_interpreter->m_jsArrayVptr)), i));579 emitJumpSlowCaseIfNotJSCell(X86::eax); 580 addSlowCase(jnePtr(Address(X86::eax), ImmPtr(m_interpreter->m_jsArrayVptr))); 639 581 640 582 // This is an array; get the m_storage pointer into ecx, then check if the index is below the fast cutoff … … 642 584 Jump inFastVector = jb32(X86::edx, Address(X86::eax, FIELD_OFFSET(JSArray, m_fastAccessCutoff))); 643 585 // No; oh well, check if the access if within the vector - if so, we may still be okay. 644 m_slowCases.append(SlowCaseEntry(jae32(X86::edx, Address(X86::ecx, FIELD_OFFSET(ArrayStorage, m_vectorLength))), i));586 addSlowCase(jae32(X86::edx, Address(X86::ecx, FIELD_OFFSET(ArrayStorage, m_vectorLength)))); 645 587 646 588 // This is a write to the slow part of the vector; first, we have to check if this would be the first write to this location. 647 589 // FIXME: should be able to handle initial write to array; increment the the number of items in the array, and potentially update fast access cutoff. 648 m_slowCases.append(SlowCaseEntry(jzPtr(BaseIndex(X86::ecx, X86::edx, ScalePtr, FIELD_OFFSET(ArrayStorage, m_vector[0]))), i));590 addSlowCase(jzPtr(BaseIndex(X86::ecx, X86::edx, ScalePtr, FIELD_OFFSET(ArrayStorage, m_vector[0])))); 649 591 650 592 // All good - put the value into the array. 651 593 inFastVector.link(this); 652 emitGetVirtualRegister( instruction[i + 3].u.operand, X86::eax, i);594 emitGetVirtualRegister(currentInstruction[3].u.operand, X86::eax); 653 595 storePtr(X86::eax, BaseIndex(X86::ecx, X86::edx, ScalePtr, FIELD_OFFSET(ArrayStorage, m_vector[0]))); 654 i += OPCODE_LENGTH(op_put_by_val); 655 break; 596 NEXT_OPCODE(op_put_by_val); 656 597 } 657 598 CTI_COMPILE_BINARY_OP(op_lesseq) 658 599 case op_loop_if_true: { 659 emitSlowScriptCheck( i);660 661 unsigned target = instruction[i +2].u.operand;662 emitGetVirtualRegister( instruction[i + 1].u.operand, X86::eax, i);600 emitSlowScriptCheck(); 601 602 unsigned target = currentInstruction[2].u.operand; 603 emitGetVirtualRegister(currentInstruction[1].u.operand, X86::eax); 663 604 664 605 Jump isZero = je32(X86::eax, Imm32(asInteger(JSImmediate::zeroImmediate()))); 665 m_jmpTable.append(JmpTable(jnz32(X86::eax, Imm32(JSImmediate::TagBitTypeInteger)), i + 2 + target));666 667 m_jmpTable.append(JmpTable(je32(X86::eax, Imm32(asInteger(JSImmediate::trueImmediate()))), i + 2 + target));668 m_slowCases.append(SlowCaseEntry(jne32(X86::eax, Imm32(asInteger(JSImmediate::falseImmediate()))), i));606 addJump(jnz32(X86::eax, Imm32(JSImmediate::TagBitTypeInteger)), target + 2); 607 608 addJump(je32(X86::eax, Imm32(asInteger(JSImmediate::trueImmediate()))), target + 2); 609 addSlowCase(jne32(X86::eax, Imm32(asInteger(JSImmediate::falseImmediate())))); 669 610 670 611 isZero.link(this); 671 i += OPCODE_LENGTH(op_loop_if_true); 672 break; 612 NEXT_OPCODE(op_loop_if_true); 673 613 }; 674 614 case op_resolve_base: { 675 Identifier* ident = &(m_codeBlock->identifier( instruction[i +2].u.operand));615 Identifier* ident = &(m_codeBlock->identifier(currentInstruction[2].u.operand)); 676 616 emitPutCTIArgConstant(reinterpret_cast<unsigned>(ident), 0); 677 emitCTICall(i, Interpreter::cti_op_resolve_base); 678 emitPutVirtualRegister(instruction[i + 1].u.operand); 679 i += OPCODE_LENGTH(op_resolve_base); 680 break; 617 emitCTICall(Interpreter::cti_op_resolve_base); 618 emitPutVirtualRegister(currentInstruction[1].u.operand); 619 NEXT_OPCODE(op_resolve_base); 681 620 } 682 621 case op_negate: { 683 emitPutCTIArgFromVirtualRegister(instruction[i + 2].u.operand, 0, X86::ecx); 684 emitCTICall(i, Interpreter::cti_op_negate); 685 emitPutVirtualRegister(instruction[i + 1].u.operand); 686 i += OPCODE_LENGTH(op_negate); 687 break; 622 emitPutCTIArgFromVirtualRegister(currentInstruction[2].u.operand, 0, X86::ecx); 623 emitCTICall(Interpreter::cti_op_negate); 624 emitPutVirtualRegister(currentInstruction[1].u.operand); 625 NEXT_OPCODE(op_negate); 688 626 } 689 627 case op_resolve_skip: { 690 Identifier* ident = &(m_codeBlock->identifier( instruction[i +2].u.operand));628 Identifier* ident = &(m_codeBlock->identifier(currentInstruction[2].u.operand)); 691 629 emitPutCTIArgConstant(reinterpret_cast<unsigned>(ident), 0); 692 emitPutCTIArgConstant(instruction[i + 3].u.operand + m_codeBlock->needsFullScopeChain(), 4); 693 emitCTICall(i, Interpreter::cti_op_resolve_skip); 694 emitPutVirtualRegister(instruction[i + 1].u.operand); 695 i += OPCODE_LENGTH(op_resolve_skip); 696 break; 630 emitPutCTIArgConstant(currentInstruction[3].u.operand + m_codeBlock->needsFullScopeChain(), 4); 631 emitCTICall(Interpreter::cti_op_resolve_skip); 632 emitPutVirtualRegister(currentInstruction[1].u.operand); 633 NEXT_OPCODE(op_resolve_skip); 697 634 } 698 635 case op_resolve_global: { 699 636 // Fast case 700 void* globalObject = instruction[i +2].u.jsCell;701 Identifier* ident = &(m_codeBlock->identifier( instruction[i +3].u.operand));637 void* globalObject = currentInstruction[2].u.jsCell; 638 Identifier* ident = &(m_codeBlock->identifier(currentInstruction[3].u.operand)); 702 639 703 640 unsigned currentIndex = globalResolveInfoIndex++; … … 714 651 load32(offsetAddr, X86::edx); 715 652 loadPtr(BaseIndex(X86::eax, X86::edx, ScalePtr), X86::eax); 716 emitPutVirtualRegister( instruction[i +1].u.operand);653 emitPutVirtualRegister(currentInstruction[1].u.operand); 717 654 Jump end = jump(); 718 655 … … 722 659 emitPutCTIArgConstant(reinterpret_cast<unsigned>(ident), 4); 723 660 emitPutCTIArgConstant(currentIndex, 8); 724 emitCTICall( i,Interpreter::cti_op_resolve_global);725 emitPutVirtualRegister( instruction[i +1].u.operand);661 emitCTICall(Interpreter::cti_op_resolve_global); 662 emitPutVirtualRegister(currentInstruction[1].u.operand); 726 663 end.link(this); 727 i += OPCODE_LENGTH(op_resolve_global); 728 break; 664 NEXT_OPCODE(op_resolve_global); 729 665 } 730 666 CTI_COMPILE_BINARY_OP(op_div) 731 667 case op_pre_dec: { 732 int srcDst = instruction[i +1].u.operand;733 emitGetVirtualRegister(srcDst, X86::eax , i);734 emitJumpSlowCaseIfNotImmNum(X86::eax , i);735 m_slowCases.append(SlowCaseEntry(joSub32(Imm32(getDeTaggedConstantImmediate(JSImmediate::oneImmediate())), X86::eax), i));668 int srcDst = currentInstruction[1].u.operand; 669 emitGetVirtualRegister(srcDst, X86::eax); 670 emitJumpSlowCaseIfNotImmNum(X86::eax); 671 addSlowCase(joSub32(Imm32(getDeTaggedConstantImmediate(JSImmediate::oneImmediate())), X86::eax)); 736 672 emitPutVirtualRegister(srcDst); 737 i += OPCODE_LENGTH(op_pre_dec); 738 break; 673 NEXT_OPCODE(op_pre_dec); 739 674 } 740 675 case op_jnless: { 741 unsigned target = instruction[i +3].u.operand;742 JSValue* src2imm = getConstantImmediateNumericArg( instruction[i +2].u.operand);676 unsigned target = currentInstruction[3].u.operand; 677 JSValue* src2imm = getConstantImmediateNumericArg(currentInstruction[2].u.operand); 743 678 if (src2imm) { 744 emitGetVirtualRegister( instruction[i + 1].u.operand, X86::edx, i);745 emitJumpSlowCaseIfNotImmNum(X86::edx , i);746 m_jmpTable.append(JmpTable(jge32(X86::edx, Imm32(asInteger(src2imm))), i + 3 + target));679 emitGetVirtualRegister(currentInstruction[1].u.operand, X86::edx); 680 emitJumpSlowCaseIfNotImmNum(X86::edx); 681 addJump(jge32(X86::edx, Imm32(asInteger(src2imm))), target + 3); 747 682 } else { 748 emitGetVirtualRegisters( instruction[i + 1].u.operand, X86::eax, instruction[i + 2].u.operand, X86::edx, i);749 emitJumpSlowCaseIfNotImmNum(X86::eax , i);750 emitJumpSlowCaseIfNotImmNum(X86::edx , i);751 m_jmpTable.append(JmpTable(jge32(X86::eax, X86::edx), i + 3 + target));683 emitGetVirtualRegisters(currentInstruction[1].u.operand, X86::eax, currentInstruction[2].u.operand, X86::edx); 684 emitJumpSlowCaseIfNotImmNum(X86::eax); 685 emitJumpSlowCaseIfNotImmNum(X86::edx); 686 addJump(jge32(X86::eax, X86::edx), target + 3); 752 687 } 753 i += OPCODE_LENGTH(op_jnless); 754 break; 688 NEXT_OPCODE(op_jnless); 755 689 } 756 690 case op_not: { 757 emitGetVirtualRegister( instruction[i + 2].u.operand, X86::eax, i);691 emitGetVirtualRegister(currentInstruction[2].u.operand, X86::eax); 758 692 xor32(Imm32(JSImmediate::FullTagTypeBool), X86::eax); 759 m_slowCases.append(SlowCaseEntry(jnz32(X86::eax, Imm32(JSImmediate::FullTagTypeMask)), i));693 addSlowCase(jnz32(X86::eax, Imm32(JSImmediate::FullTagTypeMask))); 760 694 xor32(Imm32(JSImmediate::FullTagTypeBool | JSImmediate::ExtendedPayloadBitBoolValue), X86::eax); 761 emitPutVirtualRegister(instruction[i + 1].u.operand); 762 i += OPCODE_LENGTH(op_not); 763 break; 695 emitPutVirtualRegister(currentInstruction[1].u.operand); 696 NEXT_OPCODE(op_not); 764 697 } 765 698 case op_jfalse: { 766 unsigned target = instruction[i +2].u.operand;767 emitGetVirtualRegister( instruction[i + 1].u.operand, X86::eax, i);768 769 m_jmpTable.append(JmpTable(je32(X86::eax, Imm32(asInteger(JSImmediate::zeroImmediate()))), i + 2 + target));699 unsigned target = currentInstruction[2].u.operand; 700 emitGetVirtualRegister(currentInstruction[1].u.operand, X86::eax); 701 702 addJump(je32(X86::eax, Imm32(asInteger(JSImmediate::zeroImmediate()))), target + 2); 770 703 Jump isNonZero = jnz32(X86::eax, Imm32(JSImmediate::TagBitTypeInteger)); 771 704 772 m_jmpTable.append(JmpTable(je32(X86::eax, Imm32(asInteger(JSImmediate::falseImmediate()))), i + 2 + target));773 m_slowCases.append(SlowCaseEntry(jne32(X86::eax, Imm32(asInteger(JSImmediate::trueImmediate()))), i));705 addJump(je32(X86::eax, Imm32(asInteger(JSImmediate::falseImmediate()))), target + 2); 706 addSlowCase(jne32(X86::eax, Imm32(asInteger(JSImmediate::trueImmediate())))); 774 707 775 708 isNonZero.link(this); 776 i += OPCODE_LENGTH(op_jfalse); 777 break; 709 NEXT_OPCODE(op_jfalse); 778 710 }; 779 711 case op_jeq_null: { 780 unsigned src = instruction[i +1].u.operand;781 unsigned target = instruction[i +2].u.operand;782 783 emitGetVirtualRegister(src, X86::eax , i);712 unsigned src = currentInstruction[1].u.operand; 713 unsigned target = currentInstruction[2].u.operand; 714 715 emitGetVirtualRegister(src, X86::eax); 784 716 Jump isImmediate = emitJumpIfNotJSCell(X86::eax); 785 717 786 718 // First, handle JSCell cases - check MasqueradesAsUndefined bit on the structure. 787 719 loadPtr(Address(X86::eax, FIELD_OFFSET(JSCell, m_structure)), X86::ecx); 788 m_jmpTable.append(JmpTable(jnz32(Address(X86::ecx, FIELD_OFFSET(Structure, m_typeInfo.m_flags)), Imm32(MasqueradesAsUndefined)), i + 2 + target));720 addJump(jnz32(Address(X86::ecx, FIELD_OFFSET(Structure, m_typeInfo.m_flags)), Imm32(MasqueradesAsUndefined)), target + 2); 789 721 Jump wasNotImmediate = jump(); 790 722 … … 792 724 isImmediate.link(this); 793 725 and32(Imm32(~JSImmediate::ExtendedTagBitUndefined), X86::eax); 794 m_jmpTable.append(JmpTable(je32(X86::eax, Imm32(asInteger(jsNull()))), i + 2 + target));726 addJump(je32(X86::eax, Imm32(asInteger(jsNull()))), target + 2); 795 727 796 728 wasNotImmediate.link(this); 797 i += OPCODE_LENGTH(op_jeq_null); 798 break; 729 NEXT_OPCODE(op_jeq_null); 799 730 }; 800 731 case op_jneq_null: { 801 unsigned src = instruction[i +1].u.operand;802 unsigned target = instruction[i +2].u.operand;803 804 emitGetVirtualRegister(src, X86::eax , i);732 unsigned src = currentInstruction[1].u.operand; 733 unsigned target = currentInstruction[2].u.operand; 734 735 emitGetVirtualRegister(src, X86::eax); 805 736 Jump isImmediate = emitJumpIfNotJSCell(X86::eax); 806 737 807 738 // First, handle JSCell cases - check MasqueradesAsUndefined bit on the structure. 808 739 loadPtr(Address(X86::eax, FIELD_OFFSET(JSCell, m_structure)), X86::ecx); 809 m_jmpTable.append(JmpTable(jz32(Address(X86::ecx, FIELD_OFFSET(Structure, m_typeInfo.m_flags)), Imm32(MasqueradesAsUndefined)), i + 2 + target));740 addJump(jz32(Address(X86::ecx, FIELD_OFFSET(Structure, m_typeInfo.m_flags)), Imm32(MasqueradesAsUndefined)), target + 2); 810 741 Jump wasNotImmediate = jump(); 811 742 … … 813 744 isImmediate.link(this); 814 745 and32(Imm32(~JSImmediate::ExtendedTagBitUndefined), X86::eax); 815 m_jmpTable.append(JmpTable(jne32(X86::eax, Imm32(asInteger(jsNull()))), i + 2 + target));746 addJump(jne32(X86::eax, Imm32(asInteger(jsNull()))), target + 2); 816 747 817 748 wasNotImmediate.link(this); 818 i += OPCODE_LENGTH(op_jneq_null); 819 break; 749 NEXT_OPCODE(op_jneq_null); 820 750 } 821 751 case op_post_inc: { 822 int srcDst = instruction[i +2].u.operand;823 emitGetVirtualRegister(srcDst, X86::eax , i);752 int srcDst = currentInstruction[2].u.operand; 753 emitGetVirtualRegister(srcDst, X86::eax); 824 754 move(X86::eax, X86::edx); 825 emitJumpSlowCaseIfNotImmNum(X86::eax , i);826 m_slowCases.append(SlowCaseEntry(joAdd32(Imm32(getDeTaggedConstantImmediate(JSImmediate::oneImmediate())), X86::edx), i));755 emitJumpSlowCaseIfNotImmNum(X86::eax); 756 addSlowCase(joAdd32(Imm32(getDeTaggedConstantImmediate(JSImmediate::oneImmediate())), X86::edx)); 827 757 emitPutVirtualRegister(srcDst, X86::edx); 828 emitPutVirtualRegister(instruction[i + 1].u.operand); 829 i += OPCODE_LENGTH(op_post_inc); 830 break; 758 emitPutVirtualRegister(currentInstruction[1].u.operand); 759 NEXT_OPCODE(op_post_inc); 831 760 } 832 761 case op_unexpected_load: { 833 JSValue* v = m_codeBlock->unexpectedConstant( instruction[i +2].u.operand);762 JSValue* v = m_codeBlock->unexpectedConstant(currentInstruction[2].u.operand); 834 763 move(ImmPtr(v), X86::eax); 835 emitPutVirtualRegister(instruction[i + 1].u.operand); 836 i += OPCODE_LENGTH(op_unexpected_load); 837 break; 764 emitPutVirtualRegister(currentInstruction[1].u.operand); 765 NEXT_OPCODE(op_unexpected_load); 838 766 } 839 767 case op_jsr: { 840 int retAddrDst = instruction[i +1].u.operand;841 int target = instruction[i +2].u.operand;768 int retAddrDst = currentInstruction[1].u.operand; 769 int target = currentInstruction[2].u.operand; 842 770 __ movl_i32m(0, sizeof(Register) * retAddrDst, X86::edi); 843 771 JmpDst addrPosition = __ label(); 844 m_jmpTable.append(JmpTable(__ jmp(), i + 2 + target));772 addJump(__ jmp(), target + 2); 845 773 JmpDst sretTarget = __ label(); 846 774 m_jsrSites.append(JSRInfo(addrPosition, sretTarget)); 847 i += OPCODE_LENGTH(op_jsr); 848 break; 775 NEXT_OPCODE(op_jsr); 849 776 } 850 777 case op_sret: { 851 __ jmp_m(sizeof(Register) * instruction[i + 1].u.operand, X86::edi); 852 i += OPCODE_LENGTH(op_sret); 853 break; 778 __ jmp_m(sizeof(Register) * currentInstruction[1].u.operand, X86::edi); 779 NEXT_OPCODE(op_sret); 854 780 } 855 781 case op_eq: { 856 emitGetVirtualRegisters( instruction[i + 2].u.operand, X86::eax, instruction[i + 3].u.operand, X86::edx, i);857 emitJumpSlowCaseIfNotImmNums(X86::eax, X86::edx, X86::ecx , i);782 emitGetVirtualRegisters(currentInstruction[2].u.operand, X86::eax, currentInstruction[3].u.operand, X86::edx); 783 emitJumpSlowCaseIfNotImmNums(X86::eax, X86::edx, X86::ecx); 858 784 sete32(X86::edx, X86::eax); 859 785 emitTagAsBoolImmediate(X86::eax); 860 emitPutVirtualRegister(instruction[i + 1].u.operand); 861 i += OPCODE_LENGTH(op_eq); 862 break; 786 emitPutVirtualRegister(currentInstruction[1].u.operand); 787 NEXT_OPCODE(op_eq); 863 788 } 864 789 case op_lshift: { 865 emitGetVirtualRegisters( instruction[i + 2].u.operand, X86::eax, instruction[i + 3].u.operand, X86::ecx, i);866 emitJumpSlowCaseIfNotImmNum(X86::eax , i);867 emitJumpSlowCaseIfNotImmNum(X86::ecx , i);790 emitGetVirtualRegisters(currentInstruction[2].u.operand, X86::eax, currentInstruction[3].u.operand, X86::ecx); 791 emitJumpSlowCaseIfNotImmNum(X86::eax); 792 emitJumpSlowCaseIfNotImmNum(X86::ecx); 868 793 emitFastArithImmToInt(X86::eax); 869 794 emitFastArithImmToInt(X86::ecx); 870 795 __ shll_CLr(X86::eax); 871 emitFastArithIntToImmOrSlowCase(X86::eax, i); 872 emitPutVirtualRegister(instruction[i + 1].u.operand); 873 i += OPCODE_LENGTH(op_lshift); 874 break; 796 emitFastArithIntToImmOrSlowCase(X86::eax); 797 emitPutVirtualRegister(currentInstruction[1].u.operand); 798 NEXT_OPCODE(op_lshift); 875 799 } 876 800 case op_bitand: { 877 unsigned src1 = instruction[i +2].u.operand;878 unsigned src2 = instruction[i +3].u.operand;879 unsigned dst = instruction[i +1].u.operand;801 unsigned src1 = currentInstruction[2].u.operand; 802 unsigned src2 = currentInstruction[3].u.operand; 803 unsigned dst = currentInstruction[1].u.operand; 880 804 if (JSValue* value = getConstantImmediateNumericArg(src1)) { 881 emitGetVirtualRegister(src2, X86::eax , i);882 emitJumpSlowCaseIfNotImmNum(X86::eax , i);805 emitGetVirtualRegister(src2, X86::eax); 806 emitJumpSlowCaseIfNotImmNum(X86::eax); 883 807 and32(Imm32(asInteger(value)), X86::eax); // FIXME: make it more obvious this is relying on the format of JSImmediate 884 808 emitPutVirtualRegister(dst); 885 809 } else if (JSValue* value = getConstantImmediateNumericArg(src2)) { 886 emitGetVirtualRegister(src1, X86::eax , i);887 emitJumpSlowCaseIfNotImmNum(X86::eax , i);810 emitGetVirtualRegister(src1, X86::eax); 811 emitJumpSlowCaseIfNotImmNum(X86::eax); 888 812 and32(Imm32(asInteger(value)), X86::eax); 889 813 emitPutVirtualRegister(dst); 890 814 } else { 891 emitGetVirtualRegisters(src1, X86::eax, src2, X86::edx , i);815 emitGetVirtualRegisters(src1, X86::eax, src2, X86::edx); 892 816 and32(X86::edx, X86::eax); 893 emitJumpSlowCaseIfNotImmNum(X86::eax , i);817 emitJumpSlowCaseIfNotImmNum(X86::eax); 894 818 emitPutVirtualRegister(dst); 895 819 } 896 i += OPCODE_LENGTH(op_bitand); 897 break; 820 NEXT_OPCODE(op_bitand); 898 821 } 899 822 case op_rshift: { 900 unsigned src1 = instruction[i +2].u.operand;901 unsigned src2 = instruction[i +3].u.operand;823 unsigned src1 = currentInstruction[2].u.operand; 824 unsigned src2 = currentInstruction[3].u.operand; 902 825 if (JSValue* value = getConstantImmediateNumericArg(src2)) { 903 emitGetVirtualRegister(src1, X86::eax , i);904 emitJumpSlowCaseIfNotImmNum(X86::eax , i);826 emitGetVirtualRegister(src1, X86::eax); 827 emitJumpSlowCaseIfNotImmNum(X86::eax); 905 828 // Mask with 0x1f as per ecma-262 11.7.2 step 7. 906 829 rshift32(Imm32(JSImmediate::getTruncatedUInt32(value) & 0x1f), X86::eax); 907 830 } else { 908 emitGetVirtualRegisters(src1, X86::eax, src2, X86::ecx , i);909 emitJumpSlowCaseIfNotImmNum(X86::eax , i);910 emitJumpSlowCaseIfNotImmNum(X86::ecx , i);831 emitGetVirtualRegisters(src1, X86::eax, src2, X86::ecx); 832 emitJumpSlowCaseIfNotImmNum(X86::eax); 833 emitJumpSlowCaseIfNotImmNum(X86::ecx); 911 834 emitFastArithImmToInt(X86::ecx); 912 835 __ sarl_CLr(X86::eax); 913 836 } 914 837 emitFastArithPotentiallyReTagImmediate(X86::eax); 915 emitPutVirtualRegister(instruction[i + 1].u.operand); 916 i += OPCODE_LENGTH(op_rshift); 917 break; 838 emitPutVirtualRegister(currentInstruction[1].u.operand); 839 NEXT_OPCODE(op_rshift); 918 840 } 919 841 case op_bitnot: { 920 emitGetVirtualRegister( instruction[i + 2].u.operand, X86::eax, i);921 emitJumpSlowCaseIfNotImmNum(X86::eax , i);842 emitGetVirtualRegister(currentInstruction[2].u.operand, X86::eax); 843 emitJumpSlowCaseIfNotImmNum(X86::eax); 922 844 xor32(Imm32(~JSImmediate::TagBitTypeInteger), X86::eax); 923 emitPutVirtualRegister(instruction[i + 1].u.operand); 924 i += OPCODE_LENGTH(op_bitnot); 925 break; 845 emitPutVirtualRegister(currentInstruction[1].u.operand); 846 NEXT_OPCODE(op_bitnot); 926 847 } 927 848 case op_resolve_with_base: { 928 Identifier* ident = &(m_codeBlock->identifier( instruction[i +3].u.operand));849 Identifier* ident = &(m_codeBlock->identifier(currentInstruction[3].u.operand)); 929 850 emitPutCTIArgConstant(reinterpret_cast<unsigned>(ident), 0); 930 emitCTICall(i, Interpreter::cti_op_resolve_with_base); 931 emitPutVirtualRegister(instruction[i + 2].u.operand, X86::edx); 932 emitPutVirtualRegister(instruction[i + 1].u.operand); 933 i += OPCODE_LENGTH(op_resolve_with_base); 934 break; 851 emitCTICall(Interpreter::cti_op_resolve_with_base); 852 emitPutVirtualRegister(currentInstruction[2].u.operand, X86::edx); 853 emitPutVirtualRegister(currentInstruction[1].u.operand); 854 NEXT_OPCODE(op_resolve_with_base); 935 855 } 936 856 case op_new_func_exp: { 937 FuncExprNode* func = m_codeBlock->functionExpression( instruction[i +2].u.operand);857 FuncExprNode* func = m_codeBlock->functionExpression(currentInstruction[2].u.operand); 938 858 emitPutCTIArgConstant(reinterpret_cast<unsigned>(func), 0); 939 emitCTICall(i, Interpreter::cti_op_new_func_exp); 940 emitPutVirtualRegister(instruction[i + 1].u.operand); 941 i += OPCODE_LENGTH(op_new_func_exp); 942 break; 859 emitCTICall(Interpreter::cti_op_new_func_exp); 860 emitPutVirtualRegister(currentInstruction[1].u.operand); 861 NEXT_OPCODE(op_new_func_exp); 943 862 } 944 863 case op_mod: { 945 emitGetVirtualRegisters( instruction[i + 2].u.operand, X86::eax, instruction[i + 3].u.operand, X86::ecx, i);946 emitJumpSlowCaseIfNotImmNum(X86::eax , i);947 emitJumpSlowCaseIfNotImmNum(X86::ecx , i);864 emitGetVirtualRegisters(currentInstruction[2].u.operand, X86::eax, currentInstruction[3].u.operand, X86::ecx); 865 emitJumpSlowCaseIfNotImmNum(X86::eax); 866 emitJumpSlowCaseIfNotImmNum(X86::ecx); 948 867 emitFastArithDeTagImmediate(X86::eax); 949 m_slowCases.append(SlowCaseEntry(emitFastArithDeTagImmediateJumpIfZero(X86::ecx), i));868 addSlowCase(emitFastArithDeTagImmediateJumpIfZero(X86::ecx)); 950 869 __ cdq(); 951 870 __ idivl_r(X86::ecx); 952 871 emitFastArithReTagImmediate(X86::edx); 953 872 move(X86::edx, X86::eax); 954 emitPutVirtualRegister(instruction[i + 1].u.operand); 955 i += OPCODE_LENGTH(op_mod); 956 break; 873 emitPutVirtualRegister(currentInstruction[1].u.operand); 874 NEXT_OPCODE(op_mod); 957 875 } 958 876 case op_jtrue: { 959 unsigned target = instruction[i +2].u.operand;960 emitGetVirtualRegister( instruction[i + 1].u.operand, X86::eax, i);877 unsigned target = currentInstruction[2].u.operand; 878 emitGetVirtualRegister(currentInstruction[1].u.operand, X86::eax); 961 879 962 880 Jump isZero = je32(X86::eax, Imm32(asInteger(JSImmediate::zeroImmediate()))); 963 m_jmpTable.append(JmpTable(jnz32(X86::eax, Imm32(JSImmediate::TagBitTypeInteger)), i + 2 + target));964 965 m_jmpTable.append(JmpTable(je32(X86::eax, Imm32(asInteger(JSImmediate::trueImmediate()))), i + 2 + target));966 m_slowCases.append(SlowCaseEntry(jne32(X86::eax, Imm32(asInteger(JSImmediate::falseImmediate()))), i));881 addJump(jnz32(X86::eax, Imm32(JSImmediate::TagBitTypeInteger)), target + 2); 882 883 addJump(je32(X86::eax, Imm32(asInteger(JSImmediate::trueImmediate()))), target + 2); 884 addSlowCase(jne32(X86::eax, Imm32(asInteger(JSImmediate::falseImmediate())))); 967 885 968 886 isZero.link(this); 969 i += OPCODE_LENGTH(op_jtrue); 970 break; 887 NEXT_OPCODE(op_jtrue); 971 888 } 972 889 CTI_COMPILE_BINARY_OP(op_less) 973 890 case op_neq: { 974 emitGetVirtualRegisters( instruction[i + 2].u.operand, X86::eax, instruction[i + 3].u.operand, X86::edx, i);975 emitJumpSlowCaseIfNotImmNums(X86::eax, X86::edx, X86::ecx , i);891 emitGetVirtualRegisters(currentInstruction[2].u.operand, X86::eax, currentInstruction[3].u.operand, X86::edx); 892 emitJumpSlowCaseIfNotImmNums(X86::eax, X86::edx, X86::ecx); 976 893 setne32(X86::edx, X86::eax); 977 894 emitTagAsBoolImmediate(X86::eax); 978 895 979 emitPutVirtualRegister(instruction[i + 1].u.operand); 980 981 i += OPCODE_LENGTH(op_neq); 982 break; 896 emitPutVirtualRegister(currentInstruction[1].u.operand); 897 898 NEXT_OPCODE(op_neq); 983 899 } 984 900 case op_post_dec: { 985 int srcDst = instruction[i +2].u.operand;986 emitGetVirtualRegister(srcDst, X86::eax , i);901 int srcDst = currentInstruction[2].u.operand; 902 emitGetVirtualRegister(srcDst, X86::eax); 987 903 move(X86::eax, X86::edx); 988 emitJumpSlowCaseIfNotImmNum(X86::eax , i);989 m_slowCases.append(SlowCaseEntry(joSub32(Imm32(getDeTaggedConstantImmediate(JSImmediate::oneImmediate())), X86::edx), i));904 emitJumpSlowCaseIfNotImmNum(X86::eax); 905 addSlowCase(joSub32(Imm32(getDeTaggedConstantImmediate(JSImmediate::oneImmediate())), X86::edx)); 990 906 emitPutVirtualRegister(srcDst, X86::edx); 991 emitPutVirtualRegister(instruction[i + 1].u.operand); 992 i += OPCODE_LENGTH(op_post_dec); 993 break; 907 emitPutVirtualRegister(currentInstruction[1].u.operand); 908 NEXT_OPCODE(op_post_dec); 994 909 } 995 910 CTI_COMPILE_BINARY_OP(op_urshift) 996 911 case op_bitxor: { 997 emitGetVirtualRegisters( instruction[i + 2].u.operand, X86::eax, instruction[i + 3].u.operand, X86::edx, i);998 emitJumpSlowCaseIfNotImmNums(X86::eax, X86::edx, X86::ecx , i);912 emitGetVirtualRegisters(currentInstruction[2].u.operand, X86::eax, currentInstruction[3].u.operand, X86::edx); 913 emitJumpSlowCaseIfNotImmNums(X86::eax, X86::edx, X86::ecx); 999 914 xor32(X86::edx, X86::eax); 1000 915 emitFastArithReTagImmediate(X86::eax); 1001 emitPutVirtualRegister(instruction[i + 1].u.operand); 1002 i += OPCODE_LENGTH(op_bitxor); 1003 break; 916 emitPutVirtualRegister(currentInstruction[1].u.operand); 917 NEXT_OPCODE(op_bitxor); 1004 918 } 1005 919 case op_new_regexp: { 1006 RegExp* regExp = m_codeBlock->regexp( instruction[i +2].u.operand);920 RegExp* regExp = m_codeBlock->regexp(currentInstruction[2].u.operand); 1007 921 emitPutCTIArgConstant(reinterpret_cast<unsigned>(regExp), 0); 1008 emitCTICall(i, Interpreter::cti_op_new_regexp); 1009 emitPutVirtualRegister(instruction[i + 1].u.operand); 1010 i += OPCODE_LENGTH(op_new_regexp); 1011 break; 922 emitCTICall(Interpreter::cti_op_new_regexp); 923 emitPutVirtualRegister(currentInstruction[1].u.operand); 924 NEXT_OPCODE(op_new_regexp); 1012 925 } 1013 926 case op_bitor: { 1014 emitGetVirtualRegisters( instruction[i + 2].u.operand, X86::eax, instruction[i + 3].u.operand, X86::edx, i);1015 emitJumpSlowCaseIfNotImmNums(X86::eax, X86::edx, X86::ecx , i);927 emitGetVirtualRegisters(currentInstruction[2].u.operand, X86::eax, currentInstruction[3].u.operand, X86::edx); 928 emitJumpSlowCaseIfNotImmNums(X86::eax, X86::edx, X86::ecx); 1016 929 or32(X86::edx, X86::eax); 1017 emitPutVirtualRegister(instruction[i + 1].u.operand); 1018 i += OPCODE_LENGTH(op_bitor); 1019 break; 930 emitPutVirtualRegister(currentInstruction[1].u.operand); 931 NEXT_OPCODE(op_bitor); 1020 932 } 1021 933 case op_throw: { 1022 emitPutCTIArgFromVirtualRegister( instruction[i +1].u.operand, 0, X86::ecx);1023 emitCTICall( i,Interpreter::cti_op_throw);934 emitPutCTIArgFromVirtualRegister(currentInstruction[1].u.operand, 0, X86::ecx); 935 emitCTICall(Interpreter::cti_op_throw); 1024 936 __ addl_i8r(0x20, X86::esp); 1025 937 __ popl_r(X86::ebx); … … 1027 939 __ popl_r(X86::esi); 1028 940 __ ret(); 1029 i += OPCODE_LENGTH(op_throw); 1030 break; 941 NEXT_OPCODE(op_throw); 1031 942 } 1032 943 case op_get_pnames: { 1033 emitPutCTIArgFromVirtualRegister(instruction[i + 2].u.operand, 0, X86::ecx); 1034 emitCTICall(i, Interpreter::cti_op_get_pnames); 1035 emitPutVirtualRegister(instruction[i + 1].u.operand); 1036 i += OPCODE_LENGTH(op_get_pnames); 1037 break; 944 emitPutCTIArgFromVirtualRegister(currentInstruction[2].u.operand, 0, X86::ecx); 945 emitCTICall(Interpreter::cti_op_get_pnames); 946 emitPutVirtualRegister(currentInstruction[1].u.operand); 947 NEXT_OPCODE(op_get_pnames); 1038 948 } 1039 949 case op_next_pname: { 1040 emitPutCTIArgFromVirtualRegister( instruction[i +2].u.operand, 0, X86::ecx);1041 unsigned target = instruction[i +3].u.operand;1042 emitCTICall( i,Interpreter::cti_op_next_pname);950 emitPutCTIArgFromVirtualRegister(currentInstruction[2].u.operand, 0, X86::ecx); 951 unsigned target = currentInstruction[3].u.operand; 952 emitCTICall(Interpreter::cti_op_next_pname); 1043 953 Jump endOfIter = jzPtr(X86::eax); 1044 emitPutVirtualRegister( instruction[i +1].u.operand);1045 m_jmpTable.append(JmpTable(jump(), i + 3 + target));954 emitPutVirtualRegister(currentInstruction[1].u.operand); 955 addJump(jump(), target + 3); 1046 956 endOfIter.link(this); 1047 i += OPCODE_LENGTH(op_next_pname); 1048 break; 957 NEXT_OPCODE(op_next_pname); 1049 958 } 1050 959 case op_push_scope: { 1051 emitPutCTIArgFromVirtualRegister(instruction[i + 1].u.operand, 0, X86::ecx); 1052 emitCTICall(i, Interpreter::cti_op_push_scope); 1053 i += OPCODE_LENGTH(op_push_scope); 1054 break; 960 emitPutCTIArgFromVirtualRegister(currentInstruction[1].u.operand, 0, X86::ecx); 961 emitCTICall(Interpreter::cti_op_push_scope); 962 NEXT_OPCODE(op_push_scope); 1055 963 } 1056 964 case op_pop_scope: { 1057 emitCTICall(i, Interpreter::cti_op_pop_scope); 1058 i += OPCODE_LENGTH(op_pop_scope); 1059 break; 965 emitCTICall(Interpreter::cti_op_pop_scope); 966 NEXT_OPCODE(op_pop_scope); 1060 967 } 1061 968 CTI_COMPILE_UNARY_OP(op_typeof) … … 1067 974 CTI_COMPILE_UNARY_OP(op_is_function) 1068 975 case op_stricteq: { 1069 compileOpStrictEq(instruction + i, i, OpStrictEq); 1070 i += OPCODE_LENGTH(op_stricteq); 1071 break; 976 compileOpStrictEq(currentInstruction, OpStrictEq); 977 NEXT_OPCODE(op_stricteq); 1072 978 } 1073 979 case op_nstricteq: { 1074 compileOpStrictEq(instruction + i, i, OpNStrictEq); 1075 i += OPCODE_LENGTH(op_nstricteq); 1076 break; 980 compileOpStrictEq(currentInstruction, OpNStrictEq); 981 NEXT_OPCODE(op_nstricteq); 1077 982 } 1078 983 case op_to_jsnumber: { 1079 int srcVReg = instruction[i +2].u.operand;1080 emitGetVirtualRegister(srcVReg, X86::eax , i);984 int srcVReg = currentInstruction[2].u.operand; 985 emitGetVirtualRegister(srcVReg, X86::eax); 1081 986 1082 987 Jump wasImmediate = jnz32(X86::eax, Imm32(JSImmediate::TagBitTypeInteger)); 1083 988 1084 emitJumpSlowCaseIfNotJSCell(X86::eax, i,srcVReg);989 emitJumpSlowCaseIfNotJSCell(X86::eax, srcVReg); 1085 990 loadPtr(Address(X86::eax, FIELD_OFFSET(JSCell, m_structure)), X86::ecx); 1086 m_slowCases.append(SlowCaseEntry(jne32(Address(X86::ecx, FIELD_OFFSET(Structure, m_typeInfo.m_type)), Imm32(NumberType)), i));991 addSlowCase(jne32(Address(X86::ecx, FIELD_OFFSET(Structure, m_typeInfo.m_type)), Imm32(NumberType))); 1087 992 1088 993 wasImmediate.link(this); 1089 994 1090 emitPutVirtualRegister(instruction[i + 1].u.operand); 1091 i += OPCODE_LENGTH(op_to_jsnumber); 1092 break; 1093 } 1094 case op_in: { 1095 emitPutCTIArgFromVirtualRegister(instruction[i + 2].u.operand, 0, X86::ecx); 1096 emitPutCTIArgFromVirtualRegister(instruction[i + 3].u.operand, 4, X86::ecx); 1097 emitCTICall(i, Interpreter::cti_op_in); 1098 emitPutVirtualRegister(instruction[i + 1].u.operand); 1099 i += OPCODE_LENGTH(op_in); 1100 break; 1101 } 995 emitPutVirtualRegister(currentInstruction[1].u.operand); 996 NEXT_OPCODE(op_to_jsnumber); 997 } 998 CTI_COMPILE_BINARY_OP(op_in) 1102 999 case op_push_new_scope: { 1103 Identifier* ident = &(m_codeBlock->identifier( instruction[i +2].u.operand));1000 Identifier* ident = &(m_codeBlock->identifier(currentInstruction[2].u.operand)); 1104 1001 emitPutCTIArgConstant(reinterpret_cast<unsigned>(ident), 0); 1105 emitPutCTIArgFromVirtualRegister(instruction[i + 3].u.operand, 4, X86::ecx); 1106 emitCTICall(i, Interpreter::cti_op_push_new_scope); 1107 emitPutVirtualRegister(instruction[i + 1].u.operand); 1108 i += OPCODE_LENGTH(op_push_new_scope); 1109 break; 1002 emitPutCTIArgFromVirtualRegister(currentInstruction[3].u.operand, 4, X86::ecx); 1003 emitCTICall(Interpreter::cti_op_push_new_scope); 1004 emitPutVirtualRegister(currentInstruction[1].u.operand); 1005 NEXT_OPCODE(op_push_new_scope); 1110 1006 } 1111 1007 case op_catch: { 1112 1008 emitGetCTIParam(CTI_ARGS_callFrame, X86::edi); // edi := r 1113 emitPutVirtualRegister(instruction[i + 1].u.operand); 1114 i += OPCODE_LENGTH(op_catch); 1115 break; 1009 emitPutVirtualRegister(currentInstruction[1].u.operand); 1010 NEXT_OPCODE(op_catch); 1116 1011 } 1117 1012 case op_jmp_scopes: { 1118 unsigned count = instruction[i +1].u.operand;1013 unsigned count = currentInstruction[1].u.operand; 1119 1014 emitPutCTIArgConstant(count, 0); 1120 emitCTICall(i, Interpreter::cti_op_jmp_scopes); 1121 unsigned target = instruction[i + 2].u.operand; 1122 m_jmpTable.append(JmpTable(jump(), i + 2 + target)); 1123 i += OPCODE_LENGTH(op_jmp_scopes); 1124 break; 1015 emitCTICall(Interpreter::cti_op_jmp_scopes); 1016 unsigned target = currentInstruction[2].u.operand; 1017 addJump(jump(), target + 2); 1018 NEXT_OPCODE(op_jmp_scopes); 1125 1019 } 1126 1020 case op_put_by_index: { 1127 emitPutCTIArgFromVirtualRegister(instruction[i + 1].u.operand, 0, X86::ecx); 1128 emitPutCTIArgConstant(instruction[i + 2].u.operand, 4); 1129 emitPutCTIArgFromVirtualRegister(instruction[i + 3].u.operand, 8, X86::ecx); 1130 emitCTICall(i, Interpreter::cti_op_put_by_index); 1131 i += OPCODE_LENGTH(op_put_by_index); 1132 break; 1021 emitPutCTIArgFromVirtualRegister(currentInstruction[1].u.operand, 0, X86::ecx); 1022 emitPutCTIArgConstant(currentInstruction[2].u.operand, 4); 1023 emitPutCTIArgFromVirtualRegister(currentInstruction[3].u.operand, 8, X86::ecx); 1024 emitCTICall(Interpreter::cti_op_put_by_index); 1025 NEXT_OPCODE(op_put_by_index); 1133 1026 } 1134 1027 case op_switch_imm: { 1135 unsigned tableIndex = instruction[i +1].u.operand;1136 unsigned defaultOffset = instruction[i +2].u.operand;1137 unsigned scrutinee = instruction[i +3].u.operand;1028 unsigned tableIndex = currentInstruction[1].u.operand; 1029 unsigned defaultOffset = currentInstruction[2].u.operand; 1030 unsigned scrutinee = currentInstruction[3].u.operand; 1138 1031 1139 1032 // create jump table for switch destinations, track this switch statement. 1140 1033 SimpleJumpTable* jumpTable = &m_codeBlock->immediateSwitchJumpTable(tableIndex); 1141 m_switches.append(SwitchRecord(jumpTable, i, defaultOffset, SwitchRecord::Immediate));1034 m_switches.append(SwitchRecord(jumpTable, m_bytecodeIndex, defaultOffset, SwitchRecord::Immediate)); 1142 1035 jumpTable->ctiOffsets.grow(jumpTable->branchOffsets.size()); 1143 1036 1144 1037 emitPutCTIArgFromVirtualRegister(scrutinee, 0, X86::ecx); 1145 1038 emitPutCTIArgConstant(tableIndex, 4); 1146 emitCTICall( i,Interpreter::cti_op_switch_imm);1039 emitCTICall(Interpreter::cti_op_switch_imm); 1147 1040 jump(X86::eax); 1148 i += OPCODE_LENGTH(op_switch_imm); 1149 break; 1041 NEXT_OPCODE(op_switch_imm); 1150 1042 } 1151 1043 case op_switch_char: { 1152 unsigned tableIndex = instruction[i +1].u.operand;1153 unsigned defaultOffset = instruction[i +2].u.operand;1154 unsigned scrutinee = instruction[i +3].u.operand;1044 unsigned tableIndex = currentInstruction[1].u.operand; 1045 unsigned defaultOffset = currentInstruction[2].u.operand; 1046 unsigned scrutinee = currentInstruction[3].u.operand; 1155 1047 1156 1048 // create jump table for switch destinations, track this switch statement. 1157 1049 SimpleJumpTable* jumpTable = &m_codeBlock->characterSwitchJumpTable(tableIndex); 1158 m_switches.append(SwitchRecord(jumpTable, i, defaultOffset, SwitchRecord::Character));1050 m_switches.append(SwitchRecord(jumpTable, m_bytecodeIndex, defaultOffset, SwitchRecord::Character)); 1159 1051 jumpTable->ctiOffsets.grow(jumpTable->branchOffsets.size()); 1160 1052 1161 1053 emitPutCTIArgFromVirtualRegister(scrutinee, 0, X86::ecx); 1162 1054 emitPutCTIArgConstant(tableIndex, 4); 1163 emitCTICall( i,Interpreter::cti_op_switch_char);1055 emitCTICall(Interpreter::cti_op_switch_char); 1164 1056 jump(X86::eax); 1165 i += OPCODE_LENGTH(op_switch_char); 1166 break; 1057 NEXT_OPCODE(op_switch_char); 1167 1058 } 1168 1059 case op_switch_string: { 1169 unsigned tableIndex = instruction[i +1].u.operand;1170 unsigned defaultOffset = instruction[i +2].u.operand;1171 unsigned scrutinee = instruction[i +3].u.operand;1060 unsigned tableIndex = currentInstruction[1].u.operand; 1061 unsigned defaultOffset = currentInstruction[2].u.operand; 1062 unsigned scrutinee = currentInstruction[3].u.operand; 1172 1063 1173 1064 // create jump table for switch destinations, track this switch statement. 1174 1065 StringJumpTable* jumpTable = &m_codeBlock->stringSwitchJumpTable(tableIndex); 1175 m_switches.append(SwitchRecord(jumpTable, i, defaultOffset));1066 m_switches.append(SwitchRecord(jumpTable, m_bytecodeIndex, defaultOffset)); 1176 1067 1177 1068 emitPutCTIArgFromVirtualRegister(scrutinee, 0, X86::ecx); 1178 1069 emitPutCTIArgConstant(tableIndex, 4); 1179 emitCTICall( i,Interpreter::cti_op_switch_string);1070 emitCTICall(Interpreter::cti_op_switch_string); 1180 1071 jump(X86::eax); 1181 i += OPCODE_LENGTH(op_switch_string); 1182 break; 1072 NEXT_OPCODE(op_switch_string); 1183 1073 } 1184 1074 case op_del_by_val: { 1185 emitPutCTIArgFromVirtualRegister(instruction[i + 2].u.operand, 0, X86::ecx); 1186 emitPutCTIArgFromVirtualRegister(instruction[i + 3].u.operand, 4, X86::ecx); 1187 emitCTICall(i, Interpreter::cti_op_del_by_val); 1188 emitPutVirtualRegister(instruction[i + 1].u.operand); 1189 i += OPCODE_LENGTH(op_del_by_val); 1190 break; 1075 emitPutCTIArgFromVirtualRegister(currentInstruction[2].u.operand, 0, X86::ecx); 1076 emitPutCTIArgFromVirtualRegister(currentInstruction[3].u.operand, 4, X86::ecx); 1077 emitCTICall(Interpreter::cti_op_del_by_val); 1078 emitPutVirtualRegister(currentInstruction[1].u.operand); 1079 NEXT_OPCODE(op_del_by_val); 1191 1080 } 1192 1081 case op_put_getter: { 1193 emitPutCTIArgFromVirtualRegister( instruction[i +1].u.operand, 0, X86::ecx);1194 Identifier* ident = &(m_codeBlock->identifier( instruction[i +2].u.operand));1082 emitPutCTIArgFromVirtualRegister(currentInstruction[1].u.operand, 0, X86::ecx); 1083 Identifier* ident = &(m_codeBlock->identifier(currentInstruction[2].u.operand)); 1195 1084 emitPutCTIArgConstant(reinterpret_cast<unsigned>(ident), 4); 1196 emitPutCTIArgFromVirtualRegister(instruction[i + 3].u.operand, 8, X86::ecx); 1197 emitCTICall(i, Interpreter::cti_op_put_getter); 1198 i += OPCODE_LENGTH(op_put_getter); 1199 break; 1085 emitPutCTIArgFromVirtualRegister(currentInstruction[3].u.operand, 8, X86::ecx); 1086 emitCTICall(Interpreter::cti_op_put_getter); 1087 NEXT_OPCODE(op_put_getter); 1200 1088 } 1201 1089 case op_put_setter: { 1202 emitPutCTIArgFromVirtualRegister( instruction[i +1].u.operand, 0, X86::ecx);1203 Identifier* ident = &(m_codeBlock->identifier( instruction[i +2].u.operand));1090 emitPutCTIArgFromVirtualRegister(currentInstruction[1].u.operand, 0, X86::ecx); 1091 Identifier* ident = &(m_codeBlock->identifier(currentInstruction[2].u.operand)); 1204 1092 emitPutCTIArgConstant(reinterpret_cast<unsigned>(ident), 4); 1205 emitPutCTIArgFromVirtualRegister(instruction[i + 3].u.operand, 8, X86::ecx); 1206 emitCTICall(i, Interpreter::cti_op_put_setter); 1207 i += OPCODE_LENGTH(op_put_setter); 1208 break; 1093 emitPutCTIArgFromVirtualRegister(currentInstruction[3].u.operand, 8, X86::ecx); 1094 emitCTICall(Interpreter::cti_op_put_setter); 1095 NEXT_OPCODE(op_put_setter); 1209 1096 } 1210 1097 case op_new_error: { 1211 JSValue* message = m_codeBlock->unexpectedConstant( instruction[i +3].u.operand);1212 emitPutCTIArgConstant( instruction[i +2].u.operand, 0);1098 JSValue* message = m_codeBlock->unexpectedConstant(currentInstruction[3].u.operand); 1099 emitPutCTIArgConstant(currentInstruction[2].u.operand, 0); 1213 1100 emitPutCTIArgConstant(asInteger(message), 4); 1214 emitPutCTIArgConstant(m_codeBlock->lineNumberForBytecodeOffset(i), 8); 1215 emitCTICall(i, Interpreter::cti_op_new_error); 1216 emitPutVirtualRegister(instruction[i + 1].u.operand); 1217 i += OPCODE_LENGTH(op_new_error); 1218 break; 1101 emitPutCTIArgConstant(m_codeBlock->lineNumberForBytecodeOffset(m_bytecodeIndex), 8); 1102 emitCTICall(Interpreter::cti_op_new_error); 1103 emitPutVirtualRegister(currentInstruction[1].u.operand); 1104 NEXT_OPCODE(op_new_error); 1219 1105 } 1220 1106 case op_debug: { 1221 emitPutCTIArgConstant(instruction[i + 1].u.operand, 0); 1222 emitPutCTIArgConstant(instruction[i + 2].u.operand, 4); 1223 emitPutCTIArgConstant(instruction[i + 3].u.operand, 8); 1224 emitCTICall(i, Interpreter::cti_op_debug); 1225 i += OPCODE_LENGTH(op_debug); 1226 break; 1107 emitPutCTIArgConstant(currentInstruction[1].u.operand, 0); 1108 emitPutCTIArgConstant(currentInstruction[2].u.operand, 4); 1109 emitPutCTIArgConstant(currentInstruction[3].u.operand, 8); 1110 emitCTICall(Interpreter::cti_op_debug); 1111 NEXT_OPCODE(op_debug); 1227 1112 } 1228 1113 case op_eq_null: { 1229 unsigned dst = instruction[i +1].u.operand;1230 unsigned src1 = instruction[i +2].u.operand;1231 1232 emitGetVirtualRegister(src1, X86::eax , i);1114 unsigned dst = currentInstruction[1].u.operand; 1115 unsigned src1 = currentInstruction[2].u.operand; 1116 1117 emitGetVirtualRegister(src1, X86::eax); 1233 1118 Jump isImmediate = emitJumpIfNotJSCell(X86::eax); 1234 1119 … … 1248 1133 emitPutVirtualRegister(dst); 1249 1134 1250 i += OPCODE_LENGTH(op_eq_null); 1251 break; 1135 NEXT_OPCODE(op_eq_null); 1252 1136 } 1253 1137 case op_neq_null: { 1254 unsigned dst = instruction[i +1].u.operand;1255 unsigned src1 = instruction[i +2].u.operand;1256 1257 emitGetVirtualRegister(src1, X86::eax , i);1138 unsigned dst = currentInstruction[1].u.operand; 1139 unsigned src1 = currentInstruction[2].u.operand; 1140 1141 emitGetVirtualRegister(src1, X86::eax); 1258 1142 Jump isImmediate = emitJumpIfNotJSCell(X86::eax); 1259 1143 … … 1273 1157 emitPutVirtualRegister(dst); 1274 1158 1275 i += OPCODE_LENGTH(op_neq_null); 1276 break; 1159 NEXT_OPCODE(op_neq_null); 1277 1160 } 1278 1161 case op_enter: { … … 1284 1167 emitInitRegister(j); 1285 1168 1286 i += OPCODE_LENGTH(op_enter); 1287 break; 1169 NEXT_OPCODE(op_enter); 1288 1170 } 1289 1171 case op_enter_with_activation: { … … 1295 1177 emitInitRegister(j); 1296 1178 1297 emitCTICall(i, Interpreter::cti_op_push_activation); 1298 emitPutVirtualRegister(instruction[i + 1].u.operand); 1299 1300 i += OPCODE_LENGTH(op_enter_with_activation); 1301 break; 1179 emitCTICall(Interpreter::cti_op_push_activation); 1180 emitPutVirtualRegister(currentInstruction[1].u.operand); 1181 1182 NEXT_OPCODE(op_enter_with_activation); 1302 1183 } 1303 1184 case op_create_arguments: { 1304 emitCTICall(i, (m_codeBlock->m_numParameters == 1) ? Interpreter::cti_op_create_arguments_no_params : Interpreter::cti_op_create_arguments); 1305 i += OPCODE_LENGTH(op_create_arguments); 1306 break; 1185 if (m_codeBlock->m_numParameters == 1) 1186 emitCTICall(Interpreter::cti_op_create_arguments_no_params); 1187 else 1188 emitCTICall(Interpreter::cti_op_create_arguments); 1189 NEXT_OPCODE(op_create_arguments); 1307 1190 } 1308 1191 case op_convert_this: { 1309 emitGetVirtualRegister( instruction[i + 1].u.operand, X86::eax, i);1310 1311 emitJumpSlowCaseIfNotJSCell(X86::eax , i);1192 emitGetVirtualRegister(currentInstruction[1].u.operand, X86::eax); 1193 1194 emitJumpSlowCaseIfNotJSCell(X86::eax); 1312 1195 loadPtr(Address(X86::eax, FIELD_OFFSET(JSCell, m_structure)), X86::edx); 1313 m_slowCases.append(SlowCaseEntry(jnz32(Address(X86::edx, FIELD_OFFSET(Structure, m_typeInfo.m_flags)), Imm32(NeedsThisConversion)), i)); 1314 1315 i += OPCODE_LENGTH(op_convert_this); 1316 break; 1196 addSlowCase(jnz32(Address(X86::edx, FIELD_OFFSET(Structure, m_typeInfo.m_flags)), Imm32(NeedsThisConversion))); 1197 1198 NEXT_OPCODE(op_convert_this); 1317 1199 } 1318 1200 case op_profile_will_call: { … … 1320 1202 __ cmpl_i32m(0, X86::eax); 1321 1203 JmpSrc noProfiler = __ je(); 1322 emitPutCTIArgFromVirtualRegister( instruction[i +1].u.operand, 0, X86::eax);1323 emitCTICall( i,Interpreter::cti_op_profile_will_call);1204 emitPutCTIArgFromVirtualRegister(currentInstruction[1].u.operand, 0, X86::eax); 1205 emitCTICall(Interpreter::cti_op_profile_will_call); 1324 1206 __ link(noProfiler, __ label()); 1325 1207 1326 i += OPCODE_LENGTH(op_profile_will_call); 1327 break; 1208 NEXT_OPCODE(op_profile_will_call); 1328 1209 } 1329 1210 case op_profile_did_call: { … … 1331 1212 __ cmpl_i32m(0, X86::eax); 1332 1213 JmpSrc noProfiler = __ je(); 1333 emitPutCTIArgFromVirtualRegister( instruction[i +1].u.operand, 0, X86::eax);1334 emitCTICall( i,Interpreter::cti_op_profile_did_call);1214 emitPutCTIArgFromVirtualRegister(currentInstruction[1].u.operand, 0, X86::eax); 1215 emitCTICall(Interpreter::cti_op_profile_did_call); 1335 1216 __ link(noProfiler, __ label()); 1336 1217 1337 i += OPCODE_LENGTH(op_profile_did_call); 1338 break; 1218 NEXT_OPCODE(op_profile_did_call); 1339 1219 } 1340 1220 case op_get_array_length: … … 1355 1235 ASSERT(propertyAccessInstructionIndex == m_codeBlock->numberOfStructureStubInfos()); 1356 1236 ASSERT(callLinkInfoIndex == m_codeBlock->numberOfCallLinkInfos()); 1237 1238 #ifndef NDEBUG 1239 // reset this, in order to guard it's use with asserts 1240 m_bytecodeIndex = -1; 1241 #endif 1357 1242 } 1358 1243 … … 1368 1253 void JIT::privateCompileSlowCases() 1369 1254 { 1255 Instruction* instructionsBegin = m_codeBlock->instructions().begin(); 1370 1256 unsigned propertyAccessInstructionIndex = 0; 1371 1257 unsigned callLinkInfoIndex = 0; 1372 1258 1373 Instruction* instruction = m_codeBlock->instructions().begin();1374 1259 for (Vector<SlowCaseEntry>::iterator iter = m_slowCases.begin(); iter != m_slowCases.end();) { 1375 1260 // FIXME: enable peephole optimizations for slow cases when applicable 1376 1261 killLastResultRegister(); 1377 1262 1378 unsigned i= iter->to;1263 m_bytecodeIndex = iter->to; 1379 1264 #ifndef NDEBUG 1380 unsigned firstTo = i;1265 unsigned firstTo = m_bytecodeIndex; 1381 1266 #endif 1382 1383 switch (OpcodeID opcodeID = m_interpreter->getOpcodeID(instruction[i].u.opcode)) { 1267 Instruction* currentInstruction = instructionsBegin + m_bytecodeIndex; 1268 1269 switch (OpcodeID opcodeID = m_interpreter->getOpcodeID(currentInstruction->u.opcode)) { 1384 1270 case op_convert_this: { 1385 1271 linkSlowCase(iter); 1386 1272 linkSlowCase(iter); 1387 1273 emitPutCTIArg(X86::eax, 0); 1388 emitCTICall(i, Interpreter::cti_op_convert_this); 1389 emitPutVirtualRegister(instruction[i + 1].u.operand); 1390 i += OPCODE_LENGTH(op_convert_this); 1391 break; 1274 emitCTICall(Interpreter::cti_op_convert_this); 1275 emitPutVirtualRegister(currentInstruction[1].u.operand); 1276 NEXT_OPCODE(op_convert_this); 1392 1277 } 1393 1278 case op_add: { 1394 unsigned dst = instruction[i +1].u.operand;1395 unsigned src1 = instruction[i +2].u.operand;1396 unsigned src2 = instruction[i +3].u.operand;1279 unsigned dst = currentInstruction[1].u.operand; 1280 unsigned src1 = currentInstruction[2].u.operand; 1281 unsigned src2 = currentInstruction[3].u.operand; 1397 1282 if (JSValue* value = getConstantImmediateNumericArg(src1)) { 1398 1283 Jump notImm = getSlowCase(iter); … … 1402 1287 emitPutCTIArgFromVirtualRegister(src1, 0, X86::ecx); 1403 1288 emitPutCTIArg(X86::eax, 4); 1404 emitCTICall( i,Interpreter::cti_op_add);1289 emitCTICall(Interpreter::cti_op_add); 1405 1290 emitPutVirtualRegister(dst); 1406 1291 } else if (JSValue* value = getConstantImmediateNumericArg(src2)) { … … 1411 1296 emitPutCTIArg(X86::eax, 0); 1412 1297 emitPutCTIArgFromVirtualRegister(src2, 4, X86::ecx); 1413 emitCTICall( i,Interpreter::cti_op_add);1298 emitCTICall(Interpreter::cti_op_add); 1414 1299 emitPutVirtualRegister(dst); 1415 1300 } else { 1416 OperandTypes types = OperandTypes::fromInt( instruction[i +4].u.operand);1301 OperandTypes types = OperandTypes::fromInt(currentInstruction[4].u.operand); 1417 1302 ASSERT(types.first().mightBeNumber() && types.second().mightBeNumber()); 1418 compileBinaryArithOpSlowCase(op_add, iter, dst, src1, src2, types , i);1303 compileBinaryArithOpSlowCase(op_add, iter, dst, src1, src2, types); 1419 1304 } 1420 1305 1421 i += OPCODE_LENGTH(op_add); 1422 break; 1306 NEXT_OPCODE(op_add); 1423 1307 } 1424 1308 case op_construct_verify: { 1425 1309 linkSlowCase(iter); 1426 1310 linkSlowCase(iter); 1427 emitGetVirtualRegister(instruction[i + 2].u.operand, X86::eax, i); 1428 emitPutVirtualRegister(instruction[i + 1].u.operand); 1429 1430 i += OPCODE_LENGTH(op_construct_verify); 1431 break; 1311 emitGetVirtualRegister(currentInstruction[2].u.operand, X86::eax); 1312 emitPutVirtualRegister(currentInstruction[1].u.operand); 1313 1314 NEXT_OPCODE(op_construct_verify); 1432 1315 } 1433 1316 case op_get_by_val: { … … 1442 1325 emitPutCTIArg(X86::eax, 0); 1443 1326 emitPutCTIArg(X86::edx, 4); 1444 emitCTICall( i,Interpreter::cti_op_get_by_val);1445 emitPutVirtualRegister( instruction[i +1].u.operand);1446 __ link(jump(), m_labels[i + 4]);1327 emitCTICall(Interpreter::cti_op_get_by_val); 1328 emitPutVirtualRegister(currentInstruction[1].u.operand); 1329 emitJumpSlowToHot(jump(), OPCODE_LENGTH(op_get_by_val)); 1447 1330 1448 1331 // This is slow case that handles accesses to arrays above the fast cut-off. … … 1456 1339 jzPtr(X86::ecx, beginGetByValSlow); 1457 1340 move(X86::ecx, X86::eax); 1458 emitPutVirtualRegister(instruction[i + 1].u.operand, X86::eax); 1459 1460 i += OPCODE_LENGTH(op_get_by_val); 1461 break; 1341 emitPutVirtualRegister(currentInstruction[1].u.operand, X86::eax); 1342 1343 NEXT_OPCODE(op_get_by_val); 1462 1344 } 1463 1345 case op_sub: { 1464 compileBinaryArithOpSlowCase(op_sub, iter, instruction[i + 1].u.operand, instruction[i + 2].u.operand, instruction[i + 3].u.operand, OperandTypes::fromInt(instruction[i + 4].u.operand), i); 1465 i += OPCODE_LENGTH(op_sub); 1466 break; 1346 compileBinaryArithOpSlowCase(op_sub, iter, currentInstruction[1].u.operand, currentInstruction[2].u.operand, currentInstruction[3].u.operand, OperandTypes::fromInt(currentInstruction[4].u.operand)); 1347 NEXT_OPCODE(op_sub); 1467 1348 } 1468 1349 case op_rshift: { 1469 unsigned src2 = instruction[i +3].u.operand;1350 unsigned src2 = currentInstruction[3].u.operand; 1470 1351 linkSlowCase(iter); 1471 1352 if (getConstantImmediateNumericArg(src2)) … … 1477 1358 1478 1359 emitPutCTIArg(X86::eax, 0); 1479 emitCTICall(i, Interpreter::cti_op_rshift); 1480 emitPutVirtualRegister(instruction[i + 1].u.operand); 1481 i += OPCODE_LENGTH(op_rshift); 1482 break; 1360 emitCTICall(Interpreter::cti_op_rshift); 1361 emitPutVirtualRegister(currentInstruction[1].u.operand); 1362 NEXT_OPCODE(op_rshift); 1483 1363 } 1484 1364 case op_lshift: { … … 1486 1366 Jump notImm2 = getSlowCase(iter); 1487 1367 linkSlowCase(iter); 1488 emitGetVirtualRegisters( instruction[i + 2].u.operand, X86::eax, instruction[i + 3].u.operand, X86::ecx, i);1368 emitGetVirtualRegisters(currentInstruction[2].u.operand, X86::eax, currentInstruction[3].u.operand, X86::ecx); 1489 1369 notImm1.link(this); 1490 1370 notImm2.link(this); 1491 1371 emitPutCTIArg(X86::eax, 0); 1492 1372 emitPutCTIArg(X86::ecx, 4); 1493 emitCTICall(i, Interpreter::cti_op_lshift); 1494 emitPutVirtualRegister(instruction[i + 1].u.operand); 1495 i += OPCODE_LENGTH(op_lshift); 1496 break; 1373 emitCTICall(Interpreter::cti_op_lshift); 1374 emitPutVirtualRegister(currentInstruction[1].u.operand); 1375 NEXT_OPCODE(op_lshift); 1497 1376 } 1498 1377 case op_loop_if_less: { 1499 unsigned target = instruction[i +3].u.operand;1500 JSValue* src2imm = getConstantImmediateNumericArg( instruction[i +2].u.operand);1378 unsigned target = currentInstruction[3].u.operand; 1379 JSValue* src2imm = getConstantImmediateNumericArg(currentInstruction[2].u.operand); 1501 1380 if (src2imm) { 1502 1381 linkSlowCase(iter); 1503 1382 emitPutCTIArg(X86::eax, 0); 1504 emitPutCTIArgFromVirtualRegister( instruction[i +2].u.operand, 4, X86::ecx);1505 emitCTICall( i,Interpreter::cti_op_loop_if_less);1506 __ link(jnz32(X86::eax), m_labels[i + 3 + target]);1383 emitPutCTIArgFromVirtualRegister(currentInstruction[2].u.operand, 4, X86::ecx); 1384 emitCTICall(Interpreter::cti_op_loop_if_less); 1385 emitJumpSlowToHot(jnz32(X86::eax), target + 3); 1507 1386 } else { 1508 1387 linkSlowCase(iter); … … 1510 1389 emitPutCTIArg(X86::eax, 0); 1511 1390 emitPutCTIArg(X86::edx, 4); 1512 emitCTICall( i,Interpreter::cti_op_loop_if_less);1513 __ link(jnz32(X86::eax), m_labels[i + 3 + target]);1391 emitCTICall(Interpreter::cti_op_loop_if_less); 1392 emitJumpSlowToHot(jnz32(X86::eax), target + 3); 1514 1393 } 1515 i += OPCODE_LENGTH(op_loop_if_less); 1516 break; 1394 NEXT_OPCODE(op_loop_if_less); 1517 1395 } 1518 1396 case op_put_by_id: { 1519 compilePutByIdSlowCase(instruction[i + 1].u.operand, &(m_codeBlock->identifier(instruction[i + 2].u.operand)), instruction[i + 3].u.operand, i, iter, propertyAccessInstructionIndex++); 1520 i += OPCODE_LENGTH(op_put_by_id); 1521 break; 1397 compilePutByIdSlowCase(currentInstruction[1].u.operand, &(m_codeBlock->identifier(currentInstruction[2].u.operand)), currentInstruction[3].u.operand, iter, propertyAccessInstructionIndex++); 1398 NEXT_OPCODE(op_put_by_id); 1522 1399 } 1523 1400 case op_get_by_id: { 1524 compileGetByIdSlowCase(instruction[i + 1].u.operand, instruction[i + 2].u.operand, &(m_codeBlock->identifier(instruction[i + 3].u.operand)), i, iter, propertyAccessInstructionIndex++); 1525 i += OPCODE_LENGTH(op_get_by_id); 1526 break; 1401 compileGetByIdSlowCase(currentInstruction[1].u.operand, currentInstruction[2].u.operand, &(m_codeBlock->identifier(currentInstruction[3].u.operand)), iter, propertyAccessInstructionIndex++); 1402 NEXT_OPCODE(op_get_by_id); 1527 1403 } 1528 1404 case op_loop_if_lesseq: { 1529 unsigned target = instruction[i +3].u.operand;1530 JSValue* src2imm = getConstantImmediateNumericArg( instruction[i +2].u.operand);1405 unsigned target = currentInstruction[3].u.operand; 1406 JSValue* src2imm = getConstantImmediateNumericArg(currentInstruction[2].u.operand); 1531 1407 if (src2imm) { 1532 1408 linkSlowCase(iter); 1533 1409 emitPutCTIArg(X86::eax, 0); 1534 emitPutCTIArgFromVirtualRegister( instruction[i +2].u.operand, 4, X86::ecx);1535 emitCTICall( i,Interpreter::cti_op_loop_if_lesseq);1536 __ link(jnz32(X86::eax), m_labels[i + 3 + target]);1410 emitPutCTIArgFromVirtualRegister(currentInstruction[2].u.operand, 4, X86::ecx); 1411 emitCTICall(Interpreter::cti_op_loop_if_lesseq); 1412 emitJumpSlowToHot(jnz32(X86::eax), target + 3); 1537 1413 } else { 1538 1414 linkSlowCase(iter); … … 1540 1416 emitPutCTIArg(X86::eax, 0); 1541 1417 emitPutCTIArg(X86::edx, 4); 1542 emitCTICall( i,Interpreter::cti_op_loop_if_lesseq);1543 __ link(jnz32(X86::eax), m_labels[i + 3 + target]);1418 emitCTICall(Interpreter::cti_op_loop_if_lesseq); 1419 emitJumpSlowToHot(jnz32(X86::eax), target + 3); 1544 1420 } 1545 i += OPCODE_LENGTH(op_loop_if_lesseq); 1546 break; 1421 NEXT_OPCODE(op_loop_if_lesseq); 1547 1422 } 1548 1423 case op_pre_inc: { 1549 unsigned srcDst = instruction[i +1].u.operand;1424 unsigned srcDst = currentInstruction[1].u.operand; 1550 1425 Jump notImm = getSlowCase(iter); 1551 1426 linkSlowCase(iter); … … 1553 1428 notImm.link(this); 1554 1429 emitPutCTIArg(X86::eax, 0); 1555 emitCTICall( i,Interpreter::cti_op_pre_inc);1430 emitCTICall(Interpreter::cti_op_pre_inc); 1556 1431 emitPutVirtualRegister(srcDst); 1557 i += OPCODE_LENGTH(op_pre_inc); 1558 break; 1432 NEXT_OPCODE(op_pre_inc); 1559 1433 } 1560 1434 case op_put_by_val: { … … 1565 1439 emitFastArithIntToImmNoCheck(X86::edx); 1566 1440 notImm.link(this); 1567 emitGetVirtualRegister( instruction[i + 3].u.operand, X86::ecx, i);1441 emitGetVirtualRegister(currentInstruction[3].u.operand, X86::ecx); 1568 1442 emitPutCTIArg(X86::eax, 0); 1569 1443 emitPutCTIArg(X86::edx, 4); 1570 1444 emitPutCTIArg(X86::ecx, 8); 1571 emitCTICall( i,Interpreter::cti_op_put_by_val);1572 __ link(jump(), m_labels[i + 4]);1445 emitCTICall(Interpreter::cti_op_put_by_val); 1446 emitJumpSlowToHot(jump(), OPCODE_LENGTH(op_put_by_val)); 1573 1447 1574 1448 // slow cases for immediate int accesses to arrays 1575 1449 linkSlowCase(iter); 1576 1450 linkSlowCase(iter); 1577 emitGetVirtualRegister( instruction[i + 3].u.operand, X86::ecx, i);1451 emitGetVirtualRegister(currentInstruction[3].u.operand, X86::ecx); 1578 1452 emitPutCTIArg(X86::eax, 0); 1579 1453 emitPutCTIArg(X86::edx, 4); 1580 1454 emitPutCTIArg(X86::ecx, 8); 1581 emitCTICall(i, Interpreter::cti_op_put_by_val_array); 1582 1583 i += OPCODE_LENGTH(op_put_by_val); 1584 break; 1455 emitCTICall(Interpreter::cti_op_put_by_val_array); 1456 1457 NEXT_OPCODE(op_put_by_val); 1585 1458 } 1586 1459 case op_loop_if_true: { 1587 1460 linkSlowCase(iter); 1588 1461 emitPutCTIArg(X86::eax, 0); 1589 emitCTICall(i, Interpreter::cti_op_jtrue); 1590 unsigned target = instruction[i + 2].u.operand; 1591 __ link(jnz32(X86::eax), m_labels[i + 2 + target]); 1592 i += OPCODE_LENGTH(op_loop_if_true); 1593 break; 1462 emitCTICall(Interpreter::cti_op_jtrue); 1463 unsigned target = currentInstruction[2].u.operand; 1464 emitJumpSlowToHot(jnz32(X86::eax), target + 2); 1465 NEXT_OPCODE(op_loop_if_true); 1594 1466 } 1595 1467 case op_pre_dec: { 1596 unsigned srcDst = instruction[i +1].u.operand;1468 unsigned srcDst = currentInstruction[1].u.operand; 1597 1469 Jump notImm = getSlowCase(iter); 1598 1470 linkSlowCase(iter); … … 1600 1472 notImm.link(this); 1601 1473 emitPutCTIArg(X86::eax, 0); 1602 emitCTICall( i,Interpreter::cti_op_pre_dec);1474 emitCTICall(Interpreter::cti_op_pre_dec); 1603 1475 emitPutVirtualRegister(srcDst); 1604 i += OPCODE_LENGTH(op_pre_dec); 1605 break; 1476 NEXT_OPCODE(op_pre_dec); 1606 1477 } 1607 1478 case op_jnless: { 1608 unsigned target = instruction[i +3].u.operand;1609 JSValue* src2imm = getConstantImmediateNumericArg( instruction[i +2].u.operand);1479 unsigned target = currentInstruction[3].u.operand; 1480 JSValue* src2imm = getConstantImmediateNumericArg(currentInstruction[2].u.operand); 1610 1481 if (src2imm) { 1611 1482 linkSlowCase(iter); 1612 1483 emitPutCTIArg(X86::edx, 0); 1613 emitPutCTIArgFromVirtualRegister( instruction[i +2].u.operand, 4, X86::ecx);1614 emitCTICall( i,Interpreter::cti_op_jless);1615 __ link(jz32(X86::eax), m_labels[i + 3 + target]);1484 emitPutCTIArgFromVirtualRegister(currentInstruction[2].u.operand, 4, X86::ecx); 1485 emitCTICall(Interpreter::cti_op_jless); 1486 emitJumpSlowToHot(jz32(X86::eax), target + 3); 1616 1487 } else { 1617 1488 linkSlowCase(iter); … … 1619 1490 emitPutCTIArg(X86::eax, 0); 1620 1491 emitPutCTIArg(X86::edx, 4); 1621 emitCTICall( i,Interpreter::cti_op_jless);1622 __ link(jz32(X86::eax), m_labels[i + 3 + target]);1492 emitCTICall(Interpreter::cti_op_jless); 1493 emitJumpSlowToHot(jz32(X86::eax), target + 3); 1623 1494 } 1624 i += OPCODE_LENGTH(op_jnless); 1625 break; 1495 NEXT_OPCODE(op_jnless); 1626 1496 } 1627 1497 case op_not: { … … 1629 1499 xor32(Imm32(JSImmediate::FullTagTypeBool), X86::eax); 1630 1500 emitPutCTIArg(X86::eax, 0); 1631 emitCTICall(i, Interpreter::cti_op_not); 1632 emitPutVirtualRegister(instruction[i + 1].u.operand); 1633 i += OPCODE_LENGTH(op_not); 1634 break; 1501 emitCTICall(Interpreter::cti_op_not); 1502 emitPutVirtualRegister(currentInstruction[1].u.operand); 1503 NEXT_OPCODE(op_not); 1635 1504 } 1636 1505 case op_jfalse: { 1637 1506 linkSlowCase(iter); 1638 1507 emitPutCTIArg(X86::eax, 0); 1639 emitCTICall(i, Interpreter::cti_op_jtrue); 1640 unsigned target = instruction[i + 2].u.operand; 1641 __ link(jz32(X86::eax), m_labels[i + 2 + target]); // inverted! 1642 i += OPCODE_LENGTH(op_jfalse); 1643 break; 1508 emitCTICall(Interpreter::cti_op_jtrue); 1509 unsigned target = currentInstruction[2].u.operand; 1510 emitJumpSlowToHot(jz32(X86::eax), target + 2); // inverted! 1511 NEXT_OPCODE(op_jfalse); 1644 1512 } 1645 1513 case op_post_inc: { 1646 unsigned srcDst = instruction[i +2].u.operand;1647 linkSlowCase(iter); 1648 linkSlowCase(iter); 1649 emitPutCTIArg(X86::eax, 0); 1650 emitCTICall( i,Interpreter::cti_op_post_inc);1514 unsigned srcDst = currentInstruction[2].u.operand; 1515 linkSlowCase(iter); 1516 linkSlowCase(iter); 1517 emitPutCTIArg(X86::eax, 0); 1518 emitCTICall(Interpreter::cti_op_post_inc); 1651 1519 emitPutVirtualRegister(srcDst, X86::edx); 1652 emitPutVirtualRegister(instruction[i + 1].u.operand); 1653 i += OPCODE_LENGTH(op_post_inc); 1654 break; 1520 emitPutVirtualRegister(currentInstruction[1].u.operand); 1521 NEXT_OPCODE(op_post_inc); 1655 1522 } 1656 1523 case op_bitnot: { 1657 1524 linkSlowCase(iter); 1658 1525 emitPutCTIArg(X86::eax, 0); 1659 emitCTICall(i, Interpreter::cti_op_bitnot); 1660 emitPutVirtualRegister(instruction[i + 1].u.operand); 1661 i += OPCODE_LENGTH(op_bitnot); 1662 break; 1526 emitCTICall(Interpreter::cti_op_bitnot); 1527 emitPutVirtualRegister(currentInstruction[1].u.operand); 1528 NEXT_OPCODE(op_bitnot); 1663 1529 } 1664 1530 case op_bitand: { 1665 1531 linkSlowCase(iter); 1666 unsigned src1 = instruction[i +2].u.operand;1667 unsigned src2 = instruction[i +3].u.operand;1668 unsigned dst = instruction[i +1].u.operand;1532 unsigned src1 = currentInstruction[2].u.operand; 1533 unsigned src2 = currentInstruction[3].u.operand; 1534 unsigned dst = currentInstruction[1].u.operand; 1669 1535 if (getConstantImmediateNumericArg(src1)) { 1670 1536 emitPutCTIArgFromVirtualRegister(src1, 0, X86::ecx); 1671 1537 emitPutCTIArg(X86::eax, 4); 1672 emitCTICall( i,Interpreter::cti_op_bitand);1538 emitCTICall(Interpreter::cti_op_bitand); 1673 1539 emitPutVirtualRegister(dst); 1674 1540 } else if (getConstantImmediateNumericArg(src2)) { 1675 1541 emitPutCTIArg(X86::eax, 0); 1676 1542 emitPutCTIArgFromVirtualRegister(src2, 4, X86::ecx); 1677 emitCTICall( i,Interpreter::cti_op_bitand);1543 emitCTICall(Interpreter::cti_op_bitand); 1678 1544 emitPutVirtualRegister(dst); 1679 1545 } else { 1680 1546 emitPutCTIArgFromVirtualRegister(src1, 0, X86::ecx); 1681 1547 emitPutCTIArg(X86::edx, 4); 1682 emitCTICall( i,Interpreter::cti_op_bitand);1548 emitCTICall(Interpreter::cti_op_bitand); 1683 1549 emitPutVirtualRegister(dst); 1684 1550 } 1685 i += OPCODE_LENGTH(op_bitand); 1686 break; 1551 NEXT_OPCODE(op_bitand); 1687 1552 } 1688 1553 case op_jtrue: { 1689 1554 linkSlowCase(iter); 1690 1555 emitPutCTIArg(X86::eax, 0); 1691 emitCTICall(i, Interpreter::cti_op_jtrue); 1692 unsigned target = instruction[i + 2].u.operand; 1693 __ link(jnz32(X86::eax), m_labels[i + 2 + target]); 1694 i += OPCODE_LENGTH(op_jtrue); 1695 break; 1556 emitCTICall(Interpreter::cti_op_jtrue); 1557 unsigned target = currentInstruction[2].u.operand; 1558 emitJumpSlowToHot(jnz32(X86::eax), target + 2); 1559 NEXT_OPCODE(op_jtrue); 1696 1560 } 1697 1561 case op_post_dec: { 1698 unsigned srcDst = instruction[i +2].u.operand;1699 linkSlowCase(iter); 1700 linkSlowCase(iter); 1701 emitPutCTIArg(X86::eax, 0); 1702 emitCTICall( i,Interpreter::cti_op_post_dec);1562 unsigned srcDst = currentInstruction[2].u.operand; 1563 linkSlowCase(iter); 1564 linkSlowCase(iter); 1565 emitPutCTIArg(X86::eax, 0); 1566 emitCTICall(Interpreter::cti_op_post_dec); 1703 1567 emitPutVirtualRegister(srcDst, X86::edx); 1704 emitPutVirtualRegister(instruction[i + 1].u.operand); 1705 i += OPCODE_LENGTH(op_post_dec); 1706 break; 1568 emitPutVirtualRegister(currentInstruction[1].u.operand); 1569 NEXT_OPCODE(op_post_dec); 1707 1570 } 1708 1571 case op_bitxor: { … … 1710 1573 emitPutCTIArg(X86::eax, 0); 1711 1574 emitPutCTIArg(X86::edx, 4); 1712 emitCTICall(i, Interpreter::cti_op_bitxor); 1713 emitPutVirtualRegister(instruction[i + 1].u.operand); 1714 i += OPCODE_LENGTH(op_bitxor); 1715 break; 1575 emitCTICall(Interpreter::cti_op_bitxor); 1576 emitPutVirtualRegister(currentInstruction[1].u.operand); 1577 NEXT_OPCODE(op_bitxor); 1716 1578 } 1717 1579 case op_bitor: { … … 1719 1581 emitPutCTIArg(X86::eax, 0); 1720 1582 emitPutCTIArg(X86::edx, 4); 1721 emitCTICall(i, Interpreter::cti_op_bitor); 1722 emitPutVirtualRegister(instruction[i + 1].u.operand); 1723 i += OPCODE_LENGTH(op_bitor); 1724 break; 1583 emitCTICall(Interpreter::cti_op_bitor); 1584 emitPutVirtualRegister(currentInstruction[1].u.operand); 1585 NEXT_OPCODE(op_bitor); 1725 1586 } 1726 1587 case op_eq: { … … 1728 1589 emitPutCTIArg(X86::eax, 0); 1729 1590 emitPutCTIArg(X86::edx, 4); 1730 emitCTICall(i, Interpreter::cti_op_eq); 1731 emitPutVirtualRegister(instruction[i + 1].u.operand); 1732 i += OPCODE_LENGTH(op_eq); 1733 break; 1591 emitCTICall(Interpreter::cti_op_eq); 1592 emitPutVirtualRegister(currentInstruction[1].u.operand); 1593 NEXT_OPCODE(op_eq); 1734 1594 } 1735 1595 case op_neq: { … … 1737 1597 emitPutCTIArg(X86::eax, 0); 1738 1598 emitPutCTIArg(X86::edx, 4); 1739 emitCTICall(i, Interpreter::cti_op_neq); 1740 emitPutVirtualRegister(instruction[i + 1].u.operand); 1741 i += OPCODE_LENGTH(op_neq); 1742 break; 1599 emitCTICall(Interpreter::cti_op_neq); 1600 emitPutVirtualRegister(currentInstruction[1].u.operand); 1601 NEXT_OPCODE(op_neq); 1743 1602 } 1744 1603 case op_stricteq: { … … 1748 1607 emitPutCTIArg(X86::eax, 0); 1749 1608 emitPutCTIArg(X86::edx, 4); 1750 emitCTICall(i, Interpreter::cti_op_stricteq); 1751 emitPutVirtualRegister(instruction[i + 1].u.operand); 1752 i += OPCODE_LENGTH(op_stricteq); 1753 break; 1609 emitCTICall(Interpreter::cti_op_stricteq); 1610 emitPutVirtualRegister(currentInstruction[1].u.operand); 1611 NEXT_OPCODE(op_stricteq); 1754 1612 } 1755 1613 case op_nstricteq: { … … 1759 1617 emitPutCTIArg(X86::eax, 0); 1760 1618 emitPutCTIArg(X86::edx, 4); 1761 emitCTICall(i, Interpreter::cti_op_nstricteq); 1762 emitPutVirtualRegister(instruction[i + 1].u.operand); 1763 i += OPCODE_LENGTH(op_nstricteq); 1764 break; 1619 emitCTICall(Interpreter::cti_op_nstricteq); 1620 emitPutVirtualRegister(currentInstruction[1].u.operand); 1621 NEXT_OPCODE(op_nstricteq); 1765 1622 } 1766 1623 case op_instanceof: { … … 1768 1625 linkSlowCase(iter); 1769 1626 linkSlowCase(iter); 1770 emitPutCTIArgFromVirtualRegister(instruction[i + 2].u.operand, 0, X86::ecx); 1771 emitPutCTIArgFromVirtualRegister(instruction[i + 3].u.operand, 4, X86::ecx); 1772 emitPutCTIArgFromVirtualRegister(instruction[i + 4].u.operand, 8, X86::ecx); 1773 emitCTICall(i, Interpreter::cti_op_instanceof); 1774 emitPutVirtualRegister(instruction[i + 1].u.operand); 1775 i += OPCODE_LENGTH(op_instanceof); 1776 break; 1627 emitPutCTIArgFromVirtualRegister(currentInstruction[2].u.operand, 0, X86::ecx); 1628 emitPutCTIArgFromVirtualRegister(currentInstruction[3].u.operand, 4, X86::ecx); 1629 emitPutCTIArgFromVirtualRegister(currentInstruction[4].u.operand, 8, X86::ecx); 1630 emitCTICall(Interpreter::cti_op_instanceof); 1631 emitPutVirtualRegister(currentInstruction[1].u.operand); 1632 NEXT_OPCODE(op_instanceof); 1777 1633 } 1778 1634 case op_mod: { … … 1786 1642 emitPutCTIArg(X86::eax, 0); 1787 1643 emitPutCTIArg(X86::ecx, 4); 1788 emitCTICall(i, Interpreter::cti_op_mod); 1789 emitPutVirtualRegister(instruction[i + 1].u.operand); 1790 i += OPCODE_LENGTH(op_mod); 1791 break; 1644 emitCTICall(Interpreter::cti_op_mod); 1645 emitPutVirtualRegister(currentInstruction[1].u.operand); 1646 NEXT_OPCODE(op_mod); 1792 1647 } 1793 1648 case op_mul: { 1794 int dst = instruction[i +1].u.operand;1795 int src1 = instruction[i +2].u.operand;1796 int src2 = instruction[i +3].u.operand;1649 int dst = currentInstruction[1].u.operand; 1650 int src1 = currentInstruction[2].u.operand; 1651 int src2 = currentInstruction[3].u.operand; 1797 1652 JSValue* src1Value = getConstantImmediateNumericArg(src1); 1798 1653 JSValue* src2Value = getConstantImmediateNumericArg(src2); … … 1804 1659 emitPutCTIArgFromVirtualRegister(src1, 0, X86::ecx); 1805 1660 emitPutCTIArgFromVirtualRegister(src2, 4, X86::ecx); 1806 emitCTICall( i,Interpreter::cti_op_mul);1661 emitCTICall(Interpreter::cti_op_mul); 1807 1662 emitPutVirtualRegister(dst); 1808 1663 } else if (src2Value && ((value = JSImmediate::intValue(src2Value)) > 0)) { … … 1812 1667 emitPutCTIArgFromVirtualRegister(src1, 0, X86::ecx); 1813 1668 emitPutCTIArgFromVirtualRegister(src2, 4, X86::ecx); 1814 emitCTICall( i,Interpreter::cti_op_mul);1669 emitCTICall(Interpreter::cti_op_mul); 1815 1670 emitPutVirtualRegister(dst); 1816 1671 } else 1817 compileBinaryArithOpSlowCase(op_mul, iter, dst, src1, src2, OperandTypes::fromInt(instruction[i + 4].u.operand), i); 1818 i += OPCODE_LENGTH(op_mul); 1819 break; 1820 } 1821 1822 case op_call: 1823 case op_call_eval: 1672 compileBinaryArithOpSlowCase(op_mul, iter, dst, src1, src2, OperandTypes::fromInt(currentInstruction[4].u.operand)); 1673 NEXT_OPCODE(op_mul); 1674 } 1675 1676 case op_call: { 1677 compileOpCallSlowCase(currentInstruction, iter, callLinkInfoIndex++, opcodeID); 1678 NEXT_OPCODE(op_call); 1679 } 1680 case op_call_eval: { 1681 compileOpCallSlowCase(currentInstruction, iter, callLinkInfoIndex++, opcodeID); 1682 NEXT_OPCODE(op_call_eval); 1683 } 1824 1684 case op_construct: { 1825 compileOpCallSlowCase(instruction + i, i, iter, callLinkInfoIndex++, opcodeID); 1826 i += (opcodeID == op_construct ? OPCODE_LENGTH(op_construct) : OPCODE_LENGTH(op_call)); 1827 break; 1685 compileOpCallSlowCase(currentInstruction, iter, callLinkInfoIndex++, opcodeID); 1686 NEXT_OPCODE(op_construct); 1828 1687 } 1829 1688 case op_to_jsnumber: { 1830 linkSlowCaseIfNotJSCell(iter, instruction[i + 2].u.operand); 1831 linkSlowCase(iter); 1832 1833 emitPutCTIArg(X86::eax, 0); 1834 emitCTICall(i, Interpreter::cti_op_to_jsnumber); 1835 1836 emitPutVirtualRegister(instruction[i + 1].u.operand); 1837 i += OPCODE_LENGTH(op_to_jsnumber); 1838 break; 1689 linkSlowCaseIfNotJSCell(iter, currentInstruction[2].u.operand); 1690 linkSlowCase(iter); 1691 1692 emitPutCTIArg(X86::eax, 0); 1693 emitCTICall(Interpreter::cti_op_to_jsnumber); 1694 1695 emitPutVirtualRegister(currentInstruction[1].u.operand); 1696 NEXT_OPCODE(op_to_jsnumber); 1839 1697 } 1840 1698 1841 1699 default: 1842 1700 ASSERT_NOT_REACHED(); 1843 break;1844 1701 } 1845 1702 … … 1847 1704 ASSERT_WITH_MESSAGE(firstTo == (iter - 1)->to, "Too many jumps linked in slow case codegen."); 1848 1705 1849 __ link(jump(), m_labels[i]);1706 emitJumpSlowToHot(jump(), 0); 1850 1707 } 1851 1708 1709 #if ENABLE(JIT_OPTIMIZE_PROPERTY_ACCESS) 1852 1710 ASSERT(propertyAccessInstructionIndex == m_codeBlock->numberOfStructureStubInfos()); 1711 #endif 1853 1712 ASSERT(callLinkInfoIndex == m_codeBlock->numberOfCallLinkInfos()); 1713 1714 #ifndef NDEBUG 1715 // reset this, in order to guard it's use with asserts 1716 m_bytecodeIndex = -1; 1717 #endif 1854 1718 } 1855 1719 … … 1885 1749 if (m_codeBlock->codeType() == FunctionCode) { 1886 1750 slowRegisterFileCheck.link(this); 1887 emitCTICall(0, Interpreter::cti_register_file_check); 1751 m_bytecodeIndex = 0; // emitCTICall will add to the map, but doesn't actually need this... 1752 emitCTICall(Interpreter::cti_register_file_check); 1753 #ifndef NDEBUG 1754 // reset this, in order to guard it's use with asserts 1755 m_bytecodeIndex = -1; 1756 #endif 1888 1757 jump(afterRegisterFileCheck); 1889 1758 }
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