Ignore:
Timestamp:
Dec 16, 2008, 4:03:34 PM (16 years ago)
Author:
[email protected]
Message:

2008-12-16 Gavin Barraclough <​[email protected]>

Reviewed by Cameron Zwarich.

Make the JIT compile on x86-64.
This largely involves populting the missing calls in MacroAssembler.h.
In addition some reinterpret_casts need removing from the JIT, and the
repatching property access code will need to be fully compiled out for
now. The changes in interpret.cpp are to reorder the functions so that
the _generic forms come before all other property access methods, and
then to place all property access methods other than the generic forms
under control of the ENABLE_JIT_OPTIMIZE_PROPERTY_ACCESS macro.

No performance impact.

  • assembler/AssemblerBuffer.h: (JSC::AssemblerBuffer::putInt64Unchecked):
  • assembler/MacroAssembler.h: (JSC::MacroAssembler::loadPtr): (JSC::MacroAssembler::load32): (JSC::MacroAssembler::storePtr): (JSC::MacroAssembler::storePtrWithRepatch): (JSC::MacroAssembler::store32): (JSC::MacroAssembler::poke): (JSC::MacroAssembler::move): (JSC::MacroAssembler::testImm64): (JSC::MacroAssembler::jePtr): (JSC::MacroAssembler::jnePtr): (JSC::MacroAssembler::jnzPtr): (JSC::MacroAssembler::jzPtr):
  • assembler/X86Assembler.h: (JSC::X86Assembler::): (JSC::X86Assembler::cmpq_rr): (JSC::X86Assembler::cmpq_rm): (JSC::X86Assembler::cmpq_im): (JSC::X86Assembler::testq_i32m): (JSC::X86Assembler::movl_mEAX): (JSC::X86Assembler::movl_i32r): (JSC::X86Assembler::movl_EAXm): (JSC::X86Assembler::movq_rm): (JSC::X86Assembler::movq_mEAX): (JSC::X86Assembler::movq_mr): (JSC::X86Assembler::movq_i64r): (JSC::X86Assembler::movl_mr): (JSC::X86Assembler::X86InstructionFormatter::oneByteOp64): (JSC::X86Assembler::X86InstructionFormatter::immediate64):
  • interpreter/Interpreter.cpp: (JSC::Interpreter::cti_op_put_by_id_generic): (JSC::Interpreter::cti_op_get_by_id_generic): (JSC::Interpreter::cti_op_put_by_id): (JSC::Interpreter::cti_op_put_by_id_second):
  • jit/JIT.cpp: (JSC::JIT::privateCompileMainPass): (JSC::JIT::privateCompile): (JSC::JIT::privateCompileCTIMachineTrampolines):
  • jit/JITCall.cpp: (JSC::JIT::compileOpCallSetupArgs): (JSC::JIT::compileOpCall):
  • jit/JITPropertyAccess.cpp: (JSC::JIT::compileGetByIdHotPath): (JSC::JIT::compilePutByIdHotPath):
  • runtime/JSImmediate.h: (JSC::JSImmediate::makeInt):
File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/JavaScriptCore/assembler/MacroAssembler.h

    r39316 r39342  
    3939    X86Assembler m_assembler;
    4040
     41#if PLATFORM(X86_64)
     42    static const X86::RegisterID scratchRegister = X86::r11;
     43#endif
     44
    4145public:
    4246    typedef X86::RegisterID RegisterID;
    … …  
    522526        m_assembler.movq_mr(address.offset, address.base, dest);
    523527#else
    524     load32(address, dest);
    525 #endif
    526     }
    527 
    528 #if !PLATFORM(X86_64)
     528        load32(address, dest);
     529#endif
     530    }
     531
    529532    void loadPtr(BaseIndex address, RegisterID dest)
    530533    {
     534#if PLATFORM(X86_64)
     535        m_assembler.movq_mr(address.offset, address.base, address.index, address.scale, dest);
     536#else
    531537        load32(address, dest);
     538#endif
    532539    }
    533540
    534541    void loadPtr(void* address, RegisterID dest)
    535542    {
     543#if PLATFORM(X86_64)
     544        if (dest == X86::eax)
     545            m_assembler.movq_mEAX(address);
     546        else {
     547            move(X86::eax, dest);
     548            m_assembler.movq_mEAX(address);
     549            swap(X86::eax, dest);
     550        }
     551#else
    536552        load32(address, dest);
    537     }
    538 #endif
     553#endif
     554    }
    539555
    540556    void load32(ImplicitAddress address, RegisterID dest)
    … …  
    548564    }
    549565
    550 #if !PLATFORM(X86_64)
    551566    void load32(void* address, RegisterID dest)
    552567    {
     568#if PLATFORM(X86_64)
     569        if (dest == X86::eax)
     570            m_assembler.movl_mEAX(address);
     571        else {
     572            move(X86::eax, dest);
     573            m_assembler.movl_mEAX(address);
     574            swap(X86::eax, dest);
     575        }
     576#else
    553577        m_assembler.movl_mr(address, dest);
    554     }
    555 #endif
     578#endif
     579    }
    556580
    557581    void load16(BaseIndex address, RegisterID dest)
    … …  
    565589        m_assembler.movq_rm(src, address.offset, address.base);
    566590#else
    567         m_assembler.movl_rm(src, address.offset, address.base);
    568 #endif
    569     }
    570    
    571 #if !PLATFORM(X86_64)
     591        store32(src, address);
     592#endif
     593    }
     594
     595    void storePtr(RegisterID src, BaseIndex address)
     596    {
     597#if PLATFORM(X86_64)
     598        m_assembler.movq_rm(src, address.offset, address.base, address.index, address.scale);
     599#else
     600        store32(src, address);
     601#endif
     602    }
     603
    572604    void storePtr(ImmPtr imm, ImplicitAddress address)
    573605    {
     606#if PLATFORM(X86_64)
     607        move(imm, scratchRegister);
     608        storePtr(scratchRegister, address);
     609#else
    574610        m_assembler.movl_i32m(reinterpret_cast<unsigned>(imm.m_value), address.offset, address.base);
    575     }
    576 
    577     void storePtr(RegisterID src, BaseIndex address)
    578     {
    579         store32(src, address);
     611#endif
    580612    }
    581613
    582614    DataLabelPtr storePtrWithRepatch(Address address)
    583615    {
     616#if PLATFORM(X86_64)
     617        m_assembler.movq_i64r(0, scratchRegister);
     618        DataLabelPtr label(this);
     619        storePtr(scratchRegister, address);
     620        return label;
     621#else
    584622        m_assembler.movl_i32m(0, address.offset, address.base);
    585623        return DataLabelPtr(this);
    586     }
    587 #endif
     624#endif
     625    }
    588626
    589627    void store32(RegisterID src, ImplicitAddress address)
    … …  
    602640    }
    603641   
    604 #if !PLATFORM(X86_64)
    605642    void store32(Imm32 imm, void* address)
    606643    {
     644#if PLATFORM(X86_64)
     645        move(X86::eax, scratchRegister);
     646        move(imm, X86::eax);
     647        m_assembler.movl_EAXm(address);
     648        move(scratchRegister, X86::eax);
     649#else
    607650        m_assembler.movl_i32m(imm.m_value, address);
    608     }
    609 #endif
     651#endif
     652    }
    610653
    611654
    … …  
    648691    }
    649692
    650 #if !PLATFORM(X86_64)
    651693    void poke(ImmPtr imm, int index = 0)
    652694    {
    653695        storePtr(imm, Address(X86::esp, (index * sizeof(void *))));
    654696    }
    655 #endif
    656697
    657698    // Register move operations:
    … …  
    680721    }
    681722
    682 #if !PLATFORM(X86_64)
    683723    void move(ImmPtr imm, RegisterID dest)
    684724    {
     725#if PLATFORM(X86_64)
     726        m_assembler.movq_i64r(reinterpret_cast<int64_t>(imm.m_value), dest);
     727#else
    685728        m_assembler.movl_i32r(reinterpret_cast<int32_t>(imm.m_value), dest);
    686     }
    687 #endif
     729#endif
     730    }
    688731
    689732    void swap(RegisterID reg1, RegisterID reg2)
    … …  
    772815            m_assembler.testq_i32r(mask.m_value, reg);
    773816    }
     817
     818    void testImm64(Address address, Imm32 mask)
     819    {
     820        if (mask.m_value == -1)
     821            m_assembler.cmpq_im(0, address.offset, address.base);
     822        else
     823            m_assembler.testq_i32m(mask.m_value, address.offset, address.base);
     824    }
     825
     826    void testImm64(BaseIndex address, Imm32 mask)
     827    {
     828        if (mask.m_value == -1)
     829            m_assembler.cmpq_im(0, address.offset, address.base, address.index, address.scale);
     830        else
     831            m_assembler.testq_i32m(mask.m_value, address.offset, address.base, address.index, address.scale);
     832    }
    774833#endif
    775834
    … …  
    799858    }
    800859   
    801 #if !PLATFORM(X86_64)
    802860    Jump jePtr(RegisterID op1, RegisterID op2)
    803861    {
     862#if PLATFORM(X86_64)
     863        m_assembler.cmpq_rr(op1, op2);
     864        return Jump(m_assembler.je());
     865#else
    804866        return je32(op1, op2);
    805     }
    806 #endif
     867#endif
     868    }
    807869
    808870    Jump je32(RegisterID op1, RegisterID op2)
    … …  
    884946    }
    885947
    886 #if !PLATFORM(X86_64)
     948    Jump jnePtr(RegisterID op1, RegisterID op2)
     949    {
     950#if PLATFORM(X86_64)
     951        m_assembler.cmpq_rr(op1, op2);
     952        return Jump(m_assembler.jne());
     953#else
     954        return jne32(op1, op2);
     955#endif
     956    }
     957
    887958    Jump jnePtr(RegisterID reg, Address address)
     959    {
     960#if PLATFORM(X86_64)
     961        m_assembler.cmpq_rm(reg, address.offset, address.base);
     962#else
     963        m_assembler.cmpl_rm(reg, address.offset, address.base);
     964#endif
     965        return Jump(m_assembler.jne());
     966    }
     967
     968    Jump jnePtr(RegisterID reg, ImmPtr imm)
     969    {
     970#if PLATFORM(X86_64)
     971        move(imm, scratchRegister);
     972        return jnePtr(scratchRegister, reg);
     973#else
     974        return jne32(reg, Imm32(reinterpret_cast<int32_t>(imm.m_value)));
     975#endif
     976    }
     977
     978    Jump jnePtr(Address address, ImmPtr imm)
     979    {
     980#if PLATFORM(X86_64)
     981        move(imm, scratchRegister);
     982        return jnePtr(scratchRegister, address);
     983#else
     984        return jne32(address, Imm32(reinterpret_cast<int32_t>(imm.m_value)));
     985#endif
     986    }
     987
     988    Jump jne32(RegisterID op1, RegisterID op2)
     989    {
     990        m_assembler.cmpl_rr(op1, op2);
     991        return Jump(m_assembler.jne());
     992    }
     993
     994    Jump jne32(RegisterID reg, Imm32 imm)
     995    {
     996        compareImm32ForBranchEquality(reg, imm.m_value);
     997        return Jump(m_assembler.jne());
     998    }
     999
     1000    Jump jne32(Address address, Imm32 imm)
     1001    {
     1002        compareImm32ForBranchEquality(address, imm.m_value);
     1003        return Jump(m_assembler.jne());
     1004    }
     1005   
     1006    Jump jne32(Address address, RegisterID reg)
    8881007    {
    8891008        m_assembler.cmpl_rm(reg, address.offset, address.base);
    8901009        return Jump(m_assembler.jne());
    8911010    }
    892 
    893     Jump jnePtr(Address address, ImmPtr imm)
    894     {
    895         return jne32(address, Imm32(reinterpret_cast<int32_t>(imm.m_value)));
    896     }
    897 #endif
    898 
    899     Jump jne32(RegisterID op1, RegisterID op2)
    900     {
    901         m_assembler.cmpl_rr(op1, op2);
    902         return Jump(m_assembler.jne());
    903     }
    904 
    905     Jump jne32(RegisterID reg, Imm32 imm)
    906     {
    907         compareImm32ForBranchEquality(reg, imm.m_value);
    908         return Jump(m_assembler.jne());
    909     }
    910 
    911     Jump jne32(Address address, Imm32 imm)
    912     {
    913         compareImm32ForBranchEquality(address, imm.m_value);
    914         return Jump(m_assembler.jne());
    915     }
    916    
    917     Jump jne32(Address address, RegisterID reg)
    918     {
    919         m_assembler.cmpl_rm(reg, address.offset, address.base);
    920         return Jump(m_assembler.jne());
    921     }
    9221011   
    9231012    Jump jnzPtr(RegisterID reg, Imm32 mask = Imm32(-1))
    … …  
    9311020    }
    9321021
    933 #if !PLATFORM(X86_64)
    9341022    Jump jnzPtr(Address address, Imm32 mask = Imm32(-1))
    9351023    {
     1024#if PLATFORM(X86_64)
     1025        testImm64(address, mask);
     1026        return Jump(m_assembler.jne());
     1027#else
    9361028        return jnz32(address, mask);
    937     }
    938 #endif
     1029#endif
     1030    }
    9391031
    9401032    Jump jnz32(RegisterID reg, Imm32 mask = Imm32(-1))
    … …  
    9501042    }
    9511043
    952 #if !PLATFORM(X86_64)
    9531044    Jump jzPtr(RegisterID reg, Imm32 mask = Imm32(-1))
    9541045    {
     1046#if PLATFORM(X86_64)
     1047        testImm64(reg, mask);
     1048        return Jump(m_assembler.je());
     1049#else
    9551050        return jz32(reg, mask);
     1051#endif
    9561052    }
    9571053
    9581054    Jump jzPtr(Address address, Imm32 mask = Imm32(-1))
    9591055    {
     1056#if PLATFORM(X86_64)
     1057        testImm64(address, mask);
     1058        return Jump(m_assembler.je());
     1059#else
    9601060        return jz32(address, mask);
     1061#endif
    9611062    }
    9621063
    9631064    Jump jzPtr(BaseIndex address, Imm32 mask = Imm32(-1))
    9641065    {
     1066#if PLATFORM(X86_64)
     1067        testImm64(address, mask);
     1068        return Jump(m_assembler.je());
     1069#else
    9651070        return jz32(address, mask);
    966     }
    967 #endif
     1071#endif
     1072    }
    9681073
    9691074    Jump jz32(RegisterID reg, Imm32 mask = Imm32(-1))
    … …  
    10461151    }
    10471152
    1048 #if !PLATFORM(X86_64)
    10491153    void jzPtr(RegisterID reg, Label target)
    10501154    {
    10511155        jzPtr(reg).linkTo(target, this);
    10521156    }
    1053 #endif
    10541157
    10551158    void jump(Label target)
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