Changeset 43781 in webkit for trunk/JavaScriptCore/assembler/MacroAssemblerX86Common.h

Timestamp:

May 15, 2009, 2:11:10 PM (16 years ago)

Author:

[email protected]

Message:

2009-05-15 Gavin Barraclough <​[email protected]>

Reviewed by Oliver Hunt.

Add FP support to the MacroAssembler, port JITArithmetic over to make use of this. Also add
API to determine whether FP support is available 'MacroAssembler::supportsFloatingPoint()',
FP is presently only supported on SSE2 platforms, not x87. On platforms where a suitable
hardware FPU is not available 'supportsFloatingPoint()' may simply return false, and all
other methods ASSERT_NOT_REACHED().

• assembler/AbstractMacroAssembler.h:
• assembler/MacroAssemblerX86.h: (JSC::MacroAssemblerX86::MacroAssemblerX86): (JSC::MacroAssemblerX86::branch32): (JSC::MacroAssemblerX86::branchPtrWithPatch): (JSC::MacroAssemblerX86::supportsFloatingPoint):
• assembler/MacroAssemblerX86Common.h: (JSC::MacroAssemblerX86Common::): (JSC::MacroAssemblerX86Common::loadDouble): (JSC::MacroAssemblerX86Common::storeDouble): (JSC::MacroAssemblerX86Common::addDouble): (JSC::MacroAssemblerX86Common::subDouble): (JSC::MacroAssemblerX86Common::mulDouble): (JSC::MacroAssemblerX86Common::convertInt32ToDouble): (JSC::MacroAssemblerX86Common::branchDouble): (JSC::MacroAssemblerX86Common::branchTruncateDoubleToInt32): (JSC::MacroAssemblerX86Common::branch32): (JSC::MacroAssemblerX86Common::branch16): (JSC::MacroAssemblerX86Common::branchTest32): (JSC::MacroAssemblerX86Common::branchAdd32): (JSC::MacroAssemblerX86Common::branchMul32): (JSC::MacroAssemblerX86Common::branchSub32): (JSC::MacroAssemblerX86Common::set32): (JSC::MacroAssemblerX86Common::setTest32): (JSC::MacroAssemblerX86Common::x86Condition): (JSC::MacroAssemblerX86Common::isSSE2Present):
• assembler/MacroAssemblerX86_64.h: (JSC::MacroAssemblerX86_64::movePtrToDouble): (JSC::MacroAssemblerX86_64::moveDoubleToPtr): (JSC::MacroAssemblerX86_64::setPtr): (JSC::MacroAssemblerX86_64::branchPtr): (JSC::MacroAssemblerX86_64::branchTestPtr): (JSC::MacroAssemblerX86_64::branchAddPtr): (JSC::MacroAssemblerX86_64::branchSubPtr): (JSC::MacroAssemblerX86_64::supportsFloatingPoint):
• assembler/X86Assembler.h:
• jit/JIT.cpp: (JSC::JIT::JIT):
• jit/JIT.h:
• jit/JITArithmetic.cpp: (JSC::JIT::emit_op_rshift): (JSC::JIT::emitSlow_op_rshift): (JSC::JIT::emitSlow_op_jnless): (JSC::JIT::emitSlow_op_jnlesseq): (JSC::JIT::compileBinaryArithOp): (JSC::JIT::compileBinaryArithOpSlowCase): (JSC::JIT::emit_op_add): (JSC::JIT::emitSlow_op_add): (JSC::JIT::emit_op_mul): (JSC::JIT::emitSlow_op_mul):
• jit/JITPropertyAccess.cpp: (JSC::JIT::privateCompilePutByIdTransition):

File:

• trunk/JavaScriptCore/assembler/MacroAssemblerX86Common.h (modified) (23 diffs)

trunk/JavaScriptCore/assembler/MacroAssemblerX86Common.h

@@ -39 +39 @@
 public:
 
-    typedef X86Assembler::Condition Condition;
-    static const Condition Equal = X86Assembler::ConditionE;
-    static const Condition NotEqual = X86Assembler::ConditionNE;
-    static const Condition Above = X86Assembler::ConditionA;
-    static const Condition AboveOrEqual = X86Assembler::ConditionAE;
-    static const Condition Below = X86Assembler::ConditionB;
-    static const Condition BelowOrEqual = X86Assembler::ConditionBE;
-    static const Condition GreaterThan = X86Assembler::ConditionG;
-    static const Condition GreaterThanOrEqual = X86Assembler::ConditionGE;
-    static const Condition LessThan = X86Assembler::ConditionL;
-    static const Condition LessThanOrEqual = X86Assembler::ConditionLE;
-    static const Condition Overflow = X86Assembler::ConditionO;
-    static const Condition Zero = X86Assembler::ConditionE;
-    static const Condition NonZero = X86Assembler::ConditionNE;
+    enum Condition {
+        Equal = X86Assembler::ConditionE,
+        NotEqual = X86Assembler::ConditionNE,
+        Above = X86Assembler::ConditionA,
+        AboveOrEqual = X86Assembler::ConditionAE,
+        Below = X86Assembler::ConditionB,
+        BelowOrEqual = X86Assembler::ConditionBE,
+        GreaterThan = X86Assembler::ConditionG,
+        GreaterThanOrEqual = X86Assembler::ConditionGE,
+        LessThan = X86Assembler::ConditionL,
+        LessThanOrEqual = X86Assembler::ConditionLE,
+        Overflow = X86Assembler::ConditionO,
+        Signed = X86Assembler::ConditionS,
+        Zero = X86Assembler::ConditionE,
+        NonZero = X86Assembler::ConditionNE
+    };
+
+    enum DoubleCondition {
+        DoubleEqual = X86Assembler::ConditionE,
+        DoubleNotEqual = X86Assembler::ConditionNE,
+        DoubleGreaterThan = X86Assembler::ConditionA,
+        DoubleGreaterThanOrEqual = X86Assembler::ConditionAE,
+        DoubleLessThan = X86Assembler::ConditionB,
+        DoubleLessThanOrEqual = X86Assembler::ConditionBE,
+    };
 
     static const RegisterID stackPointerRegister = X86::esp;
@@ -261 +272 @@
         m_assembler.movl_i32m(imm.m_value, address.offset, address.base);
     }
-    
+
+
+    // Floating-point operation:
+    //
+    // Presently only supports SSE, not x87 floating point.
+
+    void loadDouble(ImplicitAddress address, FPRegisterID dest)
+    {
+        ASSERT(isSSE2Present());
+        m_assembler.movsd_mr(address.offset, address.base, dest);
+    }
+
+    void storeDouble(FPRegisterID src, ImplicitAddress address)
+    {
+        ASSERT(isSSE2Present());
+        m_assembler.movsd_rm(src, address.offset, address.base);
+    }
+
+    void addDouble(FPRegisterID src, FPRegisterID dest)
+    {
+        ASSERT(isSSE2Present());
+        m_assembler.addsd_rr(src, dest);
+    }
+
+    void addDouble(Address src, FPRegisterID dest)
+    {
+        ASSERT(isSSE2Present());
+        m_assembler.addsd_mr(src.offset, src.base, dest);
+    }
+
+    void subDouble(FPRegisterID src, FPRegisterID dest)
+    {
+        ASSERT(isSSE2Present());
+        m_assembler.subsd_rr(src, dest);
+    }
+
+    void subDouble(Address src, FPRegisterID dest)
+    {
+        ASSERT(isSSE2Present());
+        m_assembler.subsd_mr(src.offset, src.base, dest);
+    }
+
+    void mulDouble(FPRegisterID src, FPRegisterID dest)
+    {
+        ASSERT(isSSE2Present());
+        m_assembler.mulsd_rr(src, dest);
+    }
+
+    void mulDouble(Address src, FPRegisterID dest)
+    {
+        ASSERT(isSSE2Present());
+        m_assembler.mulsd_mr(src.offset, src.base, dest);
+    }
+
+    void convertInt32ToDouble(RegisterID src, FPRegisterID dest)
+    {
+        m_assembler.cvtsi2sd_rr(src, dest);
+    }
+
+    Jump branchDouble(DoubleCondition cond, FPRegisterID left, FPRegisterID right)
+    {
+        m_assembler.ucomisd_rr(right, left);
+        return Jump(m_assembler.jCC(x86Condition(cond)));
+    }
+
+    // Truncates 'src' to an integer, and places the resulting 'dest'.
+    // If the result is not representable as a 32 bit value, branch.
+    // May also branch for some values that are representable in 32 bits
+    // (specifically, in this case, INT_MIN).
+    Jump branchTruncateDoubleToInt32(FPRegisterID src, RegisterID dest)
+    {
+        m_assembler.cvttsd2si_rr(src, dest);
+        return branch32(Equal, dest, Imm32(0x80000000));
+    }
+
 
     // Stack manipulation operations:
@@ -290 +375 @@
         m_assembler.push_i32(imm.m_value);
     }
+
 
     // Register move operations:
@@ -387 +473 @@
     {
         m_assembler.cmpl_rr(right, left);
-        return Jump(m_assembler.jCC(cond));
+        return Jump(m_assembler.jCC(x86Condition(cond)));
     }
 
@@ -396 +482 @@
         else
             m_assembler.cmpl_ir(right.m_value, left);
-        return Jump(m_assembler.jCC(cond));
+        return Jump(m_assembler.jCC(x86Condition(cond)));
     }
     
@@ -402 +488 @@
     {
         m_assembler.cmpl_mr(right.offset, right.base, left);
-        return Jump(m_assembler.jCC(cond));
+        return Jump(m_assembler.jCC(x86Condition(cond)));
     }
     
@@ -408 +494 @@
     {
         m_assembler.cmpl_rm(right, left.offset, left.base);
-        return Jump(m_assembler.jCC(cond));
+        return Jump(m_assembler.jCC(x86Condition(cond)));
     }
 
@@ -414 +500 @@
     {
         m_assembler.cmpl_im(right.m_value, left.offset, left.base);
-        return Jump(m_assembler.jCC(cond));
+        return Jump(m_assembler.jCC(x86Condition(cond)));
     }
 
@@ -420 +506 @@
     {
         m_assembler.cmpl_im(right.m_value, left.offset, left.base, left.index, left.scale);
-        return Jump(m_assembler.jCC(cond));
+        return Jump(m_assembler.jCC(x86Condition(cond)));
     }
 
@@ -426 +512 @@
     {
         m_assembler.cmpw_rm(right, left.offset, left.base, left.index, left.scale);
-        return Jump(m_assembler.jCC(cond));
+        return Jump(m_assembler.jCC(x86Condition(cond)));
     }
 
@@ -434 +520 @@
 
         m_assembler.cmpw_im(right.m_value, left.offset, left.base, left.index, left.scale);
-        return Jump(m_assembler.jCC(cond));
+        return Jump(m_assembler.jCC(x86Condition(cond)));
     }
 
@@ -441 +527 @@
         ASSERT((cond == Zero) || (cond == NonZero));
         m_assembler.testl_rr(reg, mask);
-        return Jump(m_assembler.jCC(cond));
+        return Jump(m_assembler.jCC(x86Condition(cond)));
     }
 
@@ -454 +540 @@
         else
             m_assembler.testl_i32r(mask.m_value, reg);
-        return Jump(m_assembler.jCC(cond));
+        return Jump(m_assembler.jCC(x86Condition(cond)));
     }
 
@@ -464 +550 @@
         else
             m_assembler.testl_i32m(mask.m_value, address.offset, address.base);
-        return Jump(m_assembler.jCC(cond));
+        return Jump(m_assembler.jCC(x86Condition(cond)));
     }
 
@@ -474 +560 @@
         else
             m_assembler.testl_i32m(mask.m_value, address.offset, address.base, address.index, address.scale);
-        return Jump(m_assembler.jCC(cond));
+        return Jump(m_assembler.jCC(x86Condition(cond)));
     }
 
@@ -506 +592 @@
     Jump branchAdd32(Condition cond, RegisterID src, RegisterID dest)
     {
-        ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
+        ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
         add32(src, dest);
-        return Jump(m_assembler.jCC(cond));
-    }
-    
+        return Jump(m_assembler.jCC(x86Condition(cond)));
+    }
+
     Jump branchAdd32(Condition cond, Imm32 imm, RegisterID dest)
     {
         ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
         add32(imm, dest);
-        return Jump(m_assembler.jCC(cond));
+        return Jump(m_assembler.jCC(x86Condition(cond)));
     }
     
@@ -522 +608 @@
         ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
         mul32(src, dest);
-        return Jump(m_assembler.jCC(cond));
+        return Jump(m_assembler.jCC(x86Condition(cond)));
     }
     
@@ -529 +615 @@
         ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
         mul32(imm, src, dest);
-        return Jump(m_assembler.jCC(cond));
+        return Jump(m_assembler.jCC(x86Condition(cond)));
     }
     
@@ -536 +622 @@
         ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
         sub32(src, dest);
-        return Jump(m_assembler.jCC(cond));
+        return Jump(m_assembler.jCC(x86Condition(cond)));
     }
     
@@ -543 +629 @@
         ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
         sub32(imm, dest);
-        return Jump(m_assembler.jCC(cond));
+        return Jump(m_assembler.jCC(x86Condition(cond)));
     }
     
@@ -577 +663 @@
     {
         m_assembler.cmpl_rr(right, left);
-        m_assembler.setCC_r(cond, dest);
+        m_assembler.setCC_r(x86Condition(cond), dest);
         m_assembler.movzbl_rr(dest, dest);
     }
@@ -587 +673 @@
         else
             m_assembler.cmpl_ir(right.m_value, left);
-        m_assembler.setCC_r(cond, dest);
+        m_assembler.setCC_r(x86Condition(cond), dest);
         m_assembler.movzbl_rr(dest, dest);
     }
@@ -601 +687 @@
         else
             m_assembler.testl_i32m(mask.m_value, address.offset, address.base);
-        m_assembler.setCC_r(cond, dest);
+        m_assembler.setCC_r(x86Condition(cond), dest);
         m_assembler.movzbl_rr(dest, dest);
     }
+
+protected:
+    X86Assembler::Condition x86Condition(Condition cond)
+    {
+        return static_cast<X86Assembler::Condition>(cond);
+    }
+
+    X86Assembler::Condition x86Condition(DoubleCondition cond)
+    {
+        return static_cast<X86Assembler::Condition>(cond);
+    }
+
+private:
+    // Only MacroAssemblerX86 should be using the following method; SSE2 is always available on
+    // x86_64, and clients & subclasses of MacroAssembler should be using 'supportsFloatingPoint()'.
+    friend class MacroAssemblerX86;
+
+#if PLATFORM(X86_64)
+#ifndef NDEBUG
+    static bool isSSE2Present() { return true; }
+#endif
+#else
+    static bool isSSE2Present()
+    {
+#if PLATFORM(MAC)
+        // All X86 Macs are guaranteed to support at least SSE2
+        return true;
+#else
+        static const int SSE2FeatureBit = 1 << 26;
+        struct SSE2Check {
+            SSE2Check()
+            {
+                int flags;
+#if COMPILER(MSVC)
+                _asm {
+                    mov eax, 1 // cpuid function 1 gives us the standard feature set
+                    cpuid;
+                    mov flags, edx;
+                }
+#elif COMPILER(GCC)
+                asm (
+                     "movl $0x1, %%eax;"
+                     "pushl %%ebx;"
+                     "cpuid;"
+                     "popl %%ebx;"
+                     "movl %%edx, %0;"
+                     : "=g" (flags)
+                     :
+                     : "%eax", "%ecx", "%edx"
+                     );
+#else
+                flags = 0;
+#endif
+                present = (flags & SSE2FeatureBit) != 0;
+            }
+            bool present;
+        };
+        static SSE2Check check;
+        return check.present;
+#endif // !PLATFORM(MAC)
+    }
+#endif
 };