Changeset 48782 in webkit for trunk/JavaScriptCore/assembler


Ignore:
Timestamp:
Sep 25, 2009, 7:27:02 PM (16 years ago)
Author:
[email protected]
Message:

2009-09-25 Gabor Loki <[email protected]>

Reviewed by Gavin Barraclough.

Fix unaligned data access in YARR_JIT on ARMv5 and below.
https://bugs.webkit.org/show_bug.cgi?id=29695

On ARMv5 and below all data access should be naturally aligned.
In the YARR_JIT there is a case when character pairs are
loaded from the input string, but this data access is not
naturally aligned. This fix introduces load32WithUnalignedHalfWords
and branch32WithUnalignedHalfWords functions which contain
naturally aligned memory loads - half word loads - on ARMv5 and below.

  • assembler/MacroAssemblerARM.cpp: (JSC::MacroAssemblerARM::load32WithUnalignedHalfWords):
  • assembler/MacroAssemblerARM.h: (JSC::MacroAssemblerARM::load32WithUnalignedHalfWords): (JSC::MacroAssemblerARM::branch32WithUnalignedHalfWords):
  • assembler/MacroAssemblerARMv7.h: (JSC::MacroAssemblerARMv7::load32WithUnalignedHalfWords): (JSC::MacroAssemblerARMv7::branch32): (JSC::MacroAssemblerARMv7::branch32WithUnalignedHalfWords):
  • assembler/MacroAssemblerX86Common.h: (JSC::MacroAssemblerX86Common::load32WithUnalignedHalfWords): (JSC::MacroAssemblerX86Common::branch32WithUnalignedHalfWords):
  • wtf/Platform.h:
  • yarr/RegexJIT.cpp: (JSC::Yarr::RegexGenerator::generatePatternCharacterPair):
Location:
trunk/JavaScriptCore/assembler
Files:
4 edited

Legend:

Unmodified
Added
Removed
  • trunk/JavaScriptCore/assembler/MacroAssemblerARM.cpp

    r48525 r48782  
    6363const bool MacroAssemblerARM::s_isVFPPresent = isVFPPresent();
    6464
     65#if defined(ARM_REQUIRE_NATURAL_ALIGNMENT) && ARM_REQUIRE_NATURAL_ALIGNMENT
     66void MacroAssemblerARM::load32WithUnalignedHalfWords(BaseIndex address, RegisterID dest)
     67{
     68    ARMWord op2;
     69
     70    ASSERT(address.scale >= 0 && address.scale <= 3);
     71    op2 = m_assembler.lsl(address.index, static_cast<int>(address.scale));
     72
     73    if (address.offset >= 0 && address.offset + 0x2 <= 0xff) {
     74        m_assembler.add_r(ARMRegisters::S0, address.base, op2);
     75        m_assembler.ldrh_u(dest, ARMRegisters::S0, ARMAssembler::getOp2Byte(address.offset));
     76        m_assembler.ldrh_u(ARMRegisters::S0, ARMRegisters::S0, ARMAssembler::getOp2Byte(address.offset + 0x2));
     77    } else if (address.offset < 0 && address.offset >= -0xff) {
     78        m_assembler.add_r(ARMRegisters::S0, address.base, op2);
     79        m_assembler.ldrh_d(dest, ARMRegisters::S0, ARMAssembler::getOp2Byte(-address.offset));
     80        m_assembler.ldrh_d(ARMRegisters::S0, ARMRegisters::S0, ARMAssembler::getOp2Byte(-address.offset - 0x2));
     81    } else {
     82        m_assembler.ldr_un_imm(ARMRegisters::S0, address.offset);
     83        m_assembler.add_r(ARMRegisters::S0, ARMRegisters::S0, op2);
     84        m_assembler.ldrh_r(dest, address.base, ARMRegisters::S0);
     85        m_assembler.add_r(ARMRegisters::S0, ARMRegisters::S0, ARMAssembler::OP2_IMM | 0x2);
     86        m_assembler.ldrh_r(ARMRegisters::S0, address.base, ARMRegisters::S0);
     87    }
     88    m_assembler.orr_r(dest, dest, m_assembler.lsl(ARMRegisters::S0, 16));
     89}
     90#endif
     91
    6592}
    6693
  • trunk/JavaScriptCore/assembler/MacroAssemblerARM.h

    r48525 r48782  
    199199    }
    200200
     201#if defined(ARM_REQUIRE_NATURAL_ALIGNMENT) && ARM_REQUIRE_NATURAL_ALIGNMENT
     202    void load32WithUnalignedHalfWords(BaseIndex address, RegisterID dest);
     203#else
     204    void load32WithUnalignedHalfWords(BaseIndex address, RegisterID dest)
     205    {
     206        load32(address, dest);
     207    }
     208#endif
     209
    201210    DataLabel32 load32WithAddressOffsetPatch(Address address, RegisterID dest)
    202211    {
     
    362371    {
    363372        load32(left, ARMRegisters::S1);
     373        return branch32(cond, ARMRegisters::S1, right);
     374    }
     375
     376    Jump branch32WithUnalignedHalfWords(Condition cond, BaseIndex left, Imm32 right)
     377    {
     378        load32WithUnalignedHalfWords(left, ARMRegisters::S1);
    364379        return branch32(cond, ARMRegisters::S1, right);
    365380    }
  • trunk/JavaScriptCore/assembler/MacroAssemblerARMv7.h

    r48445 r48782  
    376376    }
    377377
     378    void load32WithUnalignedHalfWords(BaseIndex address, RegisterID dest)
     379    {
     380        load32(setupArmAddress(address), dest);
     381    }
     382
    378383    void load32(void* address, RegisterID dest)
    379384    {
     
    718723    }
    719724
     725    Jump branch32WithUnalignedHalfWords(Condition cond, BaseIndex left, Imm32 right)
     726    {
     727        // use addressTempRegister incase the branch32 we call uses dataTempRegister. :-/
     728        load32WithUnalignedHalfWords(left, addressTempRegister);
     729        return branch32(cond, addressTempRegister, right);
     730    }
     731
    720732    Jump branch32(Condition cond, AbsoluteAddress left, RegisterID right)
    721733    {
  • trunk/JavaScriptCore/assembler/MacroAssemblerX86Common.h

    r47834 r48782  
    307307    }
    308308
     309    void load32WithUnalignedHalfWords(BaseIndex address, RegisterID dest)
     310    {
     311        load32(address, dest);
     312    }
     313
    309314    DataLabel32 load32WithAddressOffsetPatch(Address address, RegisterID dest)
    310315    {
     
    603608        m_assembler.cmpl_im(right.m_value, left.offset, left.base, left.index, left.scale);
    604609        return Jump(m_assembler.jCC(x86Condition(cond)));
     610    }
     611
     612    Jump branch32WithUnalignedHalfWords(Condition cond, BaseIndex left, Imm32 right)
     613    {
     614        return branch32(cond, left, right);
    605615    }
    606616
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