Ignore:
Timestamp:
Nov 4, 2009, 3:59:14 PM (16 years ago)
Author:
[email protected]
Message:

https://bugs.webkit.org/show_bug.cgi?id=31104
Refactor x86-specific behaviour out of the JIT.

Patch by Gavin Barraclough <[email protected]> on 2009-11-04
Reviewed by Oliver Hunt.

  • Add explicit double branch conditions for ordered and unordered comparisons (presently the brehaviour is a mix).
  • Refactor double to int conversion out into the MacroAssembler.
  • Remove broken double to int conversion for !JSVALUE32_64 builds - this code was broken and slowing us down, fixing it showed it not to be an improvement.
  • Remove exclusion of double to int conversion from (1 % X) cases in JSVALUE32_64 builds - if this was of benefit this is no longer the case; simplify.
  • assembler/MacroAssemblerARM.h:

(JSC::MacroAssemblerARM::):

  • assembler/MacroAssemblerARMv7.h:

(JSC::MacroAssemblerARMv7::):

  • assembler/MacroAssemblerX86Common.h:

(JSC::MacroAssemblerX86Common::):
(JSC::MacroAssemblerX86Common::convertInt32ToDouble):
(JSC::MacroAssemblerX86Common::branchDouble):
(JSC::MacroAssemblerX86Common::branchConvertDoubleToInt32):

  • jit/JITArithmetic.cpp:

(JSC::JIT::emitBinaryDoubleOp):
(JSC::JIT::emit_op_div):
(JSC::JIT::emitSlow_op_jnless):
(JSC::JIT::emitSlow_op_jnlesseq):

  • jit/JITOpcodes.cpp:

(JSC::JIT::emit_op_jfalse):

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/JavaScriptCore/jit/JITArithmetic.cpp

    r49409 r50531  
    830830            case op_jnless:
    831831                emitLoadDouble(op1, fpRegT2);
    832                 addJump(branchDouble(DoubleLessThanOrEqual, fpRegT0, fpRegT2), dst);
     832                addJump(branchDouble(DoubleLessThanOrEqualOrUnordered, fpRegT0, fpRegT2), dst);
    833833                break;
    834834            case op_jnlesseq:
    835835                emitLoadDouble(op1, fpRegT2);
    836                 addJump(branchDouble(DoubleLessThan, fpRegT0, fpRegT2), dst);
     836                addJump(branchDouble(DoubleLessThanOrUnordered, fpRegT0, fpRegT2), dst);
    837837                break;
    838838            default:
     
    883883            case op_jnless:
    884884                emitLoadDouble(op2, fpRegT1);
    885                 addJump(branchDouble(DoubleLessThanOrEqual, fpRegT1, fpRegT0), dst);
     885                addJump(branchDouble(DoubleLessThanOrEqualOrUnordered, fpRegT1, fpRegT0), dst);
    886886                break;
    887887            case op_jnlesseq:
    888888                emitLoadDouble(op2, fpRegT1);
    889                 addJump(branchDouble(DoubleLessThan, fpRegT1, fpRegT0), dst);
     889                addJump(branchDouble(DoubleLessThanOrUnordered, fpRegT1, fpRegT0), dst);
    890890                break;
    891891            default:
     
    10011001
    10021002    JumpList doubleResult;
    1003     if (!isOperandConstantImmediateInt(op1) || getConstantOperand(op1).asInt32() > 1) {
    1004         m_assembler.cvttsd2si_rr(fpRegT0, regT0);
    1005         convertInt32ToDouble(regT0, fpRegT1);
    1006         m_assembler.ucomisd_rr(fpRegT1, fpRegT0);
    1007 
    1008         doubleResult.append(m_assembler.jne());
    1009         doubleResult.append(m_assembler.jp());
    1010        
    1011         doubleResult.append(branchTest32(Zero, regT0));
    1012 
    1013         // Int32 result.
    1014         emitStoreInt32(dst, regT0, (op1 == dst || op2 == dst));
    1015         end.append(jump());
    1016     }
     1003    branchConvertDoubleToInt32(fpRegT0, regT0, doubleResult, fpRegT1);
     1004
     1005    // Int32 result.
     1006    emitStoreInt32(dst, regT0, (op1 == dst || op2 == dst));
     1007    end.append(jump());
    10171008
    10181009    // Double result.
     
    13661357            convertInt32ToDouble(regT1, fpRegT1);
    13671358
    1368             emitJumpSlowToHot(branchDouble(DoubleLessThanOrEqual, fpRegT1, fpRegT0), target);
     1359            emitJumpSlowToHot(branchDouble(DoubleLessThanOrEqualOrUnordered, fpRegT1, fpRegT0), target);
    13691360
    13701361            emitJumpSlowToHot(jump(), OPCODE_LENGTH(op_jnless));
     
    14071398            convertInt32ToDouble(regT0, fpRegT0);
    14081399
    1409             emitJumpSlowToHot(branchDouble(DoubleLessThanOrEqual, fpRegT1, fpRegT0), target);
     1400            emitJumpSlowToHot(branchDouble(DoubleLessThanOrEqualOrUnordered, fpRegT1, fpRegT0), target);
    14101401
    14111402            emitJumpSlowToHot(jump(), OPCODE_LENGTH(op_jnless));
     
    14531444#endif
    14541445
    1455             emitJumpSlowToHot(branchDouble(DoubleLessThanOrEqual, fpRegT1, fpRegT0), target);
     1446            emitJumpSlowToHot(branchDouble(DoubleLessThanOrEqualOrUnordered, fpRegT1, fpRegT0), target);
    14561447
    14571448            emitJumpSlowToHot(jump(), OPCODE_LENGTH(op_jnless));
     
    15511542            convertInt32ToDouble(regT1, fpRegT1);
    15521543
    1553             emitJumpSlowToHot(branchDouble(DoubleLessThan, fpRegT1, fpRegT0), target);
     1544            emitJumpSlowToHot(branchDouble(DoubleLessThanOrUnordered, fpRegT1, fpRegT0), target);
    15541545
    15551546            emitJumpSlowToHot(jump(), OPCODE_LENGTH(op_jnlesseq));
     
    15921583            convertInt32ToDouble(regT0, fpRegT0);
    15931584
    1594             emitJumpSlowToHot(branchDouble(DoubleLessThan, fpRegT1, fpRegT0), target);
     1585            emitJumpSlowToHot(branchDouble(DoubleLessThanOrUnordered, fpRegT1, fpRegT0), target);
    15951586
    15961587            emitJumpSlowToHot(jump(), OPCODE_LENGTH(op_jnlesseq));
     
    16381629#endif
    16391630
    1640             emitJumpSlowToHot(branchDouble(DoubleLessThan, fpRegT1, fpRegT0), target);
     1631            emitJumpSlowToHot(branchDouble(DoubleLessThanOrUnordered, fpRegT1, fpRegT0), target);
    16411632
    16421633            emitJumpSlowToHot(jump(), OPCODE_LENGTH(op_jnlesseq));
     
    21612152    divDouble(fpRegT1, fpRegT0);
    21622153
    2163     JumpList doubleResult;
    2164     Jump end;
    2165     bool attemptIntConversion = (!isOperandConstantImmediateInt(op1) || getConstantOperand(op1).asInt32() > 1) && isOperandConstantImmediateInt(op2);
    2166     if (attemptIntConversion) {
    2167         m_assembler.cvttsd2si_rr(fpRegT0, regT0);
    2168         doubleResult.append(branchTest32(Zero, regT0));
    2169         m_assembler.ucomisd_rr(fpRegT1, fpRegT0);
    2170        
    2171         doubleResult.append(m_assembler.jne());
    2172         doubleResult.append(m_assembler.jp());
    2173         emitFastArithIntToImmNoCheck(regT0, regT0);
    2174         end = jump();
    2175     }
    2176 
    21772154    // Double result.
    2178     doubleResult.link(this);
    21792155    moveDoubleToPtr(fpRegT0, regT0);
    21802156    subPtr(tagTypeNumberRegister, regT0);
    21812157
    2182     if (attemptIntConversion)
    2183         end.link(this);
    21842158    emitPutVirtualRegister(dst, regT0);
    21852159}
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