Changeset 50595 in webkit for trunk/JavaScriptCore/assembler/MacroAssemblerARM.h

Timestamp:

Nov 6, 2009, 1:35:03 AM (16 years ago)

Author:

[email protected]

Message:

Tidy up the shift methods on the macro-assembler interface.

Patch by Gavin Barraclough <​[email protected]> on 2009-11-06
Reviewed by Oliver Hunt.

Currently behaviour of shifts of a magnitude > 0x1f is undefined.
Instead defined that all shifts are masked to this range. This makes a lot of
practical sense, both since having undefined behaviour is not particularly
desirable, and because this behaviour is commonly required (particularly since
it is required bt ECMA-262 for shifts).

Update the ARM assemblers to provide this behaviour. Remove (now) redundant
masks from JITArithmetic, and remove rshiftPtr (this was used in case that
could be rewritten in a simpler form using rshift32, only optimized JSVALUE32
on x86-64, which uses JSVALUE64!)

• assembler/MacroAssembler.h:
• assembler/MacroAssemblerARM.h:

(JSC::MacroAssemblerARM::lshift32):
(JSC::MacroAssemblerARM::rshift32):

• assembler/MacroAssemblerARMv7.h:

(JSC::MacroAssemblerARMv7::lshift32):
(JSC::MacroAssemblerARMv7::rshift32):

• assembler/MacroAssemblerX86_64.h:
• jit/JITArithmetic.cpp:

(JSC::JIT::emit_op_lshift):
(JSC::JIT::emit_op_rshift):

File:

• trunk/JavaScriptCore/assembler/MacroAssemblerARM.h (modified) (2 diffs)

trunk/JavaScriptCore/assembler/MacroAssemblerARM.h

@@ -119 +119 @@
     }
 
+    void lshift32(RegisterID shift_amount, RegisterID dest)
+    {
+        ARMWord w = m_assembler.getImm(0x1f, ARMRegisters::S0, true);
+        ASSERT(!(w & ARMAssembler::OP2_INV_IMM));
+        m_assembler.ands_r(ARMRegisters::S0, shift_amount, w);
+
+        m_assembler.movs_r(dest, m_assembler.lsl_r(dest, ARMRegisters::S0));
+    }
+
     void lshift32(Imm32 imm, RegisterID dest)
     {
         m_assembler.movs_r(dest, m_assembler.lsl(dest, imm.m_value & 0x1f));
-    }
-
-    void lshift32(RegisterID shift_amount, RegisterID dest)
-    {
-        m_assembler.movs_r(dest, m_assembler.lsl_r(dest, shift_amount));
     }
 
@@ -161 +165 @@
     void rshift32(RegisterID shift_amount, RegisterID dest)
     {
-        m_assembler.movs_r(dest, m_assembler.asr_r(dest, shift_amount));
+        ARMWord w = m_assembler.getImm(0x1f, ARMRegisters::S0, true);
+        ASSERT(!(w & ARMAssembler::OP2_INV_IMM));
+        m_assembler.ands_r(ARMRegisters::S0, shift_amount, w);
+
+        m_assembler.movs_r(dest, m_assembler.asr_r(dest, ARMRegisters::S0));
     }