Changeset 52729 in webkit for trunk/JavaScriptCore/assembler


Ignore:
Timestamp:
Jan 4, 2010, 3:38:56 AM (15 years ago)
Author:
[email protected]
Message:

2010-01-04 Maciej Stachowiak <​[email protected]>

Reviewed by Adam Barth.

Reorganize, document and rename CPU() platform macros.
​https://bugs.webkit.org/show_bug.cgi?id=33145
ExecutableAllocatorSymbian appears to have buggy ARM version check
​https://bugs.webkit.org/show_bug.cgi?id=33138


  • wtf/Platform.h: Rename all macros related to detection of particular CPUs or classes of CPUs to CPU(), reorganize and document them.

All remaining changes are adapting to the renames, plus fixing the
second bug cited above.


  • assembler/ARMAssembler.cpp:
  • assembler/ARMAssembler.h:
  • assembler/ARMv7Assembler.h:
  • assembler/AbstractMacroAssembler.h: (JSC::AbstractMacroAssembler::Imm32::Imm32):
  • assembler/MacroAssembler.h:
  • assembler/MacroAssemblerARM.cpp:
  • assembler/MacroAssemblerARM.h:
  • assembler/MacroAssemblerCodeRef.h: (JSC::MacroAssemblerCodePtr::MacroAssemblerCodePtr):
  • assembler/MacroAssemblerX86.h:
  • assembler/MacroAssemblerX86Common.h:
  • assembler/MacroAssemblerX86_64.h:
  • assembler/X86Assembler.h: (JSC::X86Registers::): (JSC::X86Assembler::): (JSC::X86Assembler::movl_mEAX): (JSC::X86Assembler::movl_EAXm): (JSC::X86Assembler::repatchLoadPtrToLEA): (JSC::X86Assembler::X86InstructionFormatter::memoryModRM):
  • jit/ExecutableAllocator.h:
  • jit/ExecutableAllocatorFixedVMPool.cpp:
  • jit/ExecutableAllocatorPosix.cpp:
  • jit/ExecutableAllocatorSymbian.cpp: (JSC::ExecutableAllocator::intializePageSize):
  • jit/JIT.cpp:
  • jit/JIT.h:
  • jit/JITArithmetic.cpp:
  • jit/JITInlineMethods.h: (JSC::JIT::beginUninterruptedSequence): (JSC::JIT::restoreArgumentReferenceForTrampoline): (JSC::JIT::emitCount):
  • jit/JITOpcodes.cpp: (JSC::JIT::privateCompileCTIMachineTrampolines):
  • jit/JITPropertyAccess.cpp: (JSC::JIT::privateCompileGetByIdProto): (JSC::JIT::privateCompileGetByIdProtoList): (JSC::JIT::privateCompileGetByIdChainList): (JSC::JIT::privateCompileGetByIdChain):
  • jit/JITStubs.cpp: (JSC::JITThunks::JITThunks):
  • jit/JITStubs.h:
  • runtime/Collector.cpp: (JSC::currentThreadStackBase): (JSC::getPlatformThreadRegisters): (JSC::otherThreadStackPointer):
  • wrec/WREC.h:
  • wrec/WRECGenerator.cpp: (JSC::WREC::Generator::generateEnter): (JSC::WREC::Generator::generateReturnSuccess): (JSC::WREC::Generator::generateReturnFailure):
  • wrec/WRECGenerator.h:
  • wtf/FastMalloc.cpp:
  • wtf/TCSpinLock.h: (TCMalloc_SpinLock::Lock): (TCMalloc_SpinLock::Unlock): (TCMalloc_SlowLock):
  • wtf/Threading.h:
  • wtf/dtoa.cpp:
  • yarr/RegexJIT.cpp: (JSC::Yarr::RegexGenerator::generateEnter): (JSC::Yarr::RegexGenerator::generateReturn):
  • yarr/RegexJIT.h:

2010-01-04 Maciej Stachowiak <​[email protected]>

Reviewed by Adam Barth.

Reorganize, document and rename CPU() platform macros.
​https://bugs.webkit.org/show_bug.cgi?id=33145

  • webkit/webkitwebsettings.cpp: (webkit_get_user_agent):

2010-01-04 Maciej Stachowiak <​[email protected]>

Reviewed by Adam Barth.

Reorganize, document and rename CPU() platform macros.
​https://bugs.webkit.org/show_bug.cgi?id=33145

  • page/NavigatorBase.cpp:
  • platform/text/AtomicString.cpp: (WebCore::equal):
  • platform/text/StringHash.h: (WebCore::StringHash::equal):
Location:
trunk/JavaScriptCore/assembler
Files:
12 edited

Legend:

Unmodified
Added
Removed

  • trunk/JavaScriptCore/assembler/ARMAssembler.cpp

    r50553 r52729  
    2727#include "config.h"
    2828
    29 #if ENABLE(ASSEMBLER) && PLATFORM(ARM_TRADITIONAL)
     29#if ENABLE(ASSEMBLER) && CPU(ARM_TRADITIONAL)
    3030
    3131#include "ARMAssembler.h"
    … …  
    403403} // namespace JSC
    404404
    405 #endif // ENABLE(ASSEMBLER) && PLATFORM(ARM_TRADITIONAL)
     405#endif // ENABLE(ASSEMBLER) && CPU(ARM_TRADITIONAL)

  • trunk/JavaScriptCore/assembler/ARMAssembler.h

    r51067 r52729  
    3030#include <wtf/Platform.h>
    3131
    32 #if ENABLE(ASSEMBLER) && PLATFORM(ARM_TRADITIONAL)
     32#if ENABLE(ASSEMBLER) && CPU(ARM_TRADITIONAL)
    3333
    3434#include "AssemblerBufferWithConstantPool.h"
    … …  
    813813} // namespace JSC
    814814
    815 #endif // ENABLE(ASSEMBLER) && PLATFORM(ARM_TRADITIONAL)
     815#endif // ENABLE(ASSEMBLER) && CPU(ARM_TRADITIONAL)
    816816
    817817#endif // ARMAssembler_h

  • trunk/JavaScriptCore/assembler/ARMv7Assembler.h

    r50539 r52729  
    2929#include <wtf/Platform.h>
    3030
    31 #if ENABLE(ASSEMBLER) && PLATFORM(ARM_THUMB2)
     31#if ENABLE(ASSEMBLER) && CPU(ARM_THUMB2)
    3232
    3333#include "AssemblerBuffer.h"
    … …  
    18331833} // namespace JSC
    18341834
    1835 #endif // ENABLE(ASSEMBLER) && PLATFORM(ARM_THUMB2)
     1835#endif // ENABLE(ASSEMBLER) && CPU(ARM_THUMB2)
    18361836
    18371837#endif // ARMAssembler_h

  • trunk/JavaScriptCore/assembler/AbstractMacroAssembler.h

    r47186 r52729  
    174174        explicit Imm32(int32_t value)
    175175            : m_value(value)
    176 #if PLATFORM(ARM)
     176#if CPU(ARM)
    177177            , m_isPointer(false)
    178178#endif
    … …  
    180180        }
    181181
    182 #if !PLATFORM(X86_64)
     182#if !CPU(X86_64)
    183183        explicit Imm32(ImmPtr ptr)
    184184            : m_value(ptr.asIntptr())
    185 #if PLATFORM(ARM)
     185#if CPU(ARM)
    186186            , m_isPointer(true)
    187187#endif
    … …  
    191191
    192192        int32_t m_value;
    193 #if PLATFORM(ARM)
     193#if CPU(ARM)
    194194        // We rely on being able to regenerate code to recover exception handling
    195195        // information.  Since ARMv7 supports 16-bit immediates there is a danger

  • trunk/JavaScriptCore/assembler/MacroAssembler.h

    r50595 r52729  
    3131#if ENABLE(ASSEMBLER)
    3232
    33 #if PLATFORM(ARM_THUMB2)
     33#if CPU(ARM_THUMB2)
    3434#include "MacroAssemblerARMv7.h"
    3535namespace JSC { typedef MacroAssemblerARMv7 MacroAssemblerBase; };
    3636
    37 #elif PLATFORM(ARM_TRADITIONAL)
     37#elif CPU(ARM_TRADITIONAL)
    3838#include "MacroAssemblerARM.h"
    3939namespace JSC { typedef MacroAssemblerARM MacroAssemblerBase; };
    4040
    41 #elif PLATFORM(X86)
     41#elif CPU(X86)
    4242#include "MacroAssemblerX86.h"
    4343namespace JSC { typedef MacroAssemblerX86 MacroAssemblerBase; };
    4444
    45 #elif PLATFORM(X86_64)
     45#elif CPU(X86_64)
    4646#include "MacroAssemblerX86_64.h"
    4747namespace JSC { typedef MacroAssemblerX86_64 MacroAssemblerBase; };
    … …  
    6161    using MacroAssemblerBase::branch32;
    6262    using MacroAssemblerBase::branch16;
    63 #if PLATFORM(X86_64)
     63#if CPU(X86_64)
    6464    using MacroAssemblerBase::branchPtr;
    6565    using MacroAssemblerBase::branchTestPtr;
    … …  
    134134    // Ptr methods
    135135    // On 32-bit platforms (i.e. x86), these methods directly map onto their 32-bit equivalents.
    136 #if !PLATFORM(X86_64)
     136    // FIXME: should this use a test for 32-bitness instead of this specific exception?
     137#if !CPU(X86_64)
    137138    void addPtr(RegisterID src, RegisterID dest)
    138139    {

  • trunk/JavaScriptCore/assembler/MacroAssemblerARM.cpp

    r48782 r52729  
    2727#include "config.h"
    2828
    29 #if ENABLE(ASSEMBLER) && PLATFORM(ARM_TRADITIONAL)
     29#if ENABLE(ASSEMBLER) && CPU(ARM_TRADITIONAL)
    3030
    3131#include "MacroAssemblerARM.h"
    … …  
    6363const bool MacroAssemblerARM::s_isVFPPresent = isVFPPresent();
    6464
    65 #if defined(ARM_REQUIRE_NATURAL_ALIGNMENT) && ARM_REQUIRE_NATURAL_ALIGNMENT
     65#if CPU(ARMV5_OR_LOWER)
     66/* On ARMv5 and below, natural alignment is required. */
    6667void MacroAssemblerARM::load32WithUnalignedHalfWords(BaseIndex address, RegisterID dest)
    6768{
    … …  
    9293}
    9394
    94 #endif // ENABLE(ASSEMBLER) && PLATFORM(ARM_TRADITIONAL)
     95#endif // ENABLE(ASSEMBLER) && CPU(ARM_TRADITIONAL)

  • trunk/JavaScriptCore/assembler/MacroAssemblerARM.h

    r51067 r52729  
    3131#include <wtf/Platform.h>
    3232
    33 #if ENABLE(ASSEMBLER) && PLATFORM(ARM_TRADITIONAL)
     33#if ENABLE(ASSEMBLER) && CPU(ARM_TRADITIONAL)
    3434
    3535#include "ARMAssembler.h"
    … …  
    225225    }
    226226
    227 #if defined(ARM_REQUIRE_NATURAL_ALIGNMENT) && ARM_REQUIRE_NATURAL_ALIGNMENT
     227#if CPU(ARMV5_OR_LOWER)
    228228    void load32WithUnalignedHalfWords(BaseIndex address, RegisterID dest);
    229229#else
    … …  
    929929}
    930930
    931 #endif // ENABLE(ASSEMBLER) && PLATFORM(ARM_TRADITIONAL)
     931#endif // ENABLE(ASSEMBLER) && CPU(ARM_TRADITIONAL)
    932932
    933933#endif // MacroAssemblerARM_h

  • trunk/JavaScriptCore/assembler/MacroAssemblerCodeRef.h

    r49509 r52729  
    3838// ASSERT_VALID_CODE_POINTER checks that ptr is a non-null pointer, and that it is a valid
    3939// instruction address on the platform (for example, check any alignment requirements).
    40 #if PLATFORM(ARM_THUMB2)
     40#if CPU(ARM_THUMB2)
    4141// ARM/thumb instructions must be 16-bit aligned, but all code pointers to be loaded
    4242// into the processor are decorated with the bottom bit set, indicating that this is
    … …  
    131131
    132132    explicit MacroAssemblerCodePtr(void* value)
    133 #if PLATFORM(ARM_THUMB2)
     133#if CPU(ARM_THUMB2)
    134134        // Decorate the pointer as a thumb code pointer.
    135135        : m_value(reinterpret_cast<char*>(value) + 1)
    … …  
    148148
    149149    void* executableAddress() const { return m_value; }
    150 #if PLATFORM(ARM_THUMB2)
     150#if CPU(ARM_THUMB2)
    151151    // To use this pointer as a data address remove the decoration.
    152152    void* dataLocation() const { ASSERT_VALID_CODE_POINTER(m_value); return reinterpret_cast<char*>(m_value) - 1; }

  • trunk/JavaScriptCore/assembler/MacroAssemblerX86.h

    r46598 r52729  
    2929#include <wtf/Platform.h>
    3030
    31 #if ENABLE(ASSEMBLER) && PLATFORM(X86)
     31#if ENABLE(ASSEMBLER) && CPU(X86)
    3232
    3333#include "MacroAssemblerX86Common.h"

  • trunk/JavaScriptCore/assembler/MacroAssemblerX86Common.h

    r50595 r52729  
    543543    }
    544544
    545 #if PLATFORM(X86_64)
     545#if CPU(X86_64)
    546546    void move(RegisterID src, RegisterID dest)
    547547    {
    … …  
    945945    friend class MacroAssemblerX86;
    946946
    947 #if PLATFORM(X86)
     947#if CPU(X86)
    948948#if PLATFORM(MAC)
    949949
    … …  
    998998
    999999#endif // PLATFORM(MAC)
    1000 #elif !defined(NDEBUG) // PLATFORM(X86)
     1000#elif !defined(NDEBUG) // CPU(X86)
    10011001
    10021002    // On x86-64 we should never be checking for SSE2 in a non-debug build,

  • trunk/JavaScriptCore/assembler/MacroAssemblerX86_64.h

    r50595 r52729  
    2929#include <wtf/Platform.h>
    3030
    31 #if ENABLE(ASSEMBLER) && PLATFORM(X86_64)
     31#if ENABLE(ASSEMBLER) && CPU(X86_64)
    3232
    3333#include "MacroAssemblerX86Common.h"

  • trunk/JavaScriptCore/assembler/X86Assembler.h

    r47834 r52729  
    2929#include <wtf/Platform.h>
    3030
    31 #if ENABLE(ASSEMBLER) && (PLATFORM(X86) || PLATFORM(X86_64))
     31#if ENABLE(ASSEMBLER) && (CPU(X86) || CPU(X86_64))
    3232
    3333#include "AssemblerBuffer.h"
    … …  
    5151        edi,
    5252
    53 #if PLATFORM(X86_64)
     53#if CPU(X86_64)
    5454        r8,
    5555        r9,
    … …  
    119119        OP_CMP_EvGv                     = 0x39,
    120120        OP_CMP_GvEv                     = 0x3B,
    121 #if PLATFORM(X86_64)
     121#if CPU(X86_64)
    122122        PRE_REX                         = 0x40,
    123123#endif
    124124        OP_PUSH_EAX                     = 0x50,
    125125        OP_POP_EAX                      = 0x58,
    126 #if PLATFORM(X86_64)
     126#if CPU(X86_64)
    127127        OP_MOVSXD_GvEv                  = 0x63,
    128128#endif
    … …  
    297297    // Arithmetic operations:
    298298
    299 #if !PLATFORM(X86_64)
     299#if !CPU(X86_64)
    300300    void adcl_im(int imm, void* addr)
    301301    {
    … …  
    347347    }
    348348
    349 #if PLATFORM(X86_64)
     349#if CPU(X86_64)
    350350    void addq_rr(RegisterID src, RegisterID dst)
    351351    {
    … …  
    424424    }
    425425
    426 #if PLATFORM(X86_64)
     426#if CPU(X86_64)
    427427    void andq_rr(RegisterID src, RegisterID dst)
    428428    {
    … …  
    510510    }
    511511
    512 #if PLATFORM(X86_64)
     512#if CPU(X86_64)
    513513    void orq_rr(RegisterID src, RegisterID dst)
    514514    {
    … …  
    576576    }
    577577
    578 #if PLATFORM(X86_64)
     578#if CPU(X86_64)
    579579    void subq_rr(RegisterID src, RegisterID dst)
    580580    {
    … …  
    642642    }
    643643
    644 #if PLATFORM(X86_64)
     644#if CPU(X86_64)
    645645    void xorq_rr(RegisterID src, RegisterID dst)
    646646    {
    … …  
    690690    }
    691691
    692 #if PLATFORM(X86_64)
     692#if CPU(X86_64)
    693693    void sarq_CLr(RegisterID dst)
    694694    {
    … …  
    790790    }
    791791
    792 #if PLATFORM(X86_64)
     792#if CPU(X86_64)
    793793    void cmpq_rr(RegisterID src, RegisterID dst)
    794794    {
    … …  
    898898    }
    899899
    900 #if PLATFORM(X86_64)
     900#if CPU(X86_64)
    901901    void testq_rr(RegisterID src, RegisterID dst)
    902902    {
    … …  
    972972    }
    973973
    974 #if PLATFORM(X86_64)
     974#if CPU(X86_64)
    975975    void xchgq_rr(RegisterID src, RegisterID dst)
    976976    {
    … …  
    10021002    {
    10031003        m_formatter.oneByteOp(OP_MOV_EAXOv);
    1004 #if PLATFORM(X86_64)
     1004#if CPU(X86_64)
    10051005        m_formatter.immediate64(reinterpret_cast<int64_t>(addr));
    10061006#else
    … …  
    10391039    {
    10401040        m_formatter.oneByteOp(OP_MOV_OvEAX);
    1041 #if PLATFORM(X86_64)
     1041#if CPU(X86_64)
    10421042        m_formatter.immediate64(reinterpret_cast<int64_t>(addr));
    10431043#else
    … …  
    10461046    }
    10471047
    1048 #if PLATFORM(X86_64)
     1048#if CPU(X86_64)
    10491049    void movq_rr(RegisterID src, RegisterID dst)
    10501050    {
    … …  
    11581158        m_formatter.oneByteOp(OP_LEA, dst, base, offset);
    11591159    }
    1160 #if PLATFORM(X86_64)
     1160#if CPU(X86_64)
    11611161    void leaq_mr(int offset, RegisterID base, RegisterID dst)
    11621162    {
    … …  
    13241324    }
    13251325
    1326 #if !PLATFORM(X86_64)
     1326#if !CPU(X86_64)
    13271327    void cvtsi2sd_mr(void* address, XMMRegisterID dst)
    13281328    {
    … …  
    13441344    }
    13451345
    1346 #if PLATFORM(X86_64)
     1346#if CPU(X86_64)
    13471347    void movq_rr(XMMRegisterID src, RegisterID dst)
    13481348    {
    … …  
    13701370    }
    13711371
    1372 #if !PLATFORM(X86_64)
     1372#if !CPU(X86_64)
    13731373    void movsd_mr(void* address, XMMRegisterID dst)
    13741374    {
    … …  
    15361536    static void repatchLoadPtrToLEA(void* where)
    15371537    {
    1538 #if PLATFORM(X86_64)
     1538#if CPU(X86_64)
    15391539        // On x86-64 pointer memory accesses require a 64-bit operand, and as such a REX prefix.
    15401540        // Skip over the prefix byte.
    … …  
    16801680        }
    16811681
    1682 #if !PLATFORM(X86_64)
     1682#if !CPU(X86_64)
    16831683        void oneByteOp(OneByteOpcodeID opcode, int reg, void* address)
    16841684        {
    … …  
    17231723        }
    17241724
    1725 #if !PLATFORM(X86_64)
     1725#if !CPU(X86_64)
    17261726        void twoByteOp(TwoByteOpcodeID opcode, int reg, void* address)
    17271727        {
    … …  
    17331733#endif
    17341734
    1735 #if PLATFORM(X86_64)
     1735#if CPU(X86_64)
    17361736        // Quad-word-sized operands:
    17371737        //
    … …  
    18921892        static const RegisterID hasSib = X86Registers::esp;
    18931893        static const RegisterID noIndex = X86Registers::esp;
    1894 #if PLATFORM(X86_64)
     1894#if CPU(X86_64)
    18951895        static const RegisterID noBase2 = X86Registers::r13;
    18961896        static const RegisterID hasSib2 = X86Registers::r12;
    … …  
    19681968        {
    19691969            // A base of esp or r12 would be interpreted as a sib, so force a sib with no index & put the base in there.
    1970 #if PLATFORM(X86_64)
     1970#if CPU(X86_64)
    19711971            if ((base == hasSib) || (base == hasSib2)) {
    19721972#else
    … …  
    19831983                }
    19841984            } else {
    1985 #if PLATFORM(X86_64)
     1985#if CPU(X86_64)
    19861986                if (!offset && (base != noBase) && (base != noBase2))
    19871987#else
    … …  
    20022002        {
    20032003            // A base of esp or r12 would be interpreted as a sib, so force a sib with no index & put the base in there.
    2004 #if PLATFORM(X86_64)
     2004#if CPU(X86_64)
    20052005            if ((base == hasSib) || (base == hasSib2)) {
    20062006#else
    … …  
    20192019            ASSERT(index != noIndex);
    20202020
    2021 #if PLATFORM(X86_64)
     2021#if CPU(X86_64)
    20222022            if (!offset && (base != noBase) && (base != noBase2))
    20232023#else
    … …  
    20342034        }
    20352035
    2036 #if !PLATFORM(X86_64)
     2036#if !CPU(X86_64)
    20372037        void memoryModRM(int reg, void* address)
    20382038        {
    … …  
    20492049} // namespace JSC
    20502050
    2051 #endif // ENABLE(ASSEMBLER) && PLATFORM(X86)
     2051#endif // ENABLE(ASSEMBLER) && CPU(X86)
    20522052
    20532053#endif // X86Assembler_h
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