Changeset 56759 in webkit for trunk/JavaScriptCore/assembler/MacroAssemblerMIPS.h

Timestamp:

Mar 29, 2010, 7:59:20 PM (15 years ago)

Author:

[email protected]

Message:

2010-03-29 Chao-ying Fu <​[email protected]>

Reviewed by Oliver Hunt.

MIPS JIT Supports
​https://bugs.webkit.org/show_bug.cgi?id=30144

The following changes enable MIPS JIT.

• assembler/MIPSAssembler.h: (JSC::MIPSAssembler::lbu): (JSC::MIPSAssembler::linkWithOffset):
• assembler/MacroAssemblerMIPS.h: (JSC::MacroAssemblerMIPS::load8): (JSC::MacroAssemblerMIPS::branch8): (JSC::MacroAssemblerMIPS::branchTest8): (JSC::MacroAssemblerMIPS::setTest8): (JSC::MacroAssemblerMIPS::setTest32):
• jit/JIT.h:
• jit/JITInlineMethods.h: (JSC::JIT::preserveReturnAddressAfterCall): (JSC::JIT::restoreReturnAddressBeforeReturn):
• jit/JITOpcodes.cpp:
• jit/JITStubs.cpp: (JSC::JITThunks::JITThunks):
• jit/JITStubs.h: (JSC::JITStackFrame::returnAddressSlot):
• wtf/Platform.h:

File:

• trunk/JavaScriptCore/assembler/MacroAssemblerMIPS.h (modified) (5 diffs)

trunk/JavaScriptCore/assembler/MacroAssemblerMIPS.h

@@ -443 +443 @@
     // register is passed.
 
+    /* Need to use zero-extened load byte for load8.  */
+    void load8(ImplicitAddress address, RegisterID dest)
+    {
+        if (address.offset >= -32768 && address.offset <= 32767
+            && !m_fixedWidth)
+            m_assembler.lbu(dest, address.base, address.offset);
+        else {
+            /*
+                lui     addrTemp, (offset + 0x8000) >> 16
+                addu    addrTemp, addrTemp, base
+                lbu     dest, (offset & 0xffff)(addrTemp)
+              */
+            m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
+            m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
+            m_assembler.lbu(dest, addrTempRegister, address.offset);
+        }
+    }
+
     void load32(ImplicitAddress address, RegisterID dest)
     {
@@ -857 +875 @@
     // an optional second operand of a mask under which to perform the test.
 
+    Jump branch8(Condition cond, Address left, Imm32 right)
+    {
+        // Make sure the immediate value is unsigned 8 bits.
+        ASSERT(!(right.m_value & 0xFFFFFF00));
+        load8(left, dataTempRegister);
+        move(right, immTempRegister);
+        return branch32(cond, dataTempRegister, immTempRegister);
+    }
+
     Jump branch32(Condition cond, RegisterID left, RegisterID right)
     {
@@ -1036 +1063 @@
     {
         load32(address, dataTempRegister);
+        return branchTest32(cond, dataTempRegister, mask);
+    }
+
+    Jump branchTest8(Condition cond, Address address, Imm32 mask = Imm32(-1))
+    {
+        load8(address, dataTempRegister);
         return branchTest32(cond, dataTempRegister, mask);
     }
@@ -1333 +1366 @@
     }
 
+    void setTest8(Condition cond, Address address, Imm32 mask, RegisterID dest)
+    {
+        ASSERT((cond == Zero) || (cond == NonZero));
+        load8(address, dataTempRegister);
+        if (mask.m_value == -1 && !m_fixedWidth) {
+            if (cond == Zero)
+                m_assembler.sltiu(dest, dataTempRegister, 1);
+            else
+                m_assembler.sltu(dest, MIPSRegisters::zero, dataTempRegister);
+        } else {
+            move(mask, immTempRegister);
+            m_assembler.andInsn(cmpTempRegister, dataTempRegister,
+                                immTempRegister);
+            if (cond == Zero)
+                m_assembler.sltiu(dest, cmpTempRegister, 1);
+            else
+                m_assembler.sltu(dest, MIPSRegisters::zero, cmpTempRegister);
+        }
+    }
+
     void setTest32(Condition cond, Address address, Imm32 mask, RegisterID dest)
     {
@@ -1345 +1398 @@
             move(mask, immTempRegister);
             m_assembler.andInsn(cmpTempRegister, dataTempRegister,
-                                 immTempRegister);
+                                immTempRegister);
             if (cond == Zero)
                 m_assembler.sltiu(dest, cmpTempRegister, 1);