Ignore:
Timestamp:
Mar 28, 2011, 10:14:57 AM (14 years ago)
Author:
[email protected]
Message:

2011-03-27 Oliver Hunt <[email protected]>

Reviewed by Maciej Stachowiak.

Add additional immediate types to allow us to distinguish the source of a JIT immediate
https://bugs.webkit.org/show_bug.cgi?id=57190

Allow us to distinguish whether a JIT immediate is a value that we
control (TrustedImm32 and TrustedImmPtr) vs. ones that can be controlled
or influenced by code we are compiling. Currently we do nothing with this
information -- this change is large and mechanical but would obscure any
logic changes that we would have made.

  • assembler/AbstractMacroAssembler.h: (JSC::AbstractMacroAssembler::TrustedImmPtr::TrustedImmPtr): (JSC::AbstractMacroAssembler::ImmPtr::ImmPtr): (JSC::AbstractMacroAssembler::TrustedImm32::TrustedImm32): (JSC::AbstractMacroAssembler::Imm32::Imm32):
  • assembler/MacroAssembler.h: (JSC::MacroAssembler::pop): (JSC::MacroAssembler::poke): (JSC::MacroAssembler::branchPtr): (JSC::MacroAssembler::branch32): (JSC::MacroAssembler::addPtr): (JSC::MacroAssembler::andPtr): (JSC::MacroAssembler::orPtr): (JSC::MacroAssembler::subPtr): (JSC::MacroAssembler::xorPtr): (JSC::MacroAssembler::setPtr): (JSC::MacroAssembler::storePtr): (JSC::MacroAssembler::branchTestPtr): (JSC::MacroAssembler::branchSubPtr): (JSC::MacroAssembler::branchTest8):
  • assembler/MacroAssemblerARM.h: (JSC::MacroAssemblerARM::add32): (JSC::MacroAssemblerARM::and32): (JSC::MacroAssemblerARM::lshift32): (JSC::MacroAssemblerARM::mul32): (JSC::MacroAssemblerARM::or32): (JSC::MacroAssemblerARM::rshift32): (JSC::MacroAssemblerARM::urshift32): (JSC::MacroAssemblerARM::sub32): (JSC::MacroAssemblerARM::xor32): (JSC::MacroAssemblerARM::store32): (JSC::MacroAssemblerARM::push): (JSC::MacroAssemblerARM::move): (JSC::MacroAssemblerARM::branch8): (JSC::MacroAssemblerARM::branch32): (JSC::MacroAssemblerARM::branch32WithUnalignedHalfWords): (JSC::MacroAssemblerARM::branch16): (JSC::MacroAssemblerARM::branchTest8): (JSC::MacroAssemblerARM::branchTest32): (JSC::MacroAssemblerARM::branchAdd32): (JSC::MacroAssemblerARM::branchMul32): (JSC::MacroAssemblerARM::branchSub32): (JSC::MacroAssemblerARM::set32Compare32): (JSC::MacroAssemblerARM::set8Compare32): (JSC::MacroAssemblerARM::set32Test32): (JSC::MacroAssemblerARM::set32Test8): (JSC::MacroAssemblerARM::moveWithPatch): (JSC::MacroAssemblerARM::branchPtrWithPatch): (JSC::MacroAssemblerARM::storePtrWithPatch):
  • assembler/MacroAssemblerARMv7.h: (JSC::MacroAssemblerARMv7::add32): (JSC::MacroAssemblerARMv7::and32): (JSC::MacroAssemblerARMv7::lshift32): (JSC::MacroAssemblerARMv7::mul32): (JSC::MacroAssemblerARMv7::or32): (JSC::MacroAssemblerARMv7::rshift32): (JSC::MacroAssemblerARMv7::urshift32): (JSC::MacroAssemblerARMv7::sub32): (JSC::MacroAssemblerARMv7::xor32): (JSC::MacroAssemblerARMv7::load32): (JSC::MacroAssemblerARMv7::load32WithAddressOffsetPatch): (JSC::MacroAssemblerARMv7::load16): (JSC::MacroAssemblerARMv7::store32WithAddressOffsetPatch): (JSC::MacroAssemblerARMv7::store32): (JSC::MacroAssemblerARMv7::loadDouble): (JSC::MacroAssemblerARMv7::storeDouble): (JSC::MacroAssemblerARMv7::push): (JSC::MacroAssemblerARMv7::move): (JSC::MacroAssemblerARMv7::compare32): (JSC::MacroAssemblerARMv7::test32): (JSC::MacroAssemblerARMv7::branch32): (JSC::MacroAssemblerARMv7::branch32WithUnalignedHalfWords): (JSC::MacroAssemblerARMv7::branch16): (JSC::MacroAssemblerARMv7::branch8): (JSC::MacroAssemblerARMv7::branchTest32): (JSC::MacroAssemblerARMv7::branchTest8): (JSC::MacroAssemblerARMv7::branchAdd32): (JSC::MacroAssemblerARMv7::branchMul32): (JSC::MacroAssemblerARMv7::branchSub32): (JSC::MacroAssemblerARMv7::nearCall): (JSC::MacroAssemblerARMv7::call): (JSC::MacroAssemblerARMv7::set32Compare32): (JSC::MacroAssemblerARMv7::set8Compare32): (JSC::MacroAssemblerARMv7::set32Test32): (JSC::MacroAssemblerARMv7::set32Test8): (JSC::MacroAssemblerARMv7::moveWithPatch): (JSC::MacroAssemblerARMv7::branchPtrWithPatch): (JSC::MacroAssemblerARMv7::storePtrWithPatch): (JSC::MacroAssemblerARMv7::tailRecursiveCall): (JSC::MacroAssemblerARMv7::makeJump): (JSC::MacroAssemblerARMv7::makeBranch): (JSC::MacroAssemblerARMv7::setupArmAddress): (JSC::MacroAssemblerARMv7::makeBaseIndexBase): (JSC::MacroAssemblerARMv7::moveFixedWidthEncoding):
  • assembler/MacroAssemblerMIPS.h: (JSC::MacroAssemblerMIPS::add32): (JSC::MacroAssemblerMIPS::and32): (JSC::MacroAssemblerMIPS::lshift32): (JSC::MacroAssemblerMIPS::mul32): (JSC::MacroAssemblerMIPS::or32): (JSC::MacroAssemblerMIPS::rshift32): (JSC::MacroAssemblerMIPS::urshift32): (JSC::MacroAssemblerMIPS::sub32): (JSC::MacroAssemblerMIPS::xor32): (JSC::MacroAssemblerMIPS::load32): (JSC::MacroAssemblerMIPS::load32WithAddressOffsetPatch): (JSC::MacroAssemblerMIPS::store32WithAddressOffsetPatch): (JSC::MacroAssemblerMIPS::store32): (JSC::MacroAssemblerMIPS::push): (JSC::MacroAssemblerMIPS::move): (JSC::MacroAssemblerMIPS::branch8): (JSC::MacroAssemblerMIPS::branch32): (JSC::MacroAssemblerMIPS::branch32WithUnalignedHalfWords): (JSC::MacroAssemblerMIPS::branch16): (JSC::MacroAssemblerMIPS::branchTest32): (JSC::MacroAssemblerMIPS::branchTest8): (JSC::MacroAssemblerMIPS::branchAdd32): (JSC::MacroAssemblerMIPS::branchMul32): (JSC::MacroAssemblerMIPS::branchSub32): (JSC::MacroAssemblerMIPS::set8Compare32): (JSC::MacroAssemblerMIPS::set32Compare32): (JSC::MacroAssemblerMIPS::set32Test8): (JSC::MacroAssemblerMIPS::set32Test32): (JSC::MacroAssemblerMIPS::moveWithPatch): (JSC::MacroAssemblerMIPS::branchPtrWithPatch): (JSC::MacroAssemblerMIPS::storePtrWithPatch): (JSC::MacroAssemblerMIPS::tailRecursiveCall): (JSC::MacroAssemblerMIPS::loadDouble): (JSC::MacroAssemblerMIPS::storeDouble): (JSC::MacroAssemblerMIPS::branchTruncateDoubleToInt32):
  • assembler/MacroAssemblerX86.h: (JSC::MacroAssemblerX86::add32): (JSC::MacroAssemblerX86::addWithCarry32): (JSC::MacroAssemblerX86::and32): (JSC::MacroAssemblerX86::or32): (JSC::MacroAssemblerX86::sub32): (JSC::MacroAssemblerX86::store32): (JSC::MacroAssemblerX86::branch32): (JSC::MacroAssemblerX86::moveWithPatch): (JSC::MacroAssemblerX86::branchPtrWithPatch): (JSC::MacroAssemblerX86::storePtrWithPatch):
  • assembler/MacroAssemblerX86Common.h: (JSC::MacroAssemblerX86Common::add32): (JSC::MacroAssemblerX86Common::and32): (JSC::MacroAssemblerX86Common::lshift32): (JSC::MacroAssemblerX86Common::mul32): (JSC::MacroAssemblerX86Common::or32): (JSC::MacroAssemblerX86Common::rshift32): (JSC::MacroAssemblerX86Common::urshift32): (JSC::MacroAssemblerX86Common::sub32): (JSC::MacroAssemblerX86Common::xor32): (JSC::MacroAssemblerX86Common::store32): (JSC::MacroAssemblerX86Common::branchTruncateDoubleToInt32): (JSC::MacroAssemblerX86Common::push): (JSC::MacroAssemblerX86Common::move): (JSC::MacroAssemblerX86Common::branch8): (JSC::MacroAssemblerX86Common::branch32): (JSC::MacroAssemblerX86Common::branch32WithUnalignedHalfWords): (JSC::MacroAssemblerX86Common::branch16): (JSC::MacroAssemblerX86Common::branchTest32): (JSC::MacroAssemblerX86Common::branchTest8): (JSC::MacroAssemblerX86Common::branchAdd32): (JSC::MacroAssemblerX86Common::branchMul32): (JSC::MacroAssemblerX86Common::branchSub32): (JSC::MacroAssemblerX86Common::set8Compare32): (JSC::MacroAssemblerX86Common::set32Compare32): (JSC::MacroAssemblerX86Common::set32Test8): (JSC::MacroAssemblerX86Common::set32Test32):
  • assembler/MacroAssemblerX86_64.h: (JSC::MacroAssemblerX86_64::add32): (JSC::MacroAssemblerX86_64::and32): (JSC::MacroAssemblerX86_64::or32): (JSC::MacroAssemblerX86_64::sub32): (JSC::MacroAssemblerX86_64::loadDouble): (JSC::MacroAssemblerX86_64::addDouble): (JSC::MacroAssemblerX86_64::convertInt32ToDouble): (JSC::MacroAssemblerX86_64::store32): (JSC::MacroAssemblerX86_64::call): (JSC::MacroAssemblerX86_64::tailRecursiveCall): (JSC::MacroAssemblerX86_64::makeTailRecursiveCall): (JSC::MacroAssemblerX86_64::addPtr): (JSC::MacroAssemblerX86_64::andPtr): (JSC::MacroAssemblerX86_64::orPtr): (JSC::MacroAssemblerX86_64::subPtr): (JSC::MacroAssemblerX86_64::xorPtr): (JSC::MacroAssemblerX86_64::storePtr): (JSC::MacroAssemblerX86_64::setPtr): (JSC::MacroAssemblerX86_64::branchPtr): (JSC::MacroAssemblerX86_64::branchTestPtr): (JSC::MacroAssemblerX86_64::branchSubPtr): (JSC::MacroAssemblerX86_64::moveWithPatch): (JSC::MacroAssemblerX86_64::branchPtrWithPatch): (JSC::MacroAssemblerX86_64::storePtrWithPatch): (JSC::MacroAssemblerX86_64::branchTest8):
  • dfg/DFGJITCodeGenerator.h: (JSC::DFG::JITCodeGenerator::callOperation):
  • dfg/DFGJITCompiler.cpp: (JSC::DFG::JITCompiler::jitAssertIsInt32): (JSC::DFG::JITCompiler::emitCount):
  • dfg/DFGJITCompiler.h: (JSC::DFG::JITCompiler::emitPutImmediateToCallFrameHeader):
  • dfg/DFGNonSpeculativeJIT.cpp: (JSC::DFG::NonSpeculativeJIT::compile):
  • dfg/DFGSpeculativeJIT.cpp: (JSC::DFG::SpeculativeJIT::fillSpeculateCell): (JSC::DFG::SpeculativeJIT::compile):
  • jit/JIT.cpp: (JSC::JIT::emitTimeoutCheck): (JSC::JIT::privateCompile):
  • jit/JIT.h:
  • jit/JITArithmetic.cpp: (JSC::JIT::emit_op_urshift): (JSC::JIT::emitSlow_op_urshift): (JSC::JIT::emit_op_post_inc): (JSC::JIT::emit_op_post_dec): (JSC::JIT::emit_op_pre_inc): (JSC::JIT::emit_op_pre_dec): (JSC::JIT::emit_op_mod):
  • jit/JITArithmetic32_64.cpp: (JSC::JIT::emit_op_negate): (JSC::JIT::emit_op_jnless): (JSC::JIT::emit_op_jless): (JSC::JIT::emit_op_jlesseq): (JSC::JIT::emit_op_lshift): (JSC::JIT::emitRightShift): (JSC::JIT::emitRightShiftSlowCase): (JSC::JIT::emit_op_bitand): (JSC::JIT::emit_op_bitor): (JSC::JIT::emit_op_bitxor): (JSC::JIT::emit_op_bitnot): (JSC::JIT::emit_op_post_inc): (JSC::JIT::emit_op_post_dec): (JSC::JIT::emitSlow_op_post_dec): (JSC::JIT::emit_op_pre_inc): (JSC::JIT::emit_op_pre_dec): (JSC::JIT::emit_op_add): (JSC::JIT::emitAdd32Constant): (JSC::JIT::emit_op_sub): (JSC::JIT::emitSub32Constant): (JSC::JIT::emitBinaryDoubleOp): (JSC::JIT::emit_op_mul): (JSC::JIT::emitSlow_op_mul): (JSC::JIT::emit_op_div): (JSC::JIT::emit_op_mod):
  • jit/JITCall.cpp: (JSC::JIT::compileOpCallVarargs): (JSC::JIT::compileOpCall): (JSC::JIT::compileOpCallSlowCase):
  • jit/JITCall32_64.cpp: (JSC::JIT::compileOpCallVarargs): (JSC::JIT::emit_op_ret_object_or_this): (JSC::JIT::compileOpCall): (JSC::JIT::compileOpCallSlowCase):
  • jit/JITInlineMethods.h: (JSC::JIT::emitPutCellToCallFrameHeader): (JSC::JIT::emitPutIntToCallFrameHeader): (JSC::JIT::emitPutImmediateToCallFrameHeader): (JSC::JIT::emitLoadCharacterString): (JSC::JIT::restoreArgumentReferenceForTrampoline): (JSC::JIT::checkStructure): (JSC::JIT::setSamplingFlag): (JSC::JIT::clearSamplingFlag): (JSC::JIT::emitCount): (JSC::JIT::sampleInstruction): (JSC::JIT::sampleCodeBlock): (JSC::JIT::emitStoreInt32): (JSC::JIT::emitStoreCell): (JSC::JIT::emitStoreBool): (JSC::JIT::emitJumpSlowCaseIfNotJSCell): (JSC::JIT::emitInitRegister): (JSC::JIT::emitJumpIfJSCell): (JSC::JIT::emitJumpIfNotJSCell): (JSC::JIT::emitJumpIfImmediateInteger): (JSC::JIT::emitJumpIfNotImmediateInteger): (JSC::JIT::emitFastArithDeTagImmediate): (JSC::JIT::emitFastArithDeTagImmediateJumpIfZero): (JSC::JIT::emitFastArithReTagImmediate): (JSC::JIT::emitTagAsBoolImmediate):
  • jit/JITOpcodes.cpp: (JSC::JIT::privateCompileCTIMachineTrampolines): (JSC::JIT::privateCompileCTINativeCall): (JSC::JIT::emit_op_check_has_instance): (JSC::JIT::emit_op_instanceof): (JSC::JIT::emit_op_ret_object_or_this): (JSC::JIT::emit_op_resolve): (JSC::JIT::emit_op_to_primitive): (JSC::JIT::emit_op_resolve_base): (JSC::JIT::emit_op_ensure_property_exists): (JSC::JIT::emit_op_resolve_skip): (JSC::JIT::emit_op_resolve_global): (JSC::JIT::emitSlow_op_resolve_global): (JSC::JIT::emit_op_not): (JSC::JIT::emit_op_jfalse): (JSC::JIT::emit_op_jeq_null): (JSC::JIT::emit_op_jneq_null): (JSC::JIT::emit_op_jneq_ptr): (JSC::JIT::emit_op_jsr): (JSC::JIT::emit_op_resolve_with_base): (JSC::JIT::emit_op_new_func_exp): (JSC::JIT::emit_op_jtrue): (JSC::JIT::emit_op_get_pnames): (JSC::JIT::emit_op_next_pname): (JSC::JIT::emit_op_to_jsnumber): (JSC::JIT::emit_op_push_new_scope): (JSC::JIT::emit_op_catch): (JSC::JIT::emit_op_eq_null): (JSC::JIT::emit_op_neq_null): (JSC::JIT::emit_op_init_lazy_reg): (JSC::JIT::emit_op_convert_this): (JSC::JIT::emit_op_convert_this_strict): (JSC::JIT::emitSlow_op_not): (JSC::JIT::emitSlow_op_neq): (JSC::JIT::emit_op_get_arguments_length): (JSC::JIT::emitSlow_op_get_arguments_length): (JSC::JIT::emit_op_get_argument_by_val): (JSC::JIT::emitSlow_op_resolve_global_dynamic): (JSC::JIT::emit_op_new_regexp): (JSC::JIT::emit_op_load_varargs): (JSC::JIT::emitSlow_op_load_varargs): (JSC::JIT::emit_op_new_func):
  • jit/JITOpcodes32_64.cpp: (JSC::JIT::privateCompileCTIMachineTrampolines): (JSC::JIT::privateCompileCTINativeCall): (JSC::JIT::emit_op_loop_if_lesseq): (JSC::JIT::emit_op_check_has_instance): (JSC::JIT::emit_op_instanceof): (JSC::JIT::emit_op_get_scoped_var): (JSC::JIT::emit_op_put_scoped_var): (JSC::JIT::emit_op_tear_off_activation): (JSC::JIT::emit_op_tear_off_arguments): (JSC::JIT::emit_op_resolve): (JSC::JIT::emit_op_to_primitive): (JSC::JIT::emit_op_resolve_base): (JSC::JIT::emit_op_ensure_property_exists): (JSC::JIT::emit_op_resolve_skip): (JSC::JIT::emit_op_resolve_global): (JSC::JIT::emitSlow_op_resolve_global): (JSC::JIT::emit_op_not): (JSC::JIT::emit_op_jfalse): (JSC::JIT::emit_op_jtrue): (JSC::JIT::emit_op_jeq_null): (JSC::JIT::emit_op_jneq_null): (JSC::JIT::emit_op_jneq_ptr): (JSC::JIT::emit_op_jsr): (JSC::JIT::emit_op_eq): (JSC::JIT::emitSlow_op_eq): (JSC::JIT::emit_op_neq): (JSC::JIT::emitSlow_op_neq): (JSC::JIT::compileOpStrictEq): (JSC::JIT::emit_op_eq_null): (JSC::JIT::emit_op_neq_null): (JSC::JIT::emit_op_resolve_with_base): (JSC::JIT::emit_op_new_func_exp): (JSC::JIT::emit_op_get_pnames): (JSC::JIT::emit_op_next_pname): (JSC::JIT::emit_op_to_jsnumber): (JSC::JIT::emit_op_push_new_scope): (JSC::JIT::emit_op_catch): (JSC::JIT::emit_op_create_activation): (JSC::JIT::emit_op_create_arguments): (JSC::JIT::emit_op_convert_this): (JSC::JIT::emit_op_convert_this_strict): (JSC::JIT::emit_op_get_arguments_length): (JSC::JIT::emitSlow_op_get_arguments_length): (JSC::JIT::emit_op_get_argument_by_val): (JSC::JIT::softModulo):
  • jit/JITPropertyAccess.cpp: (JSC::JIT::stringGetByValStubGenerator): (JSC::JIT::emit_op_get_by_val): (JSC::JIT::emitSlow_op_get_by_val): (JSC::JIT::emit_op_get_by_pname): (JSC::JIT::emit_op_put_by_val): (JSC::JIT::emit_op_put_by_index): (JSC::JIT::emit_op_put_getter): (JSC::JIT::emit_op_put_setter): (JSC::JIT::emit_op_del_by_id): (JSC::JIT::emit_op_get_by_id): (JSC::JIT::emit_op_put_by_id): (JSC::JIT::emit_op_method_check): (JSC::JIT::compileGetByIdHotPath): (JSC::JIT::compileGetByIdSlowCase): (JSC::JIT::emitSlow_op_put_by_id): (JSC::JIT::testPrototype): (JSC::JIT::privateCompilePutByIdTransition): (JSC::JIT::privateCompilePatchGetArrayLength): (JSC::JIT::privateCompileGetByIdProto): (JSC::JIT::privateCompileGetByIdSelfList): (JSC::JIT::privateCompileGetByIdProtoList): (JSC::JIT::privateCompileGetByIdChainList): (JSC::JIT::privateCompileGetByIdChain):
  • jit/JITPropertyAccess32_64.cpp: (JSC::JIT::emit_op_put_getter): (JSC::JIT::emit_op_put_setter): (JSC::JIT::emit_op_del_by_id): (JSC::JIT::emit_op_get_by_id): (JSC::JIT::emit_op_put_by_id): (JSC::JIT::emit_op_method_check): (JSC::JIT::stringGetByValStubGenerator): (JSC::JIT::emit_op_get_by_val): (JSC::JIT::emitSlow_op_get_by_val): (JSC::JIT::emit_op_put_by_val): (JSC::JIT::compileGetByIdHotPath): (JSC::JIT::compileGetByIdSlowCase): (JSC::JIT::emitSlow_op_put_by_id): (JSC::JIT::testPrototype): (JSC::JIT::privateCompilePutByIdTransition): (JSC::JIT::privateCompilePatchGetArrayLength): (JSC::JIT::privateCompileGetByIdProto): (JSC::JIT::privateCompileGetByIdSelfList): (JSC::JIT::privateCompileGetByIdProtoList): (JSC::JIT::privateCompileGetByIdChainList): (JSC::JIT::privateCompileGetByIdChain): (JSC::JIT::emit_op_get_by_pname):
  • jit/JITStubCall.h: (JSC::JITStubCall::addArgument):
  • jit/JITStubs.cpp: (JSC::getPolymorphicAccessStructureListSlot): (JSC::DEFINE_STUB_FUNCTION):
  • jit/JSInterfaceJIT.h: (JSC::JSInterfaceJIT::emitJumpIfNotJSCell): (JSC::JSInterfaceJIT::emitLoadInt32): (JSC::JSInterfaceJIT::emitLoadDouble):
  • jit/SpecializedThunkJIT.h: (JSC::SpecializedThunkJIT::SpecializedThunkJIT): (JSC::SpecializedThunkJIT::loadJSStringArgument): (JSC::SpecializedThunkJIT::tagReturnAsInt32): (JSC::SpecializedThunkJIT::tagReturnAsJSCell):
  • jit/ThunkGenerators.cpp: (JSC::charToString): (JSC::powThunkGenerator):
  • yarr/YarrJIT.cpp: (JSC::Yarr::YarrGenerator::matchCharacterClass): (JSC::Yarr::YarrGenerator::storeToFrame): (JSC::Yarr::YarrGenerator::storeToFrameWithPatch): (JSC::Yarr::YarrGenerator::ParenthesesTail::generateCode): (JSC::Yarr::YarrGenerator::generatePatternCharacterSingle): (JSC::Yarr::YarrGenerator::generatePatternCharacterFixed): (JSC::Yarr::YarrGenerator::generatePatternCharacterGreedy): (JSC::Yarr::YarrGenerator::generatePatternCharacterNonGreedy): (JSC::Yarr::YarrGenerator::generateCharacterClassFixed): (JSC::Yarr::YarrGenerator::generateCharacterClassGreedy): (JSC::Yarr::YarrGenerator::generateCharacterClassNonGreedy): (JSC::Yarr::YarrGenerator::generateParenthesesSingle): (JSC::Yarr::YarrGenerator::generateDisjunction):
File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h

    r81408 r82130  
    8484    //
    8585    // Operations are typically two operand - operation(source, srcDst)
    86     // For many operations the source may be an Imm32, the srcDst operand
     86    // For many operations the source may be an TrustedImm32, the srcDst operand
    8787    // may often be a memory location (explictly described using an Address
    8888    // object).
     
    9393    }
    9494
    95     void add32(Imm32 imm, Address address)
     95    void add32(TrustedImm32 imm, Address address)
    9696    {
    9797        m_assembler.addl_im(imm.m_value, address.offset, address.base);
    9898    }
    9999
    100     void add32(Imm32 imm, RegisterID dest)
     100    void add32(TrustedImm32 imm, RegisterID dest)
    101101    {
    102102        m_assembler.addl_ir(imm.m_value, dest);
     
    118118    }
    119119
    120     void and32(Imm32 imm, RegisterID dest)
     120    void and32(TrustedImm32 imm, RegisterID dest)
    121121    {
    122122        m_assembler.andl_ir(imm.m_value, dest);
     
    133133    }
    134134
    135     void and32(Imm32 imm, Address address)
     135    void and32(TrustedImm32 imm, Address address)
    136136    {
    137137        m_assembler.andl_im(imm.m_value, address.offset, address.base);
     
    150150    }
    151151
    152     void and32(Imm32 imm, RegisterID src, RegisterID dest)
     152    void and32(TrustedImm32 imm, RegisterID src, RegisterID dest)
    153153    {
    154154        move(src, dest);
     
    181181    }
    182182
    183     void lshift32(Imm32 imm, RegisterID dest)
     183    void lshift32(TrustedImm32 imm, RegisterID dest)
    184184    {
    185185        m_assembler.shll_i8r(imm.m_value, dest);
    186186    }
    187187   
    188     void lshift32(RegisterID src, Imm32 imm, RegisterID dest)
     188    void lshift32(RegisterID src, TrustedImm32 imm, RegisterID dest)
    189189    {
    190190        if (src != dest)
     
    203203    }
    204204   
    205     void mul32(Imm32 imm, RegisterID src, RegisterID dest)
     205    void mul32(TrustedImm32 imm, RegisterID src, RegisterID dest)
    206206    {
    207207        m_assembler.imull_i32r(src, imm.m_value, dest);
     
    233233    }
    234234
    235     void or32(Imm32 imm, RegisterID dest)
     235    void or32(TrustedImm32 imm, RegisterID dest)
    236236    {
    237237        m_assembler.orl_ir(imm.m_value, dest);
     
    248248    }
    249249
    250     void or32(Imm32 imm, Address address)
     250    void or32(TrustedImm32 imm, Address address)
    251251    {
    252252        m_assembler.orl_im(imm.m_value, address.offset, address.base);
     
    265265    }
    266266
    267     void or32(Imm32 imm, RegisterID src, RegisterID dest)
     267    void or32(TrustedImm32 imm, RegisterID src, RegisterID dest)
    268268    {
    269269        move(src, dest);
     
    296296    }
    297297
    298     void rshift32(Imm32 imm, RegisterID dest)
     298    void rshift32(TrustedImm32 imm, RegisterID dest)
    299299    {
    300300        m_assembler.sarl_i8r(imm.m_value, dest);
    301301    }
    302302   
    303     void rshift32(RegisterID src, Imm32 imm, RegisterID dest)
     303    void rshift32(RegisterID src, TrustedImm32 imm, RegisterID dest)
    304304    {
    305305        if (src != dest)
     
    333333    }
    334334
    335     void urshift32(Imm32 imm, RegisterID dest)
     335    void urshift32(TrustedImm32 imm, RegisterID dest)
    336336    {
    337337        m_assembler.shrl_i8r(imm.m_value, dest);
    338338    }
    339339   
    340     void urshift32(RegisterID src, Imm32 imm, RegisterID dest)
     340    void urshift32(RegisterID src, TrustedImm32 imm, RegisterID dest)
    341341    {
    342342        if (src != dest)
     
    350350    }
    351351   
    352     void sub32(Imm32 imm, RegisterID dest)
     352    void sub32(TrustedImm32 imm, RegisterID dest)
    353353    {
    354354        m_assembler.subl_ir(imm.m_value, dest);
    355355    }
    356356   
    357     void sub32(Imm32 imm, Address address)
     357    void sub32(TrustedImm32 imm, Address address)
    358358    {
    359359        m_assembler.subl_im(imm.m_value, address.offset, address.base);
     
    376376    }
    377377
    378     void xor32(Imm32 imm, Address dest)
     378    void xor32(TrustedImm32 imm, Address dest)
    379379    {
    380380        m_assembler.xorl_im(imm.m_value, dest.offset, dest.base);
    381381    }
    382382
    383     void xor32(Imm32 imm, RegisterID dest)
     383    void xor32(TrustedImm32 imm, RegisterID dest)
    384384    {
    385385        m_assembler.xorl_ir(imm.m_value, dest);
     
    399399    {
    400400        if (op1 == op2)
    401             move(Imm32(0), dest);
     401            move(TrustedImm32(0), dest);
    402402        else if (op1 == dest)
    403403            xor32(op2, dest);
     
    408408    }
    409409
    410     void xor32(Imm32 imm, RegisterID src, RegisterID dest)
     410    void xor32(TrustedImm32 imm, RegisterID src, RegisterID dest)
    411411    {
    412412        move(src, dest);
     
    422422    //
    423423    // Loads are of the form load(address, destination) and stores of the form
    424     // store(source, address).  The source for a store may be an Imm32.  Address
     424    // store(source, address).  The source for a store may be an TrustedImm32.  Address
    425425    // operand objects to loads and store will be implicitly constructed if a
    426426    // register is passed.
     
    473473    }
    474474
    475     void store32(Imm32 imm, ImplicitAddress address)
     475    void store32(TrustedImm32 imm, ImplicitAddress address)
    476476    {
    477477        m_assembler.movl_i32m(imm.m_value, address.offset, address.base);
     
    638638        ASSERT(isSSE2Present());
    639639        m_assembler.cvttsd2si_rr(src, dest);
    640         return branch32(branchType ? NotEqual : Equal, dest, Imm32(0x80000000));
     640        return branch32(branchType ? NotEqual : Equal, dest, TrustedImm32(0x80000000));
    641641    }
    642642
     
    697697    }
    698698
    699     void push(Imm32 imm)
     699    void push(TrustedImm32 imm)
    700700    {
    701701        m_assembler.push_i32(imm.m_value);
     
    707707    // Move values in registers.
    708708
    709     void move(Imm32 imm, RegisterID dest)
    710     {
    711         // Note: on 64-bit the Imm32 value is zero extended into the register, it
     709    void move(TrustedImm32 imm, RegisterID dest)
     710    {
     711        // Note: on 64-bit the TrustedImm32 value is zero extended into the register, it
    712712        // may be useful to have a separate version that sign extends the value?
    713713        if (!imm.m_value)
     
    726726    }
    727727
    728     void move(ImmPtr imm, RegisterID dest)
     728    void move(TrustedImmPtr imm, RegisterID dest)
    729729    {
    730730        m_assembler.movq_i64r(imm.asIntptr(), dest);
     
    753753    }
    754754
    755     void move(ImmPtr imm, RegisterID dest)
     755    void move(TrustedImmPtr imm, RegisterID dest)
    756756    {
    757757        m_assembler.movl_i32r(imm.asIntptr(), dest);
     
    788788    //
    789789    // Operands to the comparision are provided in the expected order, e.g.
    790     // jle32(reg1, Imm32(5)) will branch if the value held in reg1, when
     790    // jle32(reg1, TrustedImm32(5)) will branch if the value held in reg1, when
    791791    // treated as a signed 32bit value, is less than or equal to 5.
    792792    //
     
    795795
    796796public:
    797     Jump branch8(Condition cond, Address left, Imm32 right)
     797    Jump branch8(Condition cond, Address left, TrustedImm32 right)
    798798    {
    799799        m_assembler.cmpb_im(right.m_value, left.offset, left.base);
     
    807807    }
    808808
    809     Jump branch32(Condition cond, RegisterID left, Imm32 right)
     809    Jump branch32(Condition cond, RegisterID left, TrustedImm32 right)
    810810    {
    811811        if (((cond == Equal) || (cond == NotEqual)) && !right.m_value)
     
    828828    }
    829829
    830     Jump branch32(Condition cond, Address left, Imm32 right)
     830    Jump branch32(Condition cond, Address left, TrustedImm32 right)
    831831    {
    832832        m_assembler.cmpl_im(right.m_value, left.offset, left.base);
     
    834834    }
    835835
    836     Jump branch32(Condition cond, BaseIndex left, Imm32 right)
     836    Jump branch32(Condition cond, BaseIndex left, TrustedImm32 right)
    837837    {
    838838        m_assembler.cmpl_im(right.m_value, left.offset, left.base, left.index, left.scale);
     
    840840    }
    841841
    842     Jump branch32WithUnalignedHalfWords(Condition cond, BaseIndex left, Imm32 right)
     842    Jump branch32WithUnalignedHalfWords(Condition cond, BaseIndex left, TrustedImm32 right)
    843843    {
    844844        return branch32(cond, left, right);
     
    851851    }
    852852
    853     Jump branch16(Condition cond, BaseIndex left, Imm32 right)
     853    Jump branch16(Condition cond, BaseIndex left, TrustedImm32 right)
    854854    {
    855855        ASSERT(!(right.m_value & 0xFFFF0000));
     
    866866    }
    867867
    868     Jump branchTest32(Condition cond, RegisterID reg, Imm32 mask = Imm32(-1))
     868    Jump branchTest32(Condition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
    869869    {
    870870        ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed));
     
    879879    }
    880880
    881     Jump branchTest32(Condition cond, Address address, Imm32 mask = Imm32(-1))
     881    Jump branchTest32(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
    882882    {
    883883        ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed));
     
    889889    }
    890890
    891     Jump branchTest32(Condition cond, BaseIndex address, Imm32 mask = Imm32(-1))
     891    Jump branchTest32(Condition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
    892892    {
    893893        ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed));
     
    899899    }
    900900   
    901     Jump branchTest8(Condition cond, RegisterID reg, Imm32 mask = Imm32(-1))
    902     {
    903         // Byte in Imm32 is not well defined, so be a little permisive here, but don't accept nonsense values.
     901    Jump branchTest8(Condition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
     902    {
     903        // Byte in TrustedImm32 is not well defined, so be a little permisive here, but don't accept nonsense values.
    904904        ASSERT(mask.m_value >= -128 && mask.m_value <= 255);
    905905        ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed));
     
    911911    }
    912912
    913     Jump branchTest8(Condition cond, Address address, Imm32 mask = Imm32(-1))
    914     {
    915         // Byte in Imm32 is not well defined, so be a little permisive here, but don't accept nonsense values.
     913    Jump branchTest8(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
     914    {
     915        // Byte in TrustedImm32 is not well defined, so be a little permisive here, but don't accept nonsense values.
    916916        ASSERT(mask.m_value >= -128 && mask.m_value <= 255);
    917917        ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed));
     
    923923    }
    924924   
    925     Jump branchTest8(Condition cond, BaseIndex address, Imm32 mask = Imm32(-1))
    926     {
    927         // Byte in Imm32 is not well defined, so be a little permisive here, but don't accept nonsense values.
     925    Jump branchTest8(Condition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
     926    {
     927        // Byte in TrustedImm32 is not well defined, so be a little permisive here, but don't accept nonsense values.
    928928        ASSERT(mask.m_value >= -128 && mask.m_value <= 255);
    929929        ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed));
     
    969969    }
    970970
    971     Jump branchAdd32(Condition cond, Imm32 imm, RegisterID dest)
     971    Jump branchAdd32(Condition cond, TrustedImm32 imm, RegisterID dest)
    972972    {
    973973        ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
     
    976976    }
    977977   
    978     Jump branchAdd32(Condition cond, Imm32 src, Address dest)
     978    Jump branchAdd32(Condition cond, TrustedImm32 src, Address dest)
    979979    {
    980980        ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
     
    10051005    }
    10061006
    1007     Jump branchAdd32(Condition cond, Imm32 imm, RegisterID src, RegisterID dest)
     1007    Jump branchAdd32(Condition cond, TrustedImm32 imm, RegisterID src, RegisterID dest)
    10081008    {
    10091009        move(src, dest);
     
    10251025    }
    10261026   
    1027     Jump branchMul32(Condition cond, Imm32 imm, RegisterID src, RegisterID dest)
     1027    Jump branchMul32(Condition cond, TrustedImm32 imm, RegisterID src, RegisterID dest)
    10281028    {
    10291029        ASSERT(cond == Overflow);
     
    10471047    }
    10481048   
    1049     Jump branchSub32(Condition cond, Imm32 imm, RegisterID dest)
     1049    Jump branchSub32(Condition cond, TrustedImm32 imm, RegisterID dest)
    10501050    {
    10511051        ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
     
    10541054    }
    10551055
    1056     Jump branchSub32(Condition cond, Imm32 imm, Address dest)
     1056    Jump branchSub32(Condition cond, TrustedImm32 imm, Address dest)
    10571057    {
    10581058        ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
     
    11381138    }
    11391139
    1140     void set8Compare32(Condition cond, RegisterID left, Imm32 right, RegisterID dest)
     1140    void set8Compare32(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
    11411141    {
    11421142        if (((cond == Equal) || (cond == NotEqual)) && !right.m_value)
     
    11541154    }
    11551155
    1156     void set32Compare32(Condition cond, RegisterID left, Imm32 right, RegisterID dest)
     1156    void set32Compare32(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
    11571157    {
    11581158        if (((cond == Equal) || (cond == NotEqual)) && !right.m_value)
     
    11691169    // asm ops like test, or pseudo ops like pop().
    11701170
    1171     void set32Test8(Condition cond, Address address, Imm32 mask, RegisterID dest)
     1171    void set32Test8(Condition cond, Address address, TrustedImm32 mask, RegisterID dest)
    11721172    {
    11731173        if (mask.m_value == -1)
     
    11791179    }
    11801180
    1181     void set32Test32(Condition cond, Address address, Imm32 mask, RegisterID dest)
     1181    void set32Test32(Condition cond, Address address, TrustedImm32 mask, RegisterID dest)
    11821182    {
    11831183        if (mask.m_value == -1)
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