Ignore:
Timestamp:
Apr 20, 2011, 11:44:35 AM (14 years ago)
Author:
[email protected]
Message:

Rationalize MacroAssembler branch methods
​https://bugs.webkit.org/show_bug.cgi?id=58950

Reviewed by Oliver Hunt.

The MacroAssembler currently exposes x86's weird behaviour that the 'setcc'
instruction only sets the low 8 bits of a register. Stop that.

Having done so, to clarify remove the 'set32' prefix from test & compare
instructions - these methods all now set a full 32/64 bit register (Ptr size).
The size in the function name should indicate the amount of data being compared.

Also split out the 'Condition' enum into 'RelationalCondition' and
'ResultCondition'. The former is used in binary comparison, the latter is a unary
condition check on the result of an operation.

  • JavaScriptCore.xcodeproj/project.pbxproj:
  • assembler/MacroAssembler.h:

(JSC::MacroAssembler::branchPtr):
(JSC::MacroAssembler::branch32):
(JSC::MacroAssembler::branch16):
(JSC::MacroAssembler::branchTestPtr):
(JSC::MacroAssembler::comparePtr):
(JSC::MacroAssembler::branchAddPtr):
(JSC::MacroAssembler::branchSubPtr):
(JSC::MacroAssembler::branchTest8):

  • assembler/MacroAssemblerARM.h:

(JSC::MacroAssemblerARM::branch8):
(JSC::MacroAssemblerARM::branch32):
(JSC::MacroAssemblerARM::branch32WithUnalignedHalfWords):
(JSC::MacroAssemblerARM::branch16):
(JSC::MacroAssemblerARM::branchTest8):
(JSC::MacroAssemblerARM::branchTest32):
(JSC::MacroAssemblerARM::branchAdd32):
(JSC::MacroAssemblerARM::branchMul32):
(JSC::MacroAssemblerARM::branchSub32):
(JSC::MacroAssemblerARM::branchNeg32):
(JSC::MacroAssemblerARM::branchOr32):
(JSC::MacroAssemblerARM::compare32):
(JSC::MacroAssemblerARM::test32):
(JSC::MacroAssemblerARM::test8):
(JSC::MacroAssemblerARM::branchPtrWithPatch):
(JSC::MacroAssemblerARM::ARMCondition):

  • assembler/MacroAssemblerARMv7.h:

(JSC::MacroAssemblerARMv7::branch32):
(JSC::MacroAssemblerARMv7::branch32WithUnalignedHalfWords):
(JSC::MacroAssemblerARMv7::branch16):
(JSC::MacroAssemblerARMv7::branch8):
(JSC::MacroAssemblerARMv7::branchTest32):
(JSC::MacroAssemblerARMv7::branchTest8):
(JSC::MacroAssemblerARMv7::branchAdd32):
(JSC::MacroAssemblerARMv7::branchMul32):
(JSC::MacroAssemblerARMv7::branchOr32):
(JSC::MacroAssemblerARMv7::branchSub32):
(JSC::MacroAssemblerARMv7::compare32):
(JSC::MacroAssemblerARMv7::test32):
(JSC::MacroAssemblerARMv7::test8):
(JSC::MacroAssemblerARMv7::branchPtrWithPatch):
(JSC::MacroAssemblerARMv7::makeBranch):
(JSC::MacroAssemblerARMv7::armV7Condition):

  • assembler/MacroAssemblerMIPS.h:

(JSC::MacroAssemblerMIPS::branch8):
(JSC::MacroAssemblerMIPS::branch32):
(JSC::MacroAssemblerMIPS::branch32WithUnalignedHalfWords):
(JSC::MacroAssemblerMIPS::branch16):
(JSC::MacroAssemblerMIPS::branchTest32):
(JSC::MacroAssemblerMIPS::branchTest8):
(JSC::MacroAssemblerMIPS::branchAdd32):
(JSC::MacroAssemblerMIPS::branchMul32):
(JSC::MacroAssemblerMIPS::branchSub32):
(JSC::MacroAssemblerMIPS::branchOr32):
(JSC::MacroAssemblerMIPS::compare32):
(JSC::MacroAssemblerMIPS::test8):
(JSC::MacroAssemblerMIPS::test32):
(JSC::MacroAssemblerMIPS::branchPtrWithPatch):

  • assembler/MacroAssemblerX86.h:

(JSC::MacroAssemblerX86::branch32):
(JSC::MacroAssemblerX86::branchPtrWithPatch):

  • assembler/MacroAssemblerX86Common.h:

(JSC::MacroAssemblerX86Common::branch8):
(JSC::MacroAssemblerX86Common::branch32):
(JSC::MacroAssemblerX86Common::branch32WithUnalignedHalfWords):
(JSC::MacroAssemblerX86Common::branch16):
(JSC::MacroAssemblerX86Common::branchTest32):
(JSC::MacroAssemblerX86Common::branchTest8):
(JSC::MacroAssemblerX86Common::branchAdd32):
(JSC::MacroAssemblerX86Common::branchMul32):
(JSC::MacroAssemblerX86Common::branchSub32):
(JSC::MacroAssemblerX86Common::branchNeg32):
(JSC::MacroAssemblerX86Common::branchOr32):
(JSC::MacroAssemblerX86Common::compare32):
(JSC::MacroAssemblerX86Common::test8):
(JSC::MacroAssemblerX86Common::test32):
(JSC::MacroAssemblerX86Common::x86Condition):

  • assembler/MacroAssemblerX86_64.h:

(JSC::MacroAssemblerX86_64::comparePtr):
(JSC::MacroAssemblerX86_64::branchPtr):
(JSC::MacroAssemblerX86_64::branchTestPtr):
(JSC::MacroAssemblerX86_64::branchAddPtr):
(JSC::MacroAssemblerX86_64::branchSubPtr):
(JSC::MacroAssemblerX86_64::branchPtrWithPatch):
(JSC::MacroAssemblerX86_64::branchTest8):

  • dfg/DFGSpeculativeJIT.cpp:

(JSC::DFG::SpeculativeJIT::compile):

  • jit/JITOpcodes.cpp:

(JSC::JIT::emit_op_eq):
(JSC::JIT::emit_op_neq):
(JSC::JIT::compileOpStrictEq):
(JSC::JIT::emit_op_eq_null):
(JSC::JIT::emit_op_neq_null):

  • jit/JITOpcodes32_64.cpp:

(JSC::JIT::emit_op_eq):
(JSC::JIT::emit_op_neq):
(JSC::JIT::compileOpStrictEq):
(JSC::JIT::emit_op_eq_null):
(JSC::JIT::emit_op_neq_null):

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h

    r84182 r84399  
    4242    typedef X86Assembler::FPRegisterID FPRegisterID;
    4343
    44     enum Condition {
     44    enum RelationalCondition {
    4545        Equal = X86Assembler::ConditionE,
    4646        NotEqual = X86Assembler::ConditionNE,
    … …  
    5252        GreaterThanOrEqual = X86Assembler::ConditionGE,
    5353        LessThan = X86Assembler::ConditionL,
    54         LessThanOrEqual = X86Assembler::ConditionLE,
     54        LessThanOrEqual = X86Assembler::ConditionLE
     55    };
     56
     57    enum ResultCondition {
    5558        Overflow = X86Assembler::ConditionO,
    5659        Signed = X86Assembler::ConditionS,
    … …  
    795798
    796799public:
    797     Jump branch8(Condition cond, Address left, TrustedImm32 right)
     800    Jump branch8(RelationalCondition cond, Address left, TrustedImm32 right)
    798801    {
    799802        m_assembler.cmpb_im(right.m_value, left.offset, left.base);
    … …  
    801804    }
    802805
    803     Jump branch32(Condition cond, RegisterID left, RegisterID right)
     806    Jump branch32(RelationalCondition cond, RegisterID left, RegisterID right)
    804807    {
    805808        m_assembler.cmpl_rr(right, left);
    … …  
    807810    }
    808811
    809     Jump branch32(Condition cond, RegisterID left, TrustedImm32 right)
     812    Jump branch32(RelationalCondition cond, RegisterID left, TrustedImm32 right)
    810813    {
    811814        if (((cond == Equal) || (cond == NotEqual)) && !right.m_value)
    … …  
    816819    }
    817820   
    818     Jump branch32(Condition cond, RegisterID left, Address right)
     821    Jump branch32(RelationalCondition cond, RegisterID left, Address right)
    819822    {
    820823        m_assembler.cmpl_mr(right.offset, right.base, left);
    … …  
    822825    }
    823826   
    824     Jump branch32(Condition cond, Address left, RegisterID right)
     827    Jump branch32(RelationalCondition cond, Address left, RegisterID right)
    825828    {
    826829        m_assembler.cmpl_rm(right, left.offset, left.base);
    … …  
    828831    }
    829832
    830     Jump branch32(Condition cond, Address left, TrustedImm32 right)
     833    Jump branch32(RelationalCondition cond, Address left, TrustedImm32 right)
    831834    {
    832835        m_assembler.cmpl_im(right.m_value, left.offset, left.base);
    … …  
    834837    }
    835838
    836     Jump branch32(Condition cond, BaseIndex left, TrustedImm32 right)
     839    Jump branch32(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
    837840    {
    838841        m_assembler.cmpl_im(right.m_value, left.offset, left.base, left.index, left.scale);
    … …  
    840843    }
    841844
    842     Jump branch32WithUnalignedHalfWords(Condition cond, BaseIndex left, TrustedImm32 right)
     845    Jump branch32WithUnalignedHalfWords(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
    843846    {
    844847        return branch32(cond, left, right);
    845848    }
    846849
    847     Jump branch16(Condition cond, BaseIndex left, RegisterID right)
     850    Jump branch16(RelationalCondition cond, BaseIndex left, RegisterID right)
    848851    {
    849852        m_assembler.cmpw_rm(right, left.offset, left.base, left.index, left.scale);
    … …  
    851854    }
    852855
    853     Jump branch16(Condition cond, BaseIndex left, TrustedImm32 right)
     856    Jump branch16(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
    854857    {
    855858        ASSERT(!(right.m_value & 0xFFFF0000));
    … …  
    859862    }
    860863
    861     Jump branchTest32(Condition cond, RegisterID reg, RegisterID mask)
    862     {
    863         ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed));
     864    Jump branchTest32(ResultCondition cond, RegisterID reg, RegisterID mask)
     865    {
    864866        m_assembler.testl_rr(reg, mask);
    865867        return Jump(m_assembler.jCC(x86Condition(cond)));
    866868    }
    867869
    868     Jump branchTest32(Condition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
    869     {
    870         ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed));
     870    Jump branchTest32(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
     871    {
    871872        // if we are only interested in the low seven bits, this can be tested with a testb
    872873        if (mask.m_value == -1)
    … …  
    879880    }
    880881
    881     Jump branchTest32(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
    882     {
    883         ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed));
     882    Jump branchTest32(ResultCondition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
     883    {
    884884        if (mask.m_value == -1)
    885885            m_assembler.cmpl_im(0, address.offset, address.base);
    … …  
    889889    }
    890890
    891     Jump branchTest32(Condition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
    892     {
    893         ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed));
     891    Jump branchTest32(ResultCondition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
     892    {
    894893        if (mask.m_value == -1)
    895894            m_assembler.cmpl_im(0, address.offset, address.base, address.index, address.scale);
    … …  
    899898    }
    900899   
    901     Jump branchTest8(Condition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
     900    Jump branchTest8(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
    902901    {
    903902        // Byte in TrustedImm32 is not well defined, so be a little permisive here, but don't accept nonsense values.
    904903        ASSERT(mask.m_value >= -128 && mask.m_value <= 255);
    905         ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed));
    906904        if (mask.m_value == -1)
    907905            m_assembler.testb_rr(reg, reg);
    … …  
    911909    }
    912910
    913     Jump branchTest8(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
     911    Jump branchTest8(ResultCondition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
    914912    {
    915913        // Byte in TrustedImm32 is not well defined, so be a little permisive here, but don't accept nonsense values.
    916914        ASSERT(mask.m_value >= -128 && mask.m_value <= 255);
    917         ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed));
    918915        if (mask.m_value == -1)
    919916            m_assembler.cmpb_im(0, address.offset, address.base);
    … …  
    923920    }
    924921   
    925     Jump branchTest8(Condition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
     922    Jump branchTest8(ResultCondition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
    926923    {
    927924        // Byte in TrustedImm32 is not well defined, so be a little permisive here, but don't accept nonsense values.
    928925        ASSERT(mask.m_value >= -128 && mask.m_value <= 255);
    929         ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed));
    930926        if (mask.m_value == -1)
    931927            m_assembler.cmpb_im(0, address.offset, address.base, address.index, address.scale);
    … …  
    962958    //   operation caused an overflow to occur.
    963959   
    964     Jump branchAdd32(Condition cond, RegisterID src, RegisterID dest)
    965     {
    966         ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
     960    Jump branchAdd32(ResultCondition cond, RegisterID src, RegisterID dest)
     961    {
    967962        add32(src, dest);
    968963        return Jump(m_assembler.jCC(x86Condition(cond)));
    969964    }
    970965
    971     Jump branchAdd32(Condition cond, TrustedImm32 imm, RegisterID dest)
    972     {
    973         ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
     966    Jump branchAdd32(ResultCondition cond, TrustedImm32 imm, RegisterID dest)
     967    {
    974968        add32(imm, dest);
    975969        return Jump(m_assembler.jCC(x86Condition(cond)));
    976970    }
    977971   
    978     Jump branchAdd32(Condition cond, TrustedImm32 src, Address dest)
    979     {
    980         ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
     972    Jump branchAdd32(ResultCondition cond, TrustedImm32 src, Address dest)
     973    {
    981974        add32(src, dest);
    982975        return Jump(m_assembler.jCC(x86Condition(cond)));
    983976    }
    984977
    985     Jump branchAdd32(Condition cond, RegisterID src, Address dest)
    986     {
    987         ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
     978    Jump branchAdd32(ResultCondition cond, RegisterID src, Address dest)
     979    {
    988980        add32(src, dest);
    989981        return Jump(m_assembler.jCC(x86Condition(cond)));
    990982    }
    991983
    992     Jump branchAdd32(Condition cond, Address src, RegisterID dest)
    993     {
    994         ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
     984    Jump branchAdd32(ResultCondition cond, Address src, RegisterID dest)
     985    {
    995986        add32(src, dest);
    996987        return Jump(m_assembler.jCC(x86Condition(cond)));
    997988    }
    998989
    999     Jump branchAdd32(Condition cond, RegisterID src1, RegisterID src2, RegisterID dest)
     990    Jump branchAdd32(ResultCondition cond, RegisterID src1, RegisterID src2, RegisterID dest)
    1000991    {
    1001992        if (src1 == dest)
    … …  
    1005996    }
    1006997
    1007     Jump branchAdd32(Condition cond, RegisterID src, TrustedImm32 imm, RegisterID dest)
     998    Jump branchAdd32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest)
    1008999    {
    10091000        move(src, dest);
    … …  
    10111002    }
    10121003
    1013     Jump branchMul32(Condition cond, RegisterID src, RegisterID dest)
    1014     {
    1015         ASSERT(cond == Overflow);
     1004    Jump branchMul32(ResultCondition cond, RegisterID src, RegisterID dest)
     1005    {
    10161006        mul32(src, dest);
    1017         return Jump(m_assembler.jCC(x86Condition(cond)));
    1018     }
    1019 
    1020     Jump branchMul32(Condition cond, Address src, RegisterID dest)
    1021     {
    1022         ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
     1007        if (cond != Overflow)
     1008            m_assembler.testl_rr(dest, dest);
     1009        return Jump(m_assembler.jCC(x86Condition(cond)));
     1010    }
     1011
     1012    Jump branchMul32(ResultCondition cond, Address src, RegisterID dest)
     1013    {
    10231014        mul32(src, dest);
    1024         return Jump(m_assembler.jCC(x86Condition(cond)));
    1025     }
    1026    
    1027     Jump branchMul32(Condition cond, TrustedImm32 imm, RegisterID src, RegisterID dest)
    1028     {
    1029         ASSERT(cond == Overflow);
     1015        if (cond != Overflow)
     1016            m_assembler.testl_rr(dest, dest);
     1017        return Jump(m_assembler.jCC(x86Condition(cond)));
     1018    }
     1019   
     1020    Jump branchMul32(ResultCondition cond, TrustedImm32 imm, RegisterID src, RegisterID dest)
     1021    {
    10301022        mul32(imm, src, dest);
    1031         return Jump(m_assembler.jCC(x86Condition(cond)));
    1032     }
    1033    
    1034     Jump branchMul32(Condition cond, RegisterID src1, RegisterID src2, RegisterID dest)
     1023        if (cond != Overflow)
     1024            m_assembler.testl_rr(dest, dest);
     1025        return Jump(m_assembler.jCC(x86Condition(cond)));
     1026    }
     1027   
     1028    Jump branchMul32(ResultCondition cond, RegisterID src1, RegisterID src2, RegisterID dest)
    10351029    {
    10361030        if (src1 == dest)
    … …  
    10401034    }
    10411035
    1042     Jump branchSub32(Condition cond, RegisterID src, RegisterID dest)
    1043     {
    1044         ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
     1036    Jump branchSub32(ResultCondition cond, RegisterID src, RegisterID dest)
     1037    {
    10451038        sub32(src, dest);
    10461039        return Jump(m_assembler.jCC(x86Condition(cond)));
    10471040    }
    10481041   
    1049     Jump branchSub32(Condition cond, TrustedImm32 imm, RegisterID dest)
    1050     {
    1051         ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
     1042    Jump branchSub32(ResultCondition cond, TrustedImm32 imm, RegisterID dest)
     1043    {
    10521044        sub32(imm, dest);
    10531045        return Jump(m_assembler.jCC(x86Condition(cond)));
    10541046    }
    10551047
    1056     Jump branchSub32(Condition cond, TrustedImm32 imm, Address dest)
    1057     {
    1058         ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
     1048    Jump branchSub32(ResultCondition cond, TrustedImm32 imm, Address dest)
     1049    {
    10591050        sub32(imm, dest);
    10601051        return Jump(m_assembler.jCC(x86Condition(cond)));
    10611052    }
    10621053
    1063     Jump branchSub32(Condition cond, RegisterID src, Address dest)
    1064     {
    1065         ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
     1054    Jump branchSub32(ResultCondition cond, RegisterID src, Address dest)
     1055    {
    10661056        sub32(src, dest);
    10671057        return Jump(m_assembler.jCC(x86Condition(cond)));
    10681058    }
    10691059
    1070     Jump branchSub32(Condition cond, Address src, RegisterID dest)
    1071     {
    1072         ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
     1060    Jump branchSub32(ResultCondition cond, Address src, RegisterID dest)
     1061    {
    10731062        sub32(src, dest);
    10741063        return Jump(m_assembler.jCC(x86Condition(cond)));
    10751064    }
    10761065
    1077     Jump branchSub32(Condition cond, RegisterID src1, RegisterID src2, RegisterID dest)
     1066    Jump branchSub32(ResultCondition cond, RegisterID src1, RegisterID src2, RegisterID dest)
    10781067    {
    10791068        // B := A - B is invalid.
    … …  
    10841073    }
    10851074
    1086     Jump branchSub32(Condition cond, RegisterID src1, TrustedImm32 src2, RegisterID dest)
     1075    Jump branchSub32(ResultCondition cond, RegisterID src1, TrustedImm32 src2, RegisterID dest)
    10871076    {
    10881077        move(src1, dest);
    … …  
    10901079    }
    10911080
    1092     Jump branchNeg32(Condition cond, RegisterID srcDest)
    1093     {
    1094         ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
     1081    Jump branchNeg32(ResultCondition cond, RegisterID srcDest)
     1082    {
    10951083        neg32(srcDest);
    10961084        return Jump(m_assembler.jCC(x86Condition(cond)));
    10971085    }
    10981086
    1099     Jump branchOr32(Condition cond, RegisterID src, RegisterID dest)
    1100     {
    1101         ASSERT((cond == Signed) || (cond == Zero) || (cond == NonZero));
     1087    Jump branchOr32(ResultCondition cond, RegisterID src, RegisterID dest)
     1088    {
    11021089        or32(src, dest);
    11031090        return Jump(m_assembler.jCC(x86Condition(cond)));
    … …  
    11321119    }
    11331120
    1134     void set8Compare32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
    1135     {
    1136         m_assembler.cmpl_rr(right, left);
    1137         m_assembler.setCC_r(x86Condition(cond), dest);
    1138     }
    1139 
    1140     void set8Compare32(Condition cond, Address left, RegisterID right, RegisterID dest)
    1141     {
    1142         m_assembler.cmpl_mr(left.offset, left.base, right);
    1143         m_assembler.setCC_r(x86Condition(cond), dest);
    1144     }
    1145 
    1146     void set8Compare32(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
    1147     {
    1148         if (((cond == Equal) || (cond == NotEqual)) && !right.m_value)
    1149             m_assembler.testl_rr(left, left);
    1150         else
    1151             m_assembler.cmpl_ir(right.m_value, left);
    1152         m_assembler.setCC_r(x86Condition(cond), dest);
    1153     }
    1154 
    1155     void set32Compare32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
     1121    void compare32(RelationalCondition cond, RegisterID left, RegisterID right, RegisterID dest)
    11561122    {
    11571123        m_assembler.cmpl_rr(right, left);
    … …  
    11601126    }
    11611127
    1162     void set32Compare32(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
     1128    void compare32(RelationalCondition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
    11631129    {
    11641130        if (((cond == Equal) || (cond == NotEqual)) && !right.m_value)
    … …  
    11751141    // asm ops like test, or pseudo ops like pop().
    11761142
    1177     void set32Test8(Condition cond, Address address, TrustedImm32 mask, RegisterID dest)
     1143    void test8(ResultCondition cond, Address address, TrustedImm32 mask, RegisterID dest)
    11781144    {
    11791145        if (mask.m_value == -1)
    … …  
    11851151    }
    11861152
    1187     void set32Test32(Condition cond, Address address, TrustedImm32 mask, RegisterID dest)
     1153    void test32(ResultCondition cond, Address address, TrustedImm32 mask, RegisterID dest)
    11881154    {
    11891155        if (mask.m_value == -1)
    … …  
    11961162
    11971163protected:
    1198     X86Assembler::Condition x86Condition(Condition cond)
     1164    X86Assembler::Condition x86Condition(RelationalCondition cond)
     1165    {
     1166        return static_cast<X86Assembler::Condition>(cond);
     1167    }
     1168
     1169    X86Assembler::Condition x86Condition(ResultCondition cond)
    11991170    {
    12001171        return static_cast<X86Assembler::Condition>(cond);
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