Changeset 94981 in webkit for trunk/Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h

Timestamp:

Sep 12, 2011, 3:17:53 PM (14 years ago)

Author:

[email protected]

Message:

Update RegExp and related classes to use 8 bit strings when available
​https://bugs.webkit.org/show_bug.cgi?id=67337

Source/JavaScriptCore:

Modified both the Yarr interpreter and JIT to handle 8 bit subject strings.
The code paths are triggered by the UString::is8bit() method which currently
returns false. Implemented JIT changes for all current architectures.
Tested X86_64 and ARM v7.

This includes some code that will likely change as we complete the
8 bit string changes. This includes the way the raw buffer pointers
are accessed as well as replacing the CharAccess class with a
string interator returned from UString.

Fixed build breakage in testRegExp.cpp due to globalObject construction
changes.

Reviewed by Gavin Barraclough.

• JavaScriptCore.exp:
• JavaScriptCore.vcproj/JavaScriptCore/JavaScriptCore.def:
• testRegExp.cpp:

(GlobalObject::finishCreation):
(GlobalObject::GlobalObject):

• assembler/ARMAssembler.cpp:

(JSC::ARMAssembler::baseIndexTransfer32):

• assembler/ARMAssembler.h:
• assembler/ARMv7Assembler.h:

(JSC::ARMv7Assembler::ubfx):
(JSC::ARMv7Assembler::ARMInstructionFormatter::twoWordOp12Reg40Imm3Reg4Imm20Imm5):

• assembler/MacroAssemblerARM.h:

(JSC::MacroAssemblerARM::load8):
(JSC::MacroAssemblerARM::branch8):
(JSC::MacroAssemblerARM::branch16):

• assembler/MacroAssemblerARMv7.h:

(JSC::MacroAssemblerARMv7::load8):
(JSC::MacroAssemblerARMv7::branch16):
(JSC::MacroAssemblerARMv7::branch8):

• assembler/MacroAssemblerMIPS.h:

(JSC::MacroAssemblerMIPS::load8):
(JSC::MacroAssemblerMIPS::branch8):
(JSC::MacroAssemblerMIPS::branch16):

• assembler/MacroAssemblerSH4.h:

(JSC::MacroAssemblerSH4::load8):
(JSC::MacroAssemblerSH4::branch8):
(JSC::MacroAssemblerSH4::branch16):

• assembler/MacroAssemblerX86Common.h:

(JSC::MacroAssemblerX86Common::load8):
(JSC::MacroAssemblerX86Common::branch16):
(JSC::MacroAssemblerX86Common::branch8):

• assembler/SH4Assembler.h:

(JSC::SH4Assembler::extub):
(JSC::SH4Assembler::printInstr):

• assembler/X86Assembler.h:

(JSC::X86Assembler::cmpw_ir):
(JSC::X86Assembler::movzbl_mr):

• runtime/RegExp.cpp:

(JSC::RegExp::compile):
(JSC::RegExp::compileIfNecessary):
(JSC::RegExp::match):
(JSC::RegExp::matchCompareWithInterpreter):

• runtime/RegExp.h:
• runtime/UString.h:

(JSC::UString::is8Bit):

• yarr/Yarr.h:
• yarr/YarrInterpreter.cpp:

(JSC::Yarr::Interpreter::CharAccess::CharAccess):
(JSC::Yarr::Interpreter::CharAccess::~CharAccess):
(JSC::Yarr::Interpreter::CharAccess::operator[]):
(JSC::Yarr::Interpreter::InputStream::InputStream):
(JSC::Yarr::Interpreter::Interpreter):
(JSC::Yarr::interpret):

• yarr/YarrJIT.cpp:

(JSC::Yarr::YarrGenerator::jumpIfCharNotEquals):
(JSC::Yarr::YarrGenerator::readCharacter):
(JSC::Yarr::YarrGenerator::generatePatternCharacterOnce):
(JSC::Yarr::YarrGenerator::generatePatternCharacterFixed):
(JSC::Yarr::YarrGenerator::generatePatternCharacterGreedy):
(JSC::Yarr::YarrGenerator::backtrackPatternCharacterNonGreedy):
(JSC::Yarr::YarrGenerator::generateCharacterClassFixed):
(JSC::Yarr::YarrGenerator::generateDotStarEnclosure):
(JSC::Yarr::YarrGenerator::YarrGenerator):
(JSC::Yarr::YarrGenerator::compile):
(JSC::Yarr::jitCompile):
(JSC::Yarr::execute):

• yarr/YarrJIT.h:

(JSC::Yarr::YarrCodeBlock::has8BitCode):
(JSC::Yarr::YarrCodeBlock::has16BitCode):
(JSC::Yarr::YarrCodeBlock::set8BitCode):
(JSC::Yarr::YarrCodeBlock::set16BitCode):
(JSC::Yarr::YarrCodeBlock::execute):

• yarr/YarrParser.h:

(JSC::Yarr::Parser::Parser):

Source/WebCore:

Updated call to match to use UString& instead of UChar*.

Reviewed by Gavin Barraclough.

No new tests, Covered by existing tests.

• platform/text/RegularExpression.cpp:

(WebCore::RegularExpression::match):

File:

• trunk/Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h (modified) (3 diffs)

trunk/Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h

@@ -497 +497 @@
     }
 
+    void load8(BaseIndex address, RegisterID dest)
+    {
+        if (address.offset >= -32768 && address.offset <= 32767
+            && !m_fixedWidth) {
+            /*
+             sll     addrTemp, address.index, address.scale
+             addu    addrTemp, addrTemp, address.base
+             lbu     dest, address.offset(addrTemp)
+             */
+            m_assembler.sll(addrTempRegister, address.index, address.scale);
+            m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
+            m_assembler.lbu(dest, addrTempRegister, address.offset);
+        } else {
+            /*
+             sll     addrTemp, address.index, address.scale
+             addu    addrTemp, addrTemp, address.base
+             lui     immTemp, (address.offset + 0x8000) >> 16
+             addu    addrTemp, addrTemp, immTemp
+             lbu     dest, (address.offset & 0xffff)(at)
+             */
+            m_assembler.sll(addrTempRegister, address.index, address.scale);
+            m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
+            m_assembler.lui(immTempRegister, (address.offset + 0x8000) >> 16);
+            m_assembler.addu(addrTempRegister, addrTempRegister,
+                             immTempRegister);
+            m_assembler.lbu(dest, addrTempRegister, address.offset);
+        }
+    }
+
     void load32(ImplicitAddress address, RegisterID dest)
     {
@@ -933 +962 @@
     }
 
+    Jump branch8(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
+    {
+        ASSERT(!(right.m_value & 0xFFFFFF00));
+        load8(left, dataTempRegister);
+        // Be careful that the previous load8() uses immTempRegister.
+        // So, we need to put move() after load8().
+        move(right, immTempRegister);
+        return branch32(cond, dataTempRegister, immTempRegister);
+    }
+
     Jump branch32(RelationalCondition cond, RegisterID left, RegisterID right)
     {
@@ -1031 +1070 @@
         move(right, immTempRegister);
         return branch32(cond, dataTempRegister, immTempRegister);
+    }
+
+    Jump branch16(RelationalCondition cond, RegisterID left, TrustedImm32 right)
+    {
+        // Make sure the immediate value is unsigned 16 bits.
+        ASSERT(!(right.m_value & 0xFFFF0000));
+        m_assembler.andi(immTempRegister, left, 0xffff);
+        return branch32(cond, immTempRegister, right);
     }