Changeset 149634 in webkit for trunk/Source/JavaScriptCore/assembler/SH4Assembler.h

Timestamp:

May 6, 2013, 1:28:31 PM (12 years ago)

Author:

[email protected]

Message:

Misc bugfix and cleaning in sh4 base JIT.
​https://bugs.webkit.org/show_bug.cgi?id=115627

Patch by Julien Brianceau <​[email protected]> on 2013-05-06
Reviewed by Oliver Hunt.

Get rid of loadX(RegisterID r0, RegisterID src, RegisterID dest) functions.
Remove misplaced extuw() implementation from MacroAssemblerSH4.
Add movbRegMemr0 and movwRegMemr0 functions in SH4Assembler.

• assembler/MacroAssemblerSH4.h:

(JSC::MacroAssemblerSH4::add32): Skip operation when first operand is a zero immediate.
(JSC::MacroAssemblerSH4::sub32): Skip operation when first operand is a zero immediate.
(JSC::MacroAssemblerSH4::load32): Fix wrong usage of r0 register.
(JSC::MacroAssemblerSH4::load8Signed): Handle "base == r0" case.
(MacroAssemblerSH4):
(JSC::MacroAssemblerSH4::load16): Handle "base == r0" case.
(JSC::MacroAssemblerSH4::load16Unaligned): Use extuw() implementation from SH4Assembler.
(JSC::MacroAssemblerSH4::load16Signed): Cosmetic change.
(JSC::MacroAssemblerSH4::store8): Fix unhandled BaseIndex offset and handle (base == r0) case.
(JSC::MacroAssemblerSH4::store16): Fix unhandled BaseIndex offset and handle (base == r0) case.
(JSC::MacroAssemblerSH4::store32):

• assembler/SH4Assembler.h:

(JSC::SH4Assembler::movwRegMemr0):
(SH4Assembler):
(JSC::SH4Assembler::movbRegMemr0):
(JSC::SH4Assembler::placeConstantPoolBarrier): Cosmetic change.
(JSC::SH4Assembler::maxJumpReplacementSize):
(JSC::SH4Assembler::replaceWithJump): Correct branch range and save an opcode.
(JSC::SH4Assembler::printInstr):

File:

• trunk/Source/JavaScriptCore/assembler/SH4Assembler.h (modified) (8 diffs)

trunk/Source/JavaScriptCore/assembler/SH4Assembler.h

@@ -116 +116 @@
     MOVL_READ_OFFRM_OPCODE = 0x5000,
     MOVW_WRITE_RN_OPCODE = 0x2001,
+    MOVW_WRITE_R0RN_OPCODE = 0x0005,
     MOVW_READ_RM_OPCODE = 0x6001,
     MOVW_READ_R0RM_OPCODE = 0x000d,
@@ -1061 +1062 @@
     }
 
+    void movwRegMemr0(RegisterID src, RegisterID dst)
+    {
+        uint16_t opc = getOpcodeGroup1(MOVW_WRITE_R0RN_OPCODE, dst, src);
+        oneShortOp(opc);
+    }
+
     void movlRegMem(RegisterID src, int offset, RegisterID base)
     {
@@ -1124 +1131 @@
     {
         uint16_t opc = getOpcodeGroup1(MOVB_READ_RM_OPCODE, dst, src);
+        oneShortOp(opc);
+    }
+
+    void movbRegMemr0(RegisterID src, RegisterID dst)
+    {
+        uint16_t opc = getOpcodeGroup1(MOVB_WRITE_R0RN_OPCODE, dst, src);
         oneShortOp(opc);
     }
@@ -1381 +1394 @@
     static SH4Buffer::TwoShorts placeConstantPoolBarrier(int offset)
     {
-        ASSERT(((offset >> 1) <=2047) && ((offset >> 1) >= -2048));
+        ASSERT(((offset >> 1) <= 2047) && ((offset >> 1) >= -2048));
 
         SH4Buffer::TwoShorts m_barrier;
@@ -1475 +1488 @@
     static ptrdiff_t maxJumpReplacementSize()
     {
-        return sizeof(SH4Word) * 7;
+        return sizeof(SH4Word) * 6;
     }
 
@@ -1484 +1497 @@
         int nbinst = 0;
 
-        if ((difference >= -2048) && (difference <= 2047)) {
+        if ((difference >= -4096) && (difference <= 4094)) {
             instruction[0] = getOpcodeGroup6(BRA_OPCODE, difference >> 1);
             instruction[1] = NOP_OPCODE;
@@ -1491 +1504 @@
         }
 
-        if (reinterpret_cast<unsigned>(instruction) & 3)
-            instruction[nbinst++] = NOP_OPCODE;
-
         instruction[nbinst++] = getOpcodeGroup3(MOVL_READ_OFFPC_OPCODE, scratchReg2, 1);
         instruction[nbinst++] = getOpcodeGroup2(JMP_OPCODE, scratchReg2);
         instruction[nbinst++] = NOP_OPCODE;
-        instruction[nbinst++] = NOP_OPCODE;
+
+        if (!(reinterpret_cast<unsigned>(instruction) & 3))
+            instruction[nbinst++] = NOP_OPCODE;
+
         instruction[nbinst++] = reinterpret_cast<unsigned>(to) & 0xffff;
         instruction[nbinst++] = reinterpret_cast<unsigned>(to) >> 16;
@@ -1949 +1962 @@
             format = "    MOV.W @(R0, R%d), R%d\n";
             break;
+        case MOVW_WRITE_R0RN_OPCODE:
+            format = "    MOV.W R%d, @(R0, R%d)\n";
+            break;
         case EXTUB_OPCODE:
             format = "    EXTU.B R%d, R%d\n";