source: webkit/trunk/Source/JavaScriptCore/offlineasm/mips.rb

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Diff Rev Age Author Log Message
(edit) @284341   4 years mark.lam Make LLIntAssembly.h more readable. …
(edit) @279343   4 years commit-queue Add LLInt fast path for less, lesseq, greater and greatereq …
(edit) @269349   5 years ysuzuki [JSC] Add JITCage support …
(edit) @267535   5 years commit-queue [MIPS] Broken build after r267371 …
(edit) @267395   5 years pmatos Fix MIPS leai,leap when offset is nonzero …
(edit) @264105   5 years sbarati Add a way to return early from detected infinite loops to aid the …
(edit) @260310   5 years commit-queue Fix code origin when lowering offlineasm instructions on MIPS/ARM64E …
(edit) @260309   5 years commit-queue REGRESSION(r260246): It broke build on MIPS32 …
(edit) @257466   5 years ticaiolima [JSC][MIPS] Adding support to Checkpoints …
(edit) @254674   5 years ticaiolima [JSC] 32-bit platforms should use a PC base register …
(edit) @252713   5 years ticaiolima [JSC] OSR exit to LLInt is broken on MIPS …
(edit) @252422   6 years rmorisset Split ArithProfile into a Unary and a Binary version …
(edit) @252273   6 years jlewis3 Unreviewed, rolling out r252229. This caused internal failures. …
(edit) @252229   6 years rmorisset Split ArithProfile into a Unary and a Binary version …
(edit) @252021   6 years tsavell Unreviewed, rolling out r252015. Broke the Windows build Reverted …
(edit) @252015   6 years rmorisset Split ArithProfile into a Unary and a Binary version …
(edit) @251966   6 years rmorisset The offline assembler is wrong about which immediates are supported by …
(edit) @251893   6 years tzagallo Unreviewed, fix cloop builds after r251886 …
(edit) @251533   6 years commit-queue Disable pichdr generation on MIPS for return location labels …
(edit) @245906   6 years ysuzuki [JSC] Implement op_wide16 / op_wide32 and introduce 16bit version …
(edit) @240432   6 years guijemont [JSC] Reenable baseline JIT on mips …
(edit) @232290   7 years commit-queue [MIPS] Fix build on MIPS32r1 …
(edit) @231552   7 years commit-queue [MIPS] Use mfhc1 and mthc1 to fix assembler error …
(edit) @231472   7 years utatane.tea [DFG][MIPS] Simplify DFG code by increasing MIPS temporary registers …
(edit) @228604   7 years commit-queue Offlineasm/MIPS: immediates need to be within 16-bit signed values …
(edit) @228402   7 years mark.lam Miscellaneous refactoring of offlineasm. …
(edit) @198173   9 years julien.brianceau [mips] Fix unaligned access in LLINT. …
(edit) @195926   9 years commit-queue [mips] don't save to a callee saved register too early …
(edit) @195290   9 years commit-queue [mips] Logical instructions allow immediates in range 0..0xffff, not …
(edit) @195236   9 years commit-queue [MIPS] LLInt: fix calculation of Global Offset Table …
(edit) @195182   9 years julien.brianceau [mips] Fix regT2 and regT3 trampling in MacroAssembler …
(edit) @194725   9 years commit-queue [mips] Lower immediates of logical operations. …
(edit) @189293   10 years msaboff Clean up register naming …
(edit) @173232   11 years commit-queue [MIPS] Wrong register usage in LLInt op_catch. …
(edit) @172429   11 years msaboff Eliminate {push,pop}CalleeSaves in favor of individual pushes & pops …
(edit) @161377   11 years mhahnenberg Add write barriers to the LLInt …
(edit) @160387   11 years commit-queue [MIPS] Redundant instructions in code generated from offlineasm. …
(edit) @159635   11 years commit-queue [MIPS] Build fails since r159545. …
(edit) @159276   12 years msaboff Change callToJavaScript thunk into an offline assembled stub …
(edit) @158883   12 years msaboff Change CallFrameRegister to architected frame pointer register …
(edit) @153375   12 years commit-queue [mips] Fix LLINT build for mips backend …
(edit) @153307   12 years commit-queue Fix "Unhandled opcode localAnnotation" build error in sh4 and mips …
(edit) @148474   12 years commit-queue LLInt SH4 backend implementation …
(edit) @148045   12 years commit-queue LLInt conditional branch compilation fault on MIPS. …
(edit) @141641   12 years commit-queue offlineasm BaseIndex handling is broken on ARM due to MIPS changes …
(edit) @141189   12 years fpizlo offlineasm BaseIndex handling is broken on ARM due to MIPS changes …
(add) @138970   12 years commit-queue MIPS LLInt implementation. …
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